DS91M124 DS91M124 125 MHz 1:4 M-LVDS Repeater with LVCMOS Input Literature Number: SNLS287D DS91M124 125 MHz 1:4 M-LVDS Repeater with LVCMOS Input General Description Features The DS91M124 is a 1:4 M-LVDS repeater for driving and distributing clock or data signals to up to four multipoint networks. M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multipoint applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs. A single DS91M124 channel is a 1:4 repeater that accepts LVTTL/LVCMOS signals at the driver inputs and converts them to differential M-LVDS signal levels. It features independent driver enable pins for each driver output. The DS91M124 has a flow-through pinout for easy PCB layout. It provides a new alternative for high speed multipoint interface applications. It is packaged in a space saving SOIC-16 package. ■ DC - 125 MHz / 250 Mbps low jitter, low skew, low power ■ ■ ■ ■ ■ ■ ■ operation Independent Driver Enable pins Conforms to TIA/EIA-899 M-LVDS Standard Controlled transition times minimize reflections 8 kV ESD on M-LVDS I/O pins protects adjoining components Flow-through pinout simplifies PCB layout Industrial operating temperature range (−40°C to +85°C) Available in a space saving SOIC-16 package Applications ■ Multidrop / Multipoint clock and data distribution ■ High-Speed, Low Power, Short-Reach alternative to TIA/ EIA-485/422 ■ Clock distribution in AdvancedTCA (ATCA) and MicroTCA (μTCA) backplanes Typical Application 30049802 © 2009 National Semiconductor Corporation 300498 www.national.com DS91M124 125 MHz 1:4 M-LVDS Repeater with LVCMOS Input November 9, 2009 DS91M124 Ordering Information Order Number Function Package Type DS91M124TMA 1:4 Repeater SOIC-16 Pin Diagram 30049801 Logic Diagram 30049803 Pin Descriptions Number Name I/O, Type Description 1, 2, 3, 8 DE I, LVCMOS Driver enable pin: When a DE pin is low, the corresponding driver output is disabled. When a DE pin is high, the corresponding driver output is enabled. There is a 300 kΩ pulldown resistor on each DE pin. 6 DI I, LVCMOS Driver input pin. 5 GND Power 10, 11, 14, 15 A O, M-LVDS Non-inverting driver output pins. 9, 12, 13, 16 B O, M-LVDS Inverting driver output pins. 4 VDD Power 7 N/C N/A www.national.com Ground pin. Power supply pin, +3.3V ± 0.3V NO CONNECT pin. 2 ESD Susceptibility HBM (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. CDM (Note 3) Power Supply Voltage −0.3V to +4V LVCMOS Input Voltage −0.3V to (VDD + 0.3V) M-LVDS Output Voltage −1.9V to +5.5V M-LVDS Output Short Circuit Current Duration Continuous Junction Temperature +140°C Storage Temperature Range −65°C to +150°C Lead Temperature Range Soldering (4 sec.) +260°C Maximum Package Power Dissipation @ +25°C MA Package 2.21W Derate MA Package 19.2 mW/°C above +25°C Package Thermal Resistance (4-Layer, 2 oz. Cu, JEDEC) θJA +52°C/W θJC +19°C/W ≥8 kV ≥250V ≥1250V MM (Note 2) Note 1: Human Body Model, applicable std. JESD22-A114C Note 2: Machine Model, applicable std. JESD22-A115-A Note 3: Field Induced Charge Device Model, applicable std. JESD22-C101-C Recommended Operating Conditions Min Typ Max Units 3.0 3.3 3.6 V −1.4 +3.8 V Supply Voltage, VDD Voltage at Any Bus Terminal (Separate or Common-Mode) LVTTL Input Voltage High VIH 2.0 LVTTL Input Voltage Low VIL 0 Operating Free Air Temperature TA −40 +25 VDD 0.8 V V +85 °C DC Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified. (Note 5, Note 6, Note 7, Note 10) Symbol Parameter Conditions Min Typ Max Units VDD V LVCMOS DC Specifications VIH High-Level Input Voltage 2.0 VIL Low-Level Input Voltage 0.8 V IIH High-Level Input Current VIH = 3.6V -15 ±1 15 μA IIL Low-Level Input Current VIL = 0V -15 ±1 15 μA VCL Input Clamp Voltage IIN = -18 mA -1.5 GND V M-LVDS DC Specifications |VAB| Differential Output Voltage Magnitude ΔVAB Change in Differential Output Voltage Magnitude Between Logic States VOS(SS) Steady-State Common-Mode Output Voltage |ΔVOS(SS)| Change in Steady-State Common-Mode Output Voltage Between Logic States VA(OC) Maximum Steady-State Open-Circuit Output Voltage VB(OC) Maximum Steady-State Open-Circuit Output Voltage VP(H) Voltage Overshoot, Low-to-High Level Output (Note 8) VP(L) Voltage Overshoot, High-to-Low Level Output (Note 8) IOS Output Short-Circuit Current (Note 9) RL = 50Ω, CL = 5 pF Figures 1, 3 Figures 1, 2 RL = 50Ω Figure 4 RL = 50Ω, CL = 5 pF CD = 0.5 pF Figures 6, 7 Figure 5 IB IAB Driver High-Impedance Output Current Driver High-Impedance Output Current Driver High-Impedance Output Differential Curent (IA − IB) 3 650 mV −50 50 mV 2.10 V 0 50 mV 0 2.4 V 0 2.4 V 0.30 1.6 1.2VSS V V −0.2VSS -43 43 mA 0 32 μA VA = 0V or 2.4V, VB = 1.2V −20 20 μA VA = −1.4V, VB = 1.2V −32 0 μA VA = 3.8V, VB = 1.2V 0 32 μA VA = 0V or 2.4V, VB = 1.2V −20 20 μA VA = −1.4V, VB = 1.2V −32 0 μA VA = VB, −1.4V ≤ V ≤ 3.8V −4 4 VA = 3.8V, VB = 1.2V IA 480 μA www.national.com DS91M124 Absolute Maximum Ratings (Note 4) DS91M124 Symbol IA(OFF) Parameter Conditions Driver High-Impedance Output Power-Off Current VA = 3.8V, VB = 1.2V DEn = 0V Min Typ Max Units μA 0 32 VA = 0V or 2.4V, VB = 1.2V DEn = 0V −20 20 VA = −1.4V, VB = 1.2V DEn = 0V −32 0 VA = 3.8V, VB = 1.2V DEn = 0V 0 32 VA = 0V or 2.4V, VB = 1.2V DEn = 0V −20 20 VA = −1.4V, VB = 1.2V DEn = 0V −32 0 VA = VB, −1.4V ≤ V ≤ 3.8V DEn = 0V −4 4 0V ≤ VDD ≤ 1.5V μA 0V ≤ VDD ≤ 1.5V μA 0V ≤ VDD ≤ 1.5V IB(OFF) Driver High-Impedance Output Power-Off Current μA 0V ≤ VDD ≤ 1.5V μA 0V ≤ VDD ≤ 1.5V μA 0V ≤ VDD ≤ 1.5V IAB(OFF) Driver High-Impedance Output Power-Off Current (IA(OFF) − IB(OFF)) μA 0V ≤ VDD ≤ 1.5V CA Driver Output Capacitance CB Driver Output Capacitance CAB Driver Output Differential Capacitance CA/B Driver Output Capacitance Balance (CA/CB) ICCL Loaded Supply Current Enabled ICCZ VDD = 0V 7.8 pF 7.8 pF 3 pF 1 No Load Supply Current Disabled RL = 50Ω (All Outputs) DI = VDD or GND DEn = VDD or GND (All Outputs) 65 75 mA DI = VDD or GND, DEn = GND (All Outputs) 19 24 mA Note 4: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. Note 5: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 6: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except VOD and ΔVOD. Note 7: Typical values represent most likely parametric norms for VDD = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 8: Specification is guaranteed by characterization and is not tested in production. Note 9: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Note 10: CL includes fixture capacitance and CD includes probe capacitance. www.national.com 4 Over supply voltage and operating temperature ranges, unless otherwise specified. (Note 11, Note 12, Note 18) Min Typ Max Units tPHL Symbol Differential Propagation Delay High to Low Parameter Conditions 1.8 3.9 6.5 ns tPLH Differential Propagation Delay Low to High 1.8 3.9 6.5 ns tSKD1 Differential Pulse Skew |tPHL − tPLH| (Note 13, Note 14) 0 25 100 ps tSKD2 Channel-to-Channel Skew (Note 13, Note 15) 0 70 250 ps tSKD3 Differential Part-to-Part Skew (Note 13, Note 16) (Constant TA and VDD) 0 1.5 2 ns tSKD4 Differential Part-to-Part Skew (Note 13, Note 17) 4.7 ns tTLH Rise Time (Note 13) 1.1 2.0 3.0 ns tTHL Fall Time (Note 13) 1.1 2.0 3.0 ns tPHZ Disable Time High to Z 6 11 ns tPLZ Disable Time Low to Z 6 11 ns tPZH Enable Time Z to High 6 11 ns tPZL Enable Time Z to Low 6 11 fMAX Maximum Operating Frequency (Note 13) RL = 50Ω CL = 5 pF, CD = 0.5 pF Figures 6, 7 0 RL = 50Ω CL = 5 pF, CD = 0.5 pF Figures 8, 9 125 ns MHz Note 11: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. Note 12: Typical values represent most likely parametric norms for VDD = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. Note 13: Specification is guaranteed by characterization and is not tested in production. Note 14: tSKD1, |tPLHD − tPHLD|, Pulse Skew, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. Note 15: tSKD2, Channel-to-Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels. Note 16: tSKD3, Part-to-Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This specification applies to devices at the same VDD and within 5°C of each other within the operating temperature range. Note 17: tSKD4, Part-to-Part Skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max − Min| differential propagation delay. Note 18: CL includes fixture capacitance and CD includes probe capacitance. 5 www.national.com DS91M124 Switching Characteristics DS91M124 Test Circuits and Waveforms 30049814 FIGURE 1. Differential Driver Test Circuit 30049844 FIGURE 2. Differential Driver Waveforms 30049822 FIGURE 3. Differential Driver Full Load Test Circuit www.national.com 6 DS91M124 30049812 FIGURE 4. Differential Driver DC Open Test Circuit 30049825 FIGURE 5. Differential Driver Short-Circuit Test Circuit 30049816 FIGURE 6. Driver Propagation Delay and Transition Time Test Circuit 7 www.national.com DS91M124 30049818 FIGURE 7. Driver Propagation Delays and Transition Time Waveforms 30049819 FIGURE 8. Driver TRI-STATE Delay Test Circuit 30049821 FIGURE 9. Driver TRI-STATE Delay Waveforms www.national.com 8 DS91M124 Typical Performance Characteristics 30049850 30049852 Driver Rise Time as a Function of Temperature Driver Propagation Delay (tPLHD) as a Function of Temperature 30049851 Driver Fall Time as a Function of Temperature 30049853 Driver Propagation Delay (tPHLD) as a Function of Temperature 30049858 Driver Output Signal Amplitude as a Function of Resistive Load 30049854 Driver Power Supply Current as a Function of Frequency 9 www.national.com DS91M124 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead (0.150″ Wide) Molded Small Outline Package, JEDEC Order Number DS91M124TMA NS Package Number M16A www.national.com 10 DS91M124 Notes 11 www.national.com DS91M124 125 MHz 1:4 M-LVDS Repeater with LVCMOS Input Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage Reference www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Solutions www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic Wireless (PLL/VCO) www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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