DYNEX DCR2040L40

DCR2040L42
Phase Control Thyristor
Preliminary Information
DS5960-1 February 2010 (LN27056)
FEATURES
KEY PARAMETERS
Double Side Cooling
High Surge Capability
VDRM
IT(AV)
ITSM
dV/dt*
dI/dt
4200V
2040A
29000A
1500V/µs
400A/µs
APPLICATIONS
* Higher dV/dt selections available
High Power Drives
High Voltage Power Supplies
Static Switches
VOLTAGE RATINGS
Part and
Ordering
Number
Repetitive Peak
Voltages
VDRM and VRRM
V
DCR2040L42
DCR2040L40
DCR2040L35
4200
4000
3500
Conditions
Tvj = -40°C to 125°C,
IDRM = IRRM = 200mA,
VDRM, VRRM tp = 10ms,
VDSM & VRSM =
VDRM & VRRM + 100V
respectively
Lower voltage grades available.
Outline type code: L
ORDERING INFORMATION
When ordering, select the required part number
shown in the Voltage Ratings selection table.
(See Package Details for further information)
Fig. 1 Package outline
For example:
DCR2040L42
Note: Please use the complete part number when ordering
and quote this number in any future correspondence
relating to your order.
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DCR2040L42
SEMICONDUCTOR
CURRENT RATINGS
Tcase = 60°C unless stated otherwise
Symbol
Parameter
Test Conditions
Max.
Units
2040
A
Double Side Cooled
IT(AV)
Mean on-state current
IT(RMS)
RMS value
-
3204
A
Continuous (direct) on-state current
-
2965
A
IT
Half wave resistive load
SURGE RATINGS
Symbol
ITSM
2
It
Parameter
Surge (non-repetitive) on-state current
Test Conditions
Max.
Units
10ms half sine, Tcase = 125°C
29
kA
VR = 0
4.2
MA s
Min.
Max.
Units
2
I t for fusing
2
THERMAL AND MECHANICAL RATINGS
Symbol
Rth(j-c)
Rth(c-h)
Parameter
Thermal resistance – junction to case
Thermal resistance – case to heatsink
Test Conditions
Double side cooled
DC
-
0.0117
°C/W
Single side cooled
Anode DC
-
0.0187
°C/W
Cathode DC
-
0.0329
°C/W
Double side
-
0.0025
°C/W
-
0.005
°C/W
-
125
°C
Clamping force 37kN
(with mounting compound)
Blocking VDRM / VRRM
Single side
Tvj
Virtual junction temperature
Tstg
Storage temperature range
-55
125
°C
Fm
Clamping force
33.0
41.0
kN
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DCR2040L42
SEMICONDUCTOR
DYNAMIC CHARACTERISTICS
Symbol
IRRM/IDRM
Parameter
Test Conditions
Min.
Max.
Units
Peak reverse and off-state current
At VRRM/VDRM, Tcase = 125°C
-
200
mA
dV/dt
Max. linear rate of rise of off-state voltage
To 67% VDRM, Tj = 125°C, gate open
-
1500
V/µs
dI/dt
Rate of rise of on-state current
From 67% VDRM to 2x IT(AV)
-
200
200
A/µs
Gate source 30V, 10,
-
400
400
A/µs
tr < 0.5µs, Tj = 125°C
VT(TO)
rT
tgd
Threshold voltage – Low level
500A to 2000A at Tcase = 125°C
-
0.9
V
Threshold voltage – High level
2000A to 7000A at Tcase = 125°C
-
1.08
V
On-state slope resistance – Low level
500A to 2000A at Tcase = 125°C
-
0.36
m
On-state slope resistance – High level
2000A to 7000A at Tcase = 125°C
-
0.265
m
VD = 67% VDRM, gate source 30V, 10
-
3
µs
250
500
µs
1000
3000
µC
Delay time
tr = 0.5µs, Tj = 25°C
tq
Turn-off time
Tj = 125°C, VR = 200V, dI/dt = 1A/µs,
dVDR/dt = 20V/µs linear
QS
Stored charge
IT = 2000A, Tj = 125°C, dI/dt – 1A/µs,
IL
Latching current
Tj = 25°C, VD = 5V
-
3
A
IH
Holding current
Tj = 25°C, RG-K = , ITM = 500A, IT = 5A
-
300
mA
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DCR2040L42
SEMICONDUCTOR
GATE TRIGGER CHARACTERISTICS AND RATINGS
Symbol
Parameter
Test Conditions
Max.
Units
VGT
Gate trigger voltage
VDRM = 5V, Tcase = 25°C
1.5
V
VGD
Gate non-trigger voltage
At VDRM, Tcase = 125°C
0.4
V
IGT
Gate trigger current
VDRM = 5V, Tcase = 25°C
250
mA
IGD
Gate non-trigger current
VDRM = 5V, Tcase = 25°C
10
mA
CURVES
7000
Instantaneous on-state current, I T - (A)
min 125°C
max 125°C
6000
min 25°C
max 25°C
5000
4000
3000
2000
1000
0
0.5
1.0
1.5
2.0
2.5
3.0
Instantaneous on-state voltage, VT - (V)
Fig.2 Maximum & minimum on-state characteristics
VTM EQUATION
VTM = A + Bln (IT) + C.IT+D.IT
Where
A = 0.137154
B = 0.132631
C = 0.000248
D = -0.001126
these values are valid for Tj = 125°C for IT 100A to 7000A
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DCR2040L42
SEMICONDUCTOR
16
180
120
90
60
30
Mean power dissipation - (kW)
14
12
130
180
120
90
60
30
120
110
Maximum case temperature, T case ( o C )
10
8
6
4
2
100
90
80
70
60
50
40
30
20
10
0
0
0
1000
2000
3000
0
4000
Mean on-state current, IT(AV) - (A)
Mean on-state current, IT(AV) - (A)
Fig.3 On-state power dissipation – sine wave
180
120
90
60
30
100
Fig.4 Maximum permissible case temperature,
double side cooled – sine wave
12
10
Mean power dissipation - (kW)
Maximum heatsink temperature, THeatsink - ( °C)
125
500 1000 1500 2000 2500 3000 3500
75
50
8
6
4
d.c.
180
120
90
60
30
2
25
0
0
0
0
500 1000 1500 2000 2500
Mean on-state current, IT(AV) - (A)
3000
Fig.5 Maximum permissible heatsink temperature,
double side cooled – sine wave
1000
2000
3000
4000
5000
Mean on-state current, IT(AV) - (A)
Fig.6 On-state power dissipation – rectangular wave
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DCR2040L42
SEMICONDUCTOR
Maximum permissible case temperature , Tcase -(°C)
130
d.c.
180
120
90
60
30
120
110
100
90
125
Maximum heatsink temperature Theatsink -( o C)
80
70
60
50
40
30
20
10
d.c.
180
120
90
60
30
100
75
50
25
0
0
0
0
1000
2000
3000
4000
1000
Fig.7 Maximum permissible case temperature,
double side cooled – rectangular wave
4000
Fig.8 Maximum permissible heatsink temperature,
double side cooled – rectangular wave
35
Thermal Impedance, Z thj-c ( °C/kW)
3000
Mean on-state current, IT(AV ) - (A)
Mean on-state current, IT(AV) - (A)
30
2000
5000
Double side cooled
Ti (s)
Double Side Cooling
Anode Side Cooling
Cathode Sided Cooling
Anode side cooled
3
4.2073
0.008639
0.0533503
0.3309504
1.612
0.9647
2.8312
4.9433
9.909
0.0096096
0.0627037
0.4198958
8.908
0.9285
2.9366
2.3581
26.683
0.0093033
0.0621535
0.3092235
5.835
Ri (°C/kW)
Ti (s)
25
2
2.6074
Ri (°C/kW)
Ti (s)
Cathode side cooled
1
0.8342
Ri (°C/kW)
4
4.041
Zth = [Ri x ( 1-exp. (t/ti))]
20
Rth(j-c) Conduction
15
Tables show the increments of thermal resistance R th(j-c) when the device
operates at conduction angles other than d.c.
10
Double side cooling
Zth (z)
5
0
0.001
0.01
0.1
1
10
100
°
180
120
90
60
30
15
sine.
1.45
1.68
1.93
2.16
2.34
2.42
rect.
0.98
1.40
1.64
1.90
2.19
2.34
Anode Side Cooling
Zth (z)
°
180
120
90
60
30
15
sine.
1.43
1.66
1.90
2.12
2.30
2.37
rect.
0.97
1.39
1.62
1.88
2.15
2.30
Cathode Sided Cooling
Zth (z)
°
180
120
90
60
30
15
sine.
1.44
1.66
1.91
2.14
2.31
2.39
rect.
0.97
1.39
1.63
1.89
2.17
2.31
Time ( s )
Fig.9 Maximum (limit) transient thermal impedance – junction to case (°C/kW)
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DCR2040L42
SEMICONDUCTOR
100
20
100
70
ITSM
14
2
12
50
10
2
It
40
8
30
6
20
4
10
2
0
10
1
10
0
1
100
10
100
Pulse width, tP - (ms)
Number of cycles
Fig.10 Multi-cycle surge current
Fig.11 Single-cycle surge current
14000
500
QS (max) =
450
Reverse recovery current, IRR - (A)
2524.7*(di/dt)0.5257
12000
Stored Charge, QS - (uC)
16
2
Surge current, I TSM - (kA)
Surge current, ITSM- (kA)
80
60
18
Conditions:
Tcase= 125°C
VR = 0
half-sine wave
I t (MA s)
90
Conditions:
Tcase = 125°C
V R =0
Pulse w idth = 10ms
QS (min)=
10000
1046.8*(di/dt)0.659
8000
6000
Conditions:
o
Tj=125 C, VRpeak ~ 2500V
VRM ~1700V
snubber as appropriate to
control reverse voltages
4000
2000
IRRmax = 42.033*(di/dt)0.7538
400
350
300
250
IRRmin =
26.684*(di/dt)0.827
200
150
Conditions:
Tj=125oC, VRpeak ~ 2500V
VRM ~1700V
snubber as appropriate to
control reverse voltages
100
50
0
0
10
20
30
Rate of decay of on-state current, di/dt - (A/us)
Fig.12 Reverse recovery charge
0
0
10
20
30
Rate of decay of forward current, di/dt - (A/us)
Fig.13 Reverse recovery current
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DCR2040L42
SEMICONDUCTOR
10
9
Pulse
Width us
100
200
500
1000
10000
Gate trigger voltage, VGT - (V)
8
7
Pulse Power PGM (Watts)
Frequency Hz
50
100
150
150
150
150
150
150
150
100
20
-
400
150
125
100
25
-
Upper Limit
6
5
Preferred gate drive area
4
3
2
o
1
Tj = -40oC
Tj = 25oC
Lower Limit
Tj = 125 C
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Gate trigger current IGT, - (A)
Fig14 Gate Characteristics
30
Lower Limit
Upper Limit
5W
10W
20W
50W
100W
150W
-40C
Gate trigger voltage, VGT - (V)
25
20
15
10
5
0
0
1
2
3
4
5
6
7
8
9
10
Gate trigger current, IGT - (A)
Fig. 15 Gate characteristics
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DCR2040L42
SEMICONDUCTOR
PACKAGE DETAILS
For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise.
DO NOT SCALE.
3rd ANGLE PROJECTION
DO NOT SCALE
IF IN DOUBT ASK
HOLE Ø3.60 X 2.00
DEEP (IN BOTH
ELECTRODES)
20° OFFSET (NOM.)
TO GATE TUBE
Maximum Minimum
Thickness Thickness
Device
(mm)
(mm)
DCR1374SBA18
34.515
33.965
DCR1375SBA28
34.59
34.04
DCR1376SBA36
34.82
34.27
DCR2690L22
34.515
33.965
DCR2480L28
34.59
34.04
DCR2040L42
34.82
34.27
DCR1850L52
34.94
34.39
DCR1570L65
35.2
34.65
DCR1300L85
35.56
35.01
Ø98.9 MAX.
Ø62.85 NOM.
Ø1.5
CATHODE
GATE
ANODE
Ø62.85 NOM.
FOR PACKAGE HEIGHT
SEE TABLE
Lead length: 420mm
Lead terminal connector: M4 ring
Package outline type code: L
Fig.16 Package outline
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DCR2040L42
SEMICONDUCTOR
Stresses above those listed in this data sheet may cause permanent damage to the device. In extreme conditions, as with all
semiconductors, this may include potentially hazardous rupture of the package. Appropriate safety precautions should always be
followed.
HEADQUARTERS OPERATIONS
CUSTOMER SERVICE
DYNEX SEMICONDUCTOR LIMITED
Doddington Road, Lincoln, Lincolnshire, LN6 3LF
United Kingdom.
Phone: +44 (0) 1522 500500
Fax: +44 (0) 1522 500550
Web: http://www.dynexsemi.com
Phone: +(0) 1522 502753 / 502901
Fax: +(0) 1522 500020
e-mail: [email protected]
Dynex Semiconductor 2003 TECHNICAL DOCUMENTATION – NOT FOR RESALE. PRODUCED IN UNITED KINGDOM.
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or
contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or
suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible
methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to
fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These
products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided
subject to the Company’s conditions of sale, which are available on request.
All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners
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