SN74ABT541B-Q1 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS762A − JUNE 2003 − REVISED JANUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D PW PACKAGE (TOP VIEW) MIL-STD-883, Method 3015; Exceeds 150 V Using Machine Model (C = 200 pF, R = 0) State-of-the-Art EPIC-ΙΙB ™ BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C High-Impedance State During Power Up and Power Down High-Drive Outputs (−32-mA IOH, 64-mA IOL) OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 description The SN74ABT541B octal buffer and line driver is ideal for driving bus lines or buffering memory address registers. The device features inputs and outputs on opposite sides of the package to facilitate printed circuit board layout. The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2) input is high, all eight outputs are in the high-impedance state. When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION† −40°C to 85°C ORDERABLE PART NUMBER PACKAGE‡ TA TSSOP − PW Tape and reel TOP-SIDE MARKING SN74ABT541BIPWRQ1 AB541IQ1 † For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ‡ Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. FUNCTION TABLE INPUTS OE1 OE2 A OUTPUT Y L L L L L L H H H X X Z X H X Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC-ΙΙB is a trademark of Texas Instruments Incorporated. Copyright © 2008, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74ABT541B-Q1 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS762A − JUNE 2003 − REVISED JANUARY 2008 logic symbol† OE1 OE2 A1 A2 A3 A4 A5 A6 A7 A8 † 1 logic diagram (positive logic) & OE1 EN OE2 19 2 1 18 3 17 4 16 5 15 6 14 7 13 8 12 9 11 A1 1 19 2 18 Y1 Y1 Y2 Y3 To Seven Other Channels Y4 Y5 Y6 Y7 Y8 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . . −0.5 V to 5.5 V Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Package thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace length of zero. recommended operating conditions (see Note 3) MIN MAX 4.5 5.5 UNIT VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current −32 mA IOL Low-level output current 64 mA TA Operating free-air temperature 85 °C 2 −40 V V NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74ABT541B-Q1 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS762A − JUNE 2003 − REVISED JANUARY 2008 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK TA = 25°C TEST CONDITIONS TYP† MIN MIN MAX VCC = 4.5 V, II = −18 mA VCC = 4.5 V, IOH = −3 mA 2.5 2.5 VCC = 5 V, IOH = −3 mA 3 3 VCC = 4.5 V IOH = −32 mA 2 2 VCC = 4.5 V IOL = 64 mA II VCC = 5.5 V, VI = VCC or GND IOZPU VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X IOZPD VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X IOZH VCC = 5.5 V, VO = 2.7 V IOZL VCC = 5.5 V, VO = 0.5 V Ioff VCC = 0, VI or VO ≤ 4.5 V ICEX VCC = 5.5 V, VO = 5.5 V Outputs high IO‡ VCC = 5.5 V, VO = 2.5 V VOH VOL −1.2 Vhys MAX UNIT −1.2 V V 0.55 0.55 ±1 ±1 μA ±50 ±50 μA ±50 ±50 μA 10 10 μA −10 −10 μA ±100 ±100 μA 50 50 μA −180 mA 100 ICC VCC = 5.5 V, IO = 0, VI = VCC or GND −50 V mV −140 −180 Outputs high 5 250 −50 250 μA Outputs low 22 30 30 mA 1 250 250 μA Outputs enabled 1.5 1.5 mA Outputs disabled 50 50 μA 1.5 1.5 mA Outputs disabled ΔICC§ VCC = 5 5.5 5V V, O One iinputt att 3 3.4 4V V, Other inputs at VCC or GND Ci VI = 2.5 V or 0.5 V 3 pF Co VO = 2.5 V or 0.5 V 6 pF Control inputs † All typical values are at VCC = 5 V. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. § This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V CC or GND. switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A Y OE Y OE Y tsk(o)¶ ¶ VCC = 5 V, TA = 25°C MIN MAX 3.2 1 3.6 2.6 3.5 1 3.9 MIN TYP MAX 1 2 1 2 3.5 4.5 2 4 1.9 4 5.1 1.9 5.9 2.2 4.4 5.4 2.2 5.8 1.5 3 4 1.5 4.4 0.5 0.5 UNIT ns ns ns ns Skew between any two outputs of the same package switching in the same direction POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74ABT541B-Q1 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCBS762A − JUNE 2003 − REVISED JANUARY 2008 PARAMETER MEASUREMENT INFORMATION 500 Ω From Output Under Test S1 7V Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 3V th 3V 1.5 V Input 1.5 V 0V Data Input 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH tPHL 1.5 V 1.5 V VOL tPHL 1.5 V 1.5 V tPLZ 3.5 V 1.5 V tPZH 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V Output Waveform 1 S1 at 7 V (see Note B) tPLH VOH Output 3V Output Control tPZL VOH Output 1.5 V Output Waveform 2 S1 at Open (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH − 0.3 V VOH ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 18-Dec-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing SN74ABT541BIPWRQ1 ACTIVE TSSOP PW Pins Package Eco Plan (2) Qty 20 2000 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-3-260C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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