NSC LM34919B_1

National Semiconductor
Application Note 2016
Dennis Morgan
May 27, 2010
Introduction
The board’s specification are:
• Input Voltage: 6V to 24V
• Output Voltage: 3.3V
• Maximum load current: 600 mA
• Minimum load current: 0A
• Current Limit: 780 mA to 815 mA
• Measured Efficiency: 88.7% (VIN = 6V, IOUT = 300 mA)
• Nominal Switching Frequency: 1.5 MHz
• Size: 2.6 in. x 1.6 in. x 0.5 in
The LM34919BEVAL evaluation board provides the design
engineer with a fully functional buck regulator, employing the
constant on-time (COT) operating principle. This evaluation
board provides a 3.3V output over an input range of 6V to 24V.
The circuit delivers load currents to 600 mA, with current limit
set at a nominal 800 mA. The board is populated with all
components except R5, C9 and C10. These components provide options for managing the output ripple as described later
in this document.
LM34919B Evaluation Board
LM34919B Evaluation Board
30110020
FIGURE 1. Evaluation Board - Top Side
Theory of Operation
Refer to the evaluation board schematic in Figure 1, which
contains a simplified block diagram of the LM34919B. When
the circuit is in regulation, the buck switch is on each cycle for
a time determined by R1 and VIN according to the equation:
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301100
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The on-time of this evaluation board ranges from ≊424 ns at
VIN =6V, to ≊129 ns at VIN = 24V. The on-time varies in-
versely with VIN to maintain a nearly constant switching frequency. At the end of each on-time the Minimum Off-Timer
ensures the buck switch is off for at least 88 ns. In normal
operation, the off-time is much longer. During the off-time, the
load current is supplied by the output capacitor (C7, C8).
When the output voltage falls sufficiently that the voltage at
FB is below 2.5V, the regulation comparator initiates a new
on-time period. For stable, fixed frequency operation, a minimum of 25 mV of ripple is required at FB to switch the
regulation comparator. The current limit threshold is ≊780 mA
at Vin = 6V, and ≊812 mA at Vin = 24V. The variation is due
to the change in ripple current amplitude as Vin varies. Refer
to the LM34919B data sheet for a more detailed block dia-
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gram, and a complete description of the various functional
blocks.
be monitored with an ammeter or a current probe. It is recommended that the input voltage be increased gradually to
6V, at which time the output voltage should be 3.3V. If the
output voltage is correct with 6V at VIN, then increase the
input voltage as desired and proceed with evaluating the circuit. DO NOT EXCEED 40V AT VIN.
Board Layout and Probing
The pictorial in Figure 1 shows the placement of the circuit
components. The following should be kept in mind when the
board is powered:
1) The LM34919B, and diode D1 may be hot to the touch
when operating at high input voltage and high load current.
2) Use CAUTION when probing the circuit at high input voltages to prevent injury, as well as possible damage to the
circuit.
3) At maximum load current (0.6A), the wire size and length
used to connect the load becomes important. Ensure there is
not a significant drop in the wires between this evaluation
board and the load.
Output Ripple Control
The LM34919B requires a minimum of 25 mVp-p ripple at the
FB pin, in phase with the switching waveform at the SW pin,
for proper operation. The required ripple can be supplied from
ripple at VOUT, through the feedback resistors as described in
Options A and B below, or the ripple can be generated separately (using R5, C9, and C10) in order to keep the ripple at
VOUT at a minimum (Option C).
Option A) Lowest Cost Configuration: This evaluation
board is supplied with R4 installed in series with the output
capacitance (C7, C8). R4 is chosen to generate ≥25 mVp-p
at VOUT, knowing that the minimum ripple current in this circuit
is ≊140 mAp-p at minimum VIN. Using 0.27Ω for R4, the ripple
at VOUT ranges from ≊37 mVp-p to ≊88 mVp-p over the input
voltage range. If the application can accept this ripple level,
this is the most economical solution. The circuit is shown in
Figure 2. See Figure 8.
Board Connection/Start-up
The input connections are made to the J1 connector. The load
is connected to the J2 (OUT) and J3 (GND) terminals. Ensure
the wires are adequately sized for the intended load current.
Before start-up a voltmeter should be connected to the input
terminals, and to the output terminals. The load current should
30110003
FIGURE 2. Lowest Cost Configuration
Option B) Intermediate Ripple Configuration: This configuration generates less ripple at VOUT than option A above by
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the addition of one capacitor (Cff) across R2, as shown in
Figure 3.
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30110004
FIGURE 3. Intermediate Ripple Configuration
Since the output ripple is passed by Cff to the FB pin with little
or no attenuation, R4 can be reduced so the minimum ripple
at VOUT is ≊25 mVp-p. The minimum value for Cff is calculated
from:
1) Calculate the voltage VA:
VA = VOUT – (VSW x (1 – (VOUT/VIN)))
where VSW is the absolute value of the voltage at the SW pin
during the off-time (typically 1V), and VIN is the minimum input
voltage. For this circuit, VA calculates to 2.84V. This is the
approximate DC voltage at the R5/C10 junction, and is used
in the next equation.
2) Calculate the R5 x C10 product:
where tON(max) is the maximum on-time (at minimum VIN), and
R2//R3 is the parallel equivalent of the feedback resistors.
See Figure 8.
Option C) Minimum Ripple Configuration: To obtain minimum ripple at VOUT, R4 is set to 0Ω, and R5, C9, and C10 are
added to generate the required ripple for the FB pin. In this
configuration, the output ripple is determined primarily by the
ESR of the output capacitance and the inductor’s ripple current.
The ripple voltage required by the FB pin is generated by R5,
C10, and C9 since the SW pin switches from -1V to VIN, and
the right end of C10 is a virtual ground. The values for R5 and
C10 are chosen to generate a 50-100 mVp-p triangle waveform at their junction. That triangle wave is then coupled to
the FB pin through C9. The following procedure is used to
calculate values for R5, C10 and C9:
where tON is the maximum on-time (≊424 ns), VIN is the minimum input voltage, and ΔV is the desired ripple amplitude at
the R5/C10 junction, 50 mVp-p for this example.
R5 and C10 are then chosen from standard value components to satisfy the above product. Typically C10 is 3000 to
5000 pF, and R5 is 10kΩ to 300 kΩ. C9 is chosen large compared to C10, typically 0.1 µF. See Figure 4 and Figure 8.
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30110008
FIGURE 4. Minimum Output Ripple Configuration
output (VOUT), without using the probe’s ground lead which
can pick up noise from the switching waveforms..
Monitor The Inductor Current
The inductor’s current can be monitored or viewed on a scope
with a current probe. Remove R6, and install an appropriate
current loop across the two large pads where R6 was located.
In this way the inductor’s ripple current and peak current can
be accurately determined.
Minimum Load Current
The LM34919B requires a minimum load current of ≊1 mA to
ensure the boost capacitor (C5) is recharged sufficiently during each off-time. In this evaluation board, the minimum load
current is provided by the feedback resistors allowing the
board’s minimum load current at VOUT to be specified at zero.
Scope Probe Adapters
Scope probe adapters are provided on this evaluation board
for monitoring the waveform at the SW pin, and at the circuit’s
30110009
FIGURE 5. Complete Evaluation Board Schematic
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4
Item
Description
Mfg., Part Number
Package
Value
C1
Ceramic Capacitor
TDK C3216X7R1H105M
1206
1.0 µF, 50V
C2
Ceramic Capacitor
TDK C3216X7R1H105M
1206
1.0 µF, 50V
C3
Ceramic Capacitor
TDK C1608X7R1H104K
0603
0.1 µF, 50V
C4
Ceramic Capacitor
TDK C1608X7R1H104K
0603
0.1 µF, 50V
C5
Ceramic Capacitor
TDK C1608X7R1H223K
0603
0.022 µF, 50V
C6
Ceramic Capacitor
TDK C1608X7R1H223K
0603
0.022 µF, 50V
C7, C8
Ceramic Capacitor
TDK C3216X7R1C106K
1206
10 µF, 16V
C9
Ceramic Capacitor
Unpopulated
0603
C10
Ceramic Capacitor
Unpopulated
0603
D1
Schottky Diode
Zetex ZLLS2000
SOT23-6
40V, 2.2A
L1
Power Inductor
Bussman DR74-8R2–R
7.6 mm x 7.6 mm
8.2 µH, 2.5A
R1
Resistor
Vishay CRCW060328KOFK
0603
28 kΩ
R2
Resistor
Vishay CRCW0603787RFK
0603
787 Ω
R3
Resistor
Vishay CRCW06032K49FK
0603
2.49 kΩ
R4
Resistor
Panasonic ERJ3RQFR27
0603
0.27Ω
R5
Resistor
Unpopulated
0603
R6
Resistor
Vishay CRCW08050000Z
0805
U1
Switching Regulator
National Semiconductor
LM34919BTL
10 Bump µSMD
5
0Ω Jumper
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Bill of Materials
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Circuit Performance
30110010
FIGURE 6. Efficiency vs Load Current
30110011
FIGURE 7. Efficiency vs Input Voltage
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30110012
FIGURE 8. Output Voltage Ripple
30110013
FIGURE 9. Switching Frequency vs. Input Voltage
30110014
FIGURE 10. Load Current Limit vs Input Voltage
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Typical Waveforms
30110015
Trace 2= VOUT
Trace 4= inductor Current
Trace 1= SW Pin
Vin = 24V, Iout = 400 mA
FIGURE 11. Continuous Conduction Mode
30110016
Trace 2= VOUT
Trace 4= inductor Current
Trace 1= SW Pin
Vin = 24V, Iout = 20 mA
FIGURE 12. Discontinuous Conduction Mode
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PC Board Layout
30110017
Board Silkscreen
30110018
Board Top Layer
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30110019
Board Bottom Layer (Viewed from Top)
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LM34919B Evaluation Board
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