NSC LM21212-1

National Semiconductor
Application Note 2107
Michael Hartshorne
March 21, 2011
Introduction
The LM21212-1 evaluation board has been optimized to work
from 2.95V to 5.5V, achieving a balance between overall solution size and regulator efficiency. The evaluation board
measures just under 2” x 2” on a four layer PCB, and exhibits
a junction-to-ambient thermal impedance (θJA) of 24°C/W
with no air flow. The power stage and compensation components of the LM21212-1 evaluation board have been optimized for an input voltage of 5V, but for testing purposes, the
input can be varied across the entire operating range. The
output voltage of the evaluation board is nominally 1.2V, but
this voltage can be easily changed to any voltage between
0.6V and VIN by modifying the feedback resistor network.
This evaluation board provides a solution to examine the high
efficiency LM21212-1 buck switching regulator. The
LM21212-1 is capable of driving up to 12A of continuous load
current with excellent output voltage accuracy due to its ±1%
internal reference. This device also features a clock synchronization input that allows the switching frequency to be synchronized to an external clock source. The 300 kHz to 1.5
MHz frequency synchronization range enables the user to
minimize the power stage component size, while still allowing
for high efficiency. The LM21212-1 is capable of down converting from an input voltage between 2.95V and 5.5V. Fault
protection features include current limit, output power good,
and output over-voltage protection. The dual function softstart/tracking pin can be used to control the startup response
of the LM21212-1, and the precision enable pin can be used
to easily sequence the LM21212-1 in applications with sequencing requirements.
LM21212-1 Evaluation Board
LM21212-1 Evaluation
Board
Evaluation Board Schematic
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© 2011 National Semiconductor Corporation
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Powering and Loading
Considerations
Step 7: The frequency of operation can be varied as desired
by connecting a 2.0V square-wave positive signal between
SYNC and GND.
Read this entire page prior to attempting to power the evaluation board.
POWERING UP
It is suggested that the load power be kept low during the first
power up. Once the device is powered up, immediately check
for 1.2V at the output.
A quick efficiency check is the best way to confirm that everything is operating properly. If something is amiss you can
be reasonably sure that it will affect the efficiency adversely.
Few parameters can be incorrect in a switching power supply
without creating losses and potentially damaging heat.
Some voltage supplies can exhibit severe voltage overshoot
during high current transients. If a supply overshoots above
6.0V, damage to the LM21212-1 can occur. For these supplies, a large capacitor across the terminals of the supply
(1000µF) can alleviate this problem.
QUICK SETUP PROCEDURE
Step 1: Set the input source current limit to 10A. Turn off the
input source. Connect the positive output of the input source
to VIN and the negative output to the corresponding GND.
Step 2: Connect the load (with 12A capability) to VOUT for the
positive connection and GND for the negative connection.
Step 3: The ENABLE pin should be left open for normal operation.
Step 4: Set the input source voltage to 5V. The load voltage
should be in regulation with a nominal 1.2V output.
Step 5: Slowly increase the load while monitoring the load
voltage at VOUT. It should remain in regulation with a nominal
1.2V output as the load is increased up to 12A.
Step 6: Slowly sweep the input source voltage from 2.95V to
5.5V. The load voltage should remain in regulation with a
nominal 1.2V output. If desired, the output of the device can
be disabled by connecting the ENABLE pin to GND.
OVER CURRENT PROTECTION
The evaluation board is configured with over-current protection. This function is completely contained in the LM21212-1.
The peak current is limited to approximately 17A.
Connection Descriptions
Terminal Silkscreen
Description
VIN
This terminal is the input voltage to the device. The evaluation board will operate over the input voltage
range of 2.95V to 5.5V.
GND
These terminals are the ground connections to the device. The input power ground should be connected
next to the input VIN connection, and the output power ground next to the VOUT connection.
VOUT
This terminal connects to the output voltage of the power supply and should be connected to the load.
ENABLE
This terminal connects to the enable pin of the device. This terminal can be left floating or driven
externally. If left floating, a 2µA current source will pull the pin high, thereby enabling the device. If driven
externally, a voltage typically less than 1.2V will disable the device.
SS/TRK
This terminal provides access to the SS/TRK pin of the device. Connections to this terminal are not
needed for most applications. The feedback pin of the device will track the voltage on the SS/TRK pin
if it is driven with an external voltage source that is below the 0.6V reference.
PGOOD
This terminal connects to the power good output of the device. This pin is pulled up through a 10 kΩ
pull-up resistor to VIN.
AC INJ
This terminal block allows the user to insert an AC injection signal across a 49.9Ω resistor for openloop gain bode measurements. A jumper shorts out this resistor when it is not needed.
SWITCH
This terminal allows easy probing of the switch node. Do not apply any external voltage source to this
pin.
SYNC
This terminal connects to the SYNC pin of the device. The LM21212-1 can sychronize the SWITCH pin
to a SYNC signal with a frequency between 300kHz and 1.5MHz. If this pin is left open, the switching
frequency will default to 1MHz.
VIN_SENSE+,
VIN_SENSEVOUT_SENSE+,
VOUT_SENSE-
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These terminals allow a sense connection on the board for accurate VIN and VOUT measurements,
respectively.
2
EFFICIENCY PLOTS
Figure 1 shows the conversion efficiency versus output current for a 5V input voltage for 500kHz, 1MHz, and 1.5MHz
fSW.
96
500kHz
1MHz
1.5MHz
EFFICIENCY (%)
94
92
90
88
86
84
82
80
0
2
4
6
8
10
OUTPUT CURRENT (A)
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12
FIGURE 3. (1 µs/DIV)
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FIGURE 1.
PRIMARY SWITCHNODE WAVEFORM
Figure 4 shows the typical SW pin voltage while synchronizing
to an external source.
TURN-ON WAVEFORM
A soft-start sequence occurs when applying power to the
LM21212-1 evaluation board. Figure 2 shows the output voltage during a typical start-up sequence.
30144805
FIGURE 4. (1 µs/DIV)
30144803
FIGURE 2. (2 ms/DIV)
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OUTPUT RIPPLE WAVEFORM
Figure 3 shows the output voltage ripple. This measurement
was taken with the scope probe tip placed on the output capacitor C9 VOUT connection and the scope probe ground
"barrel" wired to the GND connection of C9. The scope bandwidth is set to 20 MHz.
Performance Characteristics
100
160
120
60
100
40
80
60
20
40
0
-20
100
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FIGURE 5. (100 µs/DIV)
20
GAIN
PHASE MARGIN
1k
10k
100k
FREQUENCY (Hz)
PHASE MARGIN (°)
140
80
GAIN (dB)
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OPEN LOOP BODE RESPONSE
Figure 7 shows the open loop bode response generated by
inserting a stimulus signal across RAC and using a network
analyzer to plot the gain and phase.
OUTPUT TRANSIENT RESPONSE
Figure 5 shows the VOUT deviation for a 3A to 12A output current transient condition.
0
1M
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OUTPUT CURRENT LIMIT
Figure 6 shows the VOUT output response to an output current
limit condition.
FIGURE 7.
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FIGURE 6. (100 µs/DIV)
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Bill of Materials
The Bill of Materials is shown below, including the manufacturer and part number.
ID
DESCRIPTION
VENDOR
AC INJ
Header, TH, 100mil, 2x1, Gold
plated, 230 mil above insulator
Samtec Inc.
C1
CAP, CERM, 1 uF, 10V, +/-10%, MuRata
X7R, 0603
PART NUMBER
QUANTITY
TSW-102-07-G-S
1
GRM188R71A105KA61D
1
C3, C4, C5, C6, C7, CAP, CERM, 100 uF, 6.3V,
C8
+/-20%, X5R, 1206
MuRata
GRM31CR60J107ME39L
6
C9
CAP, CERM, 0.1 uF, 50V,
+/-10%, X7R, 0603
TDK
C1608X7R1H104K
1
CC1
CAP, CERM, 2700 pF, 50V,
+/-5%, C0G/NP0, 0603
MuRata
GRM1885C1H272JA01D
1
CC2
CAP, CERM, 82 pF, 50V, +/-5%, MuRata
C0G/NP0, 0603
GRM1885C1H820JA01D
1
CC3
CAP, CERM, 820 pF, 50V, +/-5%, MuRata
C0G/NP0, 0603
GRM1885C1H821JA01D
1
CSS
CAP, CERM, 0.033 uF, 16V,
+/-10%, X7R, 0603
MuRata
GRM188R71C333KA01D
1
GND_FI, GND_FO, Standard Banana Jack,
VIN_F, VOUT_F
Uninsulated, 15A
Johnson
Components
108-0740-001
4
L1
Inductor, Shielded Drum Core,
Powdered Iron, 560nH, 27.5A,
0.0018 ohm, SMD
Vishay-Dale
IHLP4040DZERR56M01
1
R1
RES, 1.0 ohm, 5%, 0.1W, 0603
Vishay-Dale
CRCW06031R00JNEA
1
RAC
RES, 49.9 ohm, 1%, 0.1W, 0603 Vishay-Dale
CRCW060349R9FKEA
1
RC1
RES, 7.32 kohm, 1%, 0.1W, 0603 Vishay-Dale
CRCW06037K32FKEA
1
RC2
RES, 165 ohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW0603165RFKEA
1
RFB1, RFB2, RPG
RES, 10 kohm, 1%, 0.1W, 0603
Vishay-Dale
CRCW060310K0JKEA
3
SH-J1
Shunt, 100mil, Gold plated, Black Samtec Inc.
SNT-100-BK-G
1
U1
12A Buck DC/DC Converter
LM21212MH-1
1
National
Semiconductor
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ple (ΔIP-P) the output voltage ripple can be approximated by
the equation:
Component Selection
This section provides a walk-through of the design process of
the LM21212-1 evaluation board. Unless otherwise indicated
all equations assume units of amps (A) for current, farads (F)
for capacitance, henries (H) for inductance, and volts (V) for
voltages.
The variable RESR above refers to the ESR of the output capacitor. As can be seen in the above equation, the ripple
voltage on the output can be divided into two parts, one of
which is attributed to the AC ripple current flowing through the
ESR of the output capacitor and another due to the AC ripple
current actually charging and discharging the output capacitor. The output capacitor also has an effect on the amount of
droop that is seen on the output voltage in response to a load
transient event.
For the evaluation board, three 100µF ceramic capacitors
were selected to provide good transient and DC performance.
Ceramic capacitors give the lowest RESR of any standard capacitor chemistries, resulting in the lowest output ripple for the
given ripple current. Ceramic capacitors (especially high capacitance, small package multi-layer types, or MLCC) lose
thier capacitance as the DC voltage is increased. For this
configuration, the actual capacitance value was approximated to be 50 µF per capacitor, or 150 µF total. This is lower
than measured capacitance values for 1.2V, but will allow the
user to change the output voltage up to 3.3V and maintain
stability.
INPUT CAPACITORS: C1, C2, C3
The required RMS current rating of the input capacitor for a
buck regulator can be estimated by the following equation:
The variable D refers to the duty cycle, and can be approximated by:
From this equation, it follows that the maximum ICIN(RMS) requirement will occur at a full 12A load current with the system
operating at 50% duty cycle. Under this condition, the maximum ICIN(RMS) is given by:
SOFT-START CAPACITOR: CSS
A soft-start capacitor can be used to control the startup time
of the LM21212-1 voltage regulator. The startup time of the
regulator when using a soft-start capacitor can be estimated
by the following equation:
Ceramic capacitors feature a very large IRMS rating in a small
footprint, making a ceramic capacitor ideal for this application.
The input capacitors also keep the input stable during load
transient conditions. If the input capacitance is too low, the
input can drop below the UVLO threshold and cause the device to disable the output. This may result in repetitive dropout
and re-enable oscillation, or "motorboating". To give the user
the ability to operate with a low VIN voltage, three 100 µF ceramic capacitors were used on the input.
For the LM21212-1, ISS is nominally 5 µA. For the evaluation
board, the soft-start time has been designed to be roughly 10
ms, resulting in a CSS capacitor value of 33 nF.
INDUCTOR: L1
The value of the inductor was selected to allow the device to
achieve a 5V to 1.2V conversion at 500kHz to provide a peak
to peak ripple current of 3.2A, which is about 27% of the maximum output current. To have an optimized design, generally
the peak to peak inductor ripple current should be kept to
within 20% to 40% of the rated output current for a given input
voltage, output voltage and operating frequency. The peak to
peak inductor ripple current can be calculated by the equation:
COMPENSATION COMPONENTS: CC1, CC2, CC3, RC1, RC2
These components are used in conjunction with the error amplifier to create a type 3 voltage-mode compensation network.
The analysis of type 3 compensation is outside the scope of
this document, but an example of the step-by-step procedure
to generate comensation component values is given. The parameters needed for the compensation values are given in the
table below.
Once an inductance value is calculated, an actual inductor
needs to be selected based on a trade-off between physical
size, efficiency, and current carrying capability. For the
LM21212-1 evaluation board, a Vishay IHLP4040DZERR56M01 inductor offers a good balance between efficiency
(1.8 mΩ DCR) and size.
OUTPUT CAPACITOR: C3, C4, C5, C9
The value of the output capacitor in a buck regulator influences the voltage ripple that will be present on the output
voltage as well as the large signal output voltage response to
a load transient. Given the peak-to-peak inductor current rip-
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Parameter
Value
VIN
5.0V
VOUT
1.2V
IOUT
12A
fCROSSOVER
80 kHz
L
0.56 µH
RDCR
1.8 mΩ
CO
150 µF
RESR
1.0 mΩ
ΔVRAMP
0.8V
fSW
500 kHz
Last, CC3 can be calculated to place a pole at the same frequency as the zero created by the output capacitor ESR.
The standard values used for the above calculations are given
in the Bill of Materials.
FEEDBACK RESISTORS: RFB1, RFB2, and RAC
The resistors labeled RFB1 and RFB2 create a voltage divider
from VOUT to the feedback pin that is used to set the output of
the voltage regulator. Nominally, the output of the LM21212-1
evaluation board is set to 1.2V, giving resistor values of
RFB1= RFB2 = 10kΩ. If a different output voltage is required,
the value of RFB2 can be adjusted according to the equation:
RFB1 does not need to be changed from its value of 10kΩ.
Resistor RAC has a value of 49.9Ω and is provided as an injection point for loop stability measurements, as well as, a way
to further tweak the output voltage accuracy to account for
resistor tolerance values differing from ideal calculated values. The jumper is used to short out RAC when not needed.
PROGRAMMABLE UVLO: REN1 and REN2
The resistors labeled REN1 and REN2 create a voltage divider
from VIN to the enable pin that can be used to enable the device above a programmed VIN, effectively creating a programmable UVLO voltage above the device's internal UVLO
(nominally 2.7V). To allow evaluation of the device down to
2.95V, these components are not installed. To change the
turn-on threshold of the device a 10 kΩ resistor is recommended for REN1 and the value of REN2 can be calculated
using the equation:
Next, the value of CC1 can be calculated by placing a zero at
half of the LC double pole frequency.
Now the value of CC2 can be calculated to place a pole at half
of the switching frequency.
where VTO is the desired VIN voltage at which the device will
enable.
RC2 can then be calculated to set the second zero at the LC
double pole frequency.
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where ΔVRAMP is the oscillator peak-to-peak ramp voltage
(nominally 0.8 V), fCROSSOVER is the frequency at which the
open-loop gain is a magnitude of 1, RDCR is the effective DC
resistance of the inductor, RESR is the effective resistance of
the output capacitor, and CO is the effective output capacitance at the programmed output voltage. It is recommended
that fCROSSOVER not exceed one-fifth of the switching frequency. The output capacitance, CO, depends on capacitor chemistry and bias voltage. For Multi-Layer Ceramic Capacitors
(MLCC), the total capacitance will degrade as the DC bias
voltage is increased. Measuring the actual capacitance value
for the output capacitors at the output voltage is recommended to accurately calculate the compensation network. Note
that it is more conservative, from a stability standpoint, to err
on the side of a smaller output capacitance value in the compensation calculations rather than a larger, as this will result
in a lower bandwidth but increased phase margin.
First, the value of RFB1 should be chosen. A typical value is
10kΩ. From this, the value of RC1 can be calculated to set the
mid-band gain so that the desired crossover frequency is
achieved.
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PCB Layout
The PCB was manufactured with 2oz. copper outer layers, and 1oz. copper inner layers. Twenty 8 mil. diameter vias placed
underneath the device, along with addional vias placed throughout the ground plane around the device, help improve the thermal
dissipation of the board.
30144830
30144832
Top Layer (Copper planes outlined in grey)
Mid Layer2
30144831
30144833
Mid Layer1
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Bottom Layer
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LM21212-1 Evaluation Board
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