Coming Attractions 140 mW Power Amplifier with T/R Switch 2.4 - 2.5 GHz Features ● ● ● ● ● AM55-0007 V 2.00 SSOP-24 Highly Integrated PA/Attenuator and T/R Switch Low Current Consumption: 120 mA Typ. Switch and Attenuator Controls CMOS Compatible High Power (140 mW) and Low Power (16 mW) Transmit Power Control +5 V/-5 V Fixed Supply Voltages Description M/A-COM’s AM55-0007 is a GaAs power amplifier with an integrated transmit/receive switch in a low cost SSOP 24 plastic package. The AM55-0007 employs active bias circuits that eliminate the need for external bias adjustment. A ‘Sleep Mode’ is incorporated which turns off current draw from the positive supply of the PA during receive mode. The AM55-0007 provides a 10-dB step attenuator for use as a transmit power controller. The AM55-0007 is designed for low power consumption and is ideally suited for FSK systems in the 2.4 - 2.5 GHz bands (North American ISM, Japanese RCR.32 and European ETSI). Typical applications include WLAN and wireless portable data collection. This amplifier is also available with diversity switching (AM55-0001). Either power amplifier can be combined with a transceiver IC (MD58-0001) to form a complete RF front end. M/A-COM's AM55-0007 is fabricated using a mature 0.5-micron gate length GaAs process. The process features full passivation for increased performance and reliability. Dimensions are in inches over millimeters. Ordering Information Part Number AM55-0007 AM55-0007TR AM55-0007RTR AM55-0007SMB Description SSOP 24-Lead Plastic Package Forward Tape & Reel * Reverse Tape & Reel * Designer’s Kit specific reel size is required, consult factory for part * Ifnumber assignment. Typical Electrical Specifications Test Conditions: Frequency: 2.45 GHz, VDD = 5 V ±5%, VGG = - 5 V ±5%, TA = +25°C Parameter Power Amplifier Linear Gain VSWR In Output Power Second Harmonic Third Harmonic IDD (V DD1 + VDD2 + VDD PA) T/R Switch Insertion Loss Isolation VSWR In/Out Test Conditions PIN = -3 dBm PIN = -3 dBm High Power Mode Low Power Mode Both Modes High Power Mode Low Power Mode High Power Mode Units Min. Typ. Max. dB dB 23 12 dBm dBm dBc dBc mA 19 8 26.5 16 1.5:1 21.5 12 -25 -17 120 200 dB dB 10 1.2 15 1.5:1 14 0 mW Power Amplifier with T/R Switch AM55- 0007 V 2.00 Absolute Maximum Ratings1 Parameter Max. Input Power 2 Operating Voltages 2,3 Absolute Maximum +23 dBm VDD = 8 V VGG = -8 V Operating Temperature Storage Temperature -40°C to +85°C -65°C to +150°C Truth Table Control Line ATTN T/R SLEEP CTRL CTRL CTRL* X 1 -5 V 0 0 0V 1 0 0V X 1 -5 V Operating Mode Receive High Power Low Power Sleep Mode 1.Exceeding these limits may cause permanent damage. 2. Ambient temperature (TA ) = +25°C 3. |VDD | + |VGG| not to exceed 12 volts. X - Don’t Care “0”= 0 V to 0.2 V @ 100 µA “1” = VDD to V DD -0.2 V @ 200 µA Pin Configuration voltage levels between 0 V and VGG must be used on * Control SLEEP CTRL control line. (Pin 24) Pin No. Pin Name 1 VGG 2 T/R CTRL 3 Rx OUT Description Negative voltage to all active bias networks 0 V for transmit mode, +5 V for receive mode Output of T/R switch for receive mode 4 GND 5 PA OUT Output of T/R switch for transmit mode 6 VDD PA VDD for output stage of PA, VDD for active bias circuit of output stage Functional Diagram and Pin Configuration DC and RF Ground VGG SLEEP CTRL T/R CTRL GND Rx OUT PA IN DC and RF Ground GND GND GND DC and RF Ground PA OUT GND 11 GND DC and RF Ground VDD PA VDD1 12 GND DC and RF Ground GND GND 13 GND DC and RF Ground ATTN CTRL 14 GND DC and RF Ground VDD2 15 GND DC and RF Ground GND GND 16 GND DC and RF Ground GND GND 17 VDD2 VDD for both diversity and T/R switches, VDD for second stage of PA GND GND GND GND 18 GND DC and RF Ground 19 VDD1 VDD for first stage of PA, VDD of active bias for the first and second stage of PA 20 GND DC and RF Ground 21 GND DC and RF Ground 22 PA IN RF input to PA 7 8 GND ATTN CTRL 9 GND 10 23 GND 24 SLEEP CTRL DC and RF Ground 0 V for high power mode, +5 V for low power mode DC and RF Ground 0 V PA "on" mode, -5 V PA "sleep" mode. Sleep mode shuts off active bias and "pinches off" all PA FETs. 14 0 mW Power Amplifier with T/R Switch AM55-0007 V 2.00 Small Signal Power Amplifier1 LINEAR GAIN vs VDD, VGG LINEAR GAIN 28 30 -20°C ±6.0 V 26 26 +25°C 24 22 22 18 20 +70°C 14 ±4.0 V 18 2.0 2.2 2.4 2.6 2.8 2.0 3.0 2.2 2.4 2.6 2.8 3.0 FREQUENCY (GHz) FREQUENCY (GHz) OUTPUT MATCH INPUT MATCH 0 0 -5 -4 -10 -20°C +25°C -15 -20°C -8 +25°C +70°C -20 -30 -12 +70°C -25 2.0 2.2 2.4 2.6 2.8 3.0 -16 2.0 2.2 2.4 2.6 2.8 3.0 2.8 3.0 FREQUENCY (GHz) FREQUENCY (GHz) T/R Switch Small Signal Performance1 RETURN LOSS INSERTION LOSS & ISOLATION 0 0 -1 -5 -2 -10 -3 -15 -4 -20 -15 -25 3.0 -20 0 -5 -5 2.0 2.2 2.4 2.6 FREQUENCY (GHz) 2.8 Output Input -10 2.0 2.2 2.4 2.6 FREQUENCY (GHz) 1. Unless otherwise noted, Frequency: 2.45 GHz, VDD = 5 V ±5%, VGG = - 5 V ±5%, TA = +25°C 14 0 mW Power Amplifier with T/R Switch AM55 -0007 V 2.00 Power Amplifier Power Performance1 POUT vs PIN 24 22 20 18 16 14 12 10 0 -1 -2 -3 -4 -5 -6 -7 Compression -20°C +25°C +70°C -15 -12 -9 -6 -3 0 PIN (dBm) CURRENT DRAW and POWER ADDED EFFICIENCY 160 25 20 140 +70°C +25°C -20°C 15 120 10 +25°C 5 0 100 -20°C 80 +70°C -15 -12 -9 -6 -3 0 60 PIN (dB) 24 22 20 18 16 14 12 10 POUT vs VDD , VGG ±6.0 V ± 4.5 V ± 4.0 V -15 -11 -7 ± 5.5 V ± 5.0 V -3 1 P IN (dBm) 1. Unless otherwise noted, Frequency: 2.45 GHz, VDD = 5 V ±5%, VGG = - 5 V ±5%, TA = +25°C 14 0 mW Power Amplifier with T/R Switch AM55-0007 V 2.00 Recommended PCB Configuration Layout View Cross-Section View RF Traces + Components 0.710 in. RF Ground C7 C3 DC Routing C2 C6 C9 Customer Defined The PCB dielectric between RF traces and RF ground layers should be chosen to reduce RF discontinuities between 50-Ω lines and package pins. M/A-COM recommends an FR-4 dielectric thickness of 0.008 in. (0.2 mm), yielding a 50-Ω line width of 0.015 in. (0.38 mm). The recommended metalization thickness is 1 oz. copper. C8 C4 PIN 1 Shaded traces are vias to DC routing layer and traces on DC routing layer. C5 C1 Biasing Procedure External Circuitry Parts List Label Value Purpose C1 - C4 33 pF Bypass (GHz) C5 - C8 220 pF Bypass (MHz) C9 0.01 µF Bypass (kHz) The AM55-0007 requires the VGG bias be applied prior to any VDD bias. Permanent damage may occur if this procedure is not followed. All FETs in the PA will draw excessive current and damage internal circuitry. All off-chip components are low-cost surface mount components obtainable from multiple sources. (0.020 in.x 0.040 in.or 0.030 in.x 0.050 in.) External Circuitry VGG C5 C1 1 24 2 23 T/R CTRL RX OUT 3 22 4 21 PA OUT 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VDD PA C9 C2 C6 ATTN CTRL SLEEP CTRL PA IN VDD1 C4 C8 C3 C7 V DD2 14 0 mW Power Amplifier with T/R Switch AM55 - 0007 V 2.00 Designer’s Kit (AM55-0007SMB) The AM55-0007SMB Designer's Kit allows for immediate evaluation of M/A-COM's AM55-0007 integrated Power Amplifier with T/R and Diversity Switch. The evaluation board consists of an AM55-0007, recommended external surface mount circuitry, RF connectors and a DC multi-pin connector, all mounted to a multi-layer FR-4 PCB. Other items included in the Designer's Kit: a floppy disk (with typical performance data and a .DXF file of the recommended PCB layout) and any additional Application Notes. The AM55-0007SMB evaluation PCB and block diagram are illustrated below with all functional ports labeled. P/A Switch Sample Board Functional Block Diagram PIN 1 PIN 19 PIN 20 PA OUT PIN 2 PA IN RX OUT (TO REC) 1 PA OUT TO REC. PA IN DC Connector Pinout PCB DC Connector Function Device Pin Number PCB DC Connector Function Device Pin Number 1 VDD1 (+ 5 V) 19 11 Logic High (V DD1) 19 2 VDD2 (+ 5 V) 17 12 T/R Control (0 V/+5 V) 2 3 N/C N/C 13 Logic Low (GND) N/C 4 N/C N/C 14 T/R Control (0 V/+5 V) 2 5 N/C N/C 15 Logic High (V DD1) 19 6 N/C N/C 16 ATTN Control (0 V/+5 V) 8 7 Negative Logic High (GND) N/C 17 Logic Low (GND) N/C 8 PA Control (0 V/-5 V) 24 18 ATTN Control (0 V/+5 V) 8 9 Negative Logic Low (V GG) 1 19 VDD PA (+5 V) 6 10 PA Control (0 V/-5 V) 24 20 VGG ( - 5 V) 1 140 mW Power Amplifier with T/R Switch AM55-0007 V 2.00 PCB DC Connector Jumper Settings Jumpers (Position 2) Jumpers (Position 1) VDD2 VDD1 Pin 2 Pin 2 Pin 1 Pin 1 PA CTL Jumper 1 TR CTL Jumper 1 ATTN Jumper 2 Jumper 2 Jumper 3 Jumper 3 Pin 20 Jumper 1 (PA Sleep Control) Position 1 = PA ON Position 2 = PA Sleep Mode Jumper 2 (T/R Switch Control) Position 1 = Receive Mode Position 2 = Transmit Mode Jumper 3 (Attenuator Control) Position 1 = Attenuator ON (Low Power Transmit) Position 2 = Attenuator OFF (High Power Transmit) AM55-0007SMB Biasing Procedure In order to prevent transients which may damage the MMIC, please adhere to the following procedure. • Turn on all power supplies and set all voltages to 0 volts BEFORE connecting the power supplies to the DC connector. • Set jumpers for desired test mode. • Apply a -5.0 volt supply to DC connector pin 20 (VGG). • Apply a +5.0 volt supply to the DC connector pin 1 (VDD1). • Apply a +5.0 volt supply to the DC connector pin 2 (VDD2). • Apply a +5.0 volt supply to the DC connector pin 19 (VDD PA). • Adjust VGG supply to -5 volts. • Adjust all VDD supplies to +5 volts. • Hot switching of jumpers will not damage device. • To power off, reverse above procedure. 1. 2. 3. 4. Set VDD1 & VDD2 & VDD PA to 0 volts. Set VGG to 0 volts. Disconnect bias lines from DC connector. Turn off power supplies. Pin 20 Pin 19 Pin 19 Evaluation PCB and RF Connector Losses Port Reference PA IN PA OUT Rx OUT (TO REC) Approximate Loss (dB) 0.25 0.25 0.25 The DC connector on the Designer’s Kit PCB allows selection of all the device’s operating modes. It is accomplished by one or more of the following methods: 1. A mating female multi-pin connector (Newark Electronics Stock # 46F-4658, not included) 2. Wires soldered to the necessary pins (not included) 3. Clip leads (not included) 4. A combination of clip leads or wires and jumpers (jumpers included as required)