Preliminary Specifications 140 mW Power Amplifier with T/R and Diversity Switches AM55-0001 2.4 - 2.5 GHz SSOP-24 Features ● ● ● ● ● Highly Integrated PA/Attenuator and T/R Switch Low Current Consumption: 120 mA Typ. Switch and Attenuator Controls CMOS Compatible High Power (140 mW) and Low Power (16 mW) Transmit Power Control +5 V/-5 V Fixed Supply Voltages +.0037 .340 -.0041 +0,09 8,64 -0,1 +.0025 .0275 -.0025 +0,06 0,7 -0,06 +.0034 .1540 -.0043 +0,09 3,91 -0,11 .236±.008 5,99 ±0,2 Description M/A-COM’s AM55-0001 is a GaAs power amplifier with integrated transmit/receive and an antenna diversity switch in a low cost SSOP 24 plastic package. The AM55-0001 employs active bias circuits that eliminate the need for external bias adjustment. A ‘Sleep Mode’ is incorporated which turns off current draw from the positive supply of the PA during receive mode. The AM55-0001 provides a 10-dB step attenuator for use as a transmit power controller. PIN 1 .057 ±.003 1,45 ±0,08 .015(0,38) x 45° .008 +.0018 -.0005 0,2 +0,05 -0,01 0-8° .004(0,10) .007±.003 0,18 ±0,08 The AM55-0001 is designed for low power consumption and is ideally suited for FSK systems in the 2.4 - 2.5 GHz bands (North American ISM, Japanese RCR.32 and European ETSI). Typical applications include WLAN and wireless portable data collection. +.004 .010 -.001 0,25 +0,1 -0,03 .025 0,64 +.022 .028 -.013 +0,56 0,71 -0,33 Dimensions are in inches over millemeters. Ordering Information This amplifier is also available without diversity switching (AM55-0007). Either power amplifier can be combined with a transceiver IC (MD58-0001) to form a complete RF front end. Part Number AM55-0001 AM55-0001TR AM55-0001RTR AM55-0001SMB M/A-COM's AM55-0001 is fabricated using a mature 0.5-micron gate length GaAs process. The process features full passivation for increased performance and reliability. Description SSOP 24-Lead Plastic Package Forward Tape & Reel* Reverse Tape & Reel* Designer’s Kit specific reel size is required, consult factory for part * Ifnumber assignment. Typical Electrical Specifications Test Conditions: Frequency: 2.45 GHz, VDD = 5 V ±5%, VGG = - 5 V ±5%, TA = +25°C Parameter Power Amplifier Linear Gain VSWR In/Out Output Power Second Harmonic Third Harmonic IDD (VDD1 + VDD2 + VDD PA) Test Conditions PIN = -3 dBm PIN = -3 dBm High Power Mode Low Power Mode Both Modes High Power Mode Low Power Mode High Power Mode T/R and Diversity Switches Insertion Loss Isolation VSWR In/Out Units Min. Typ. Max. dB dB 22 11 dBm dBm dBc dBc mA 18 8 26.5 16 1.5:1 21.5 12 -25 -17 120 200 dB dB Specifications Subject to Change Without Notice 10 1.2 15 1.5:1 V 2.20 1 14 0 mW Power Amplifier with T/R and Diversity Switches 1 Truth Table Absolute Maximum Ratings Parameter Max. Input Power 2 Operating Voltages 2,3 Absolute Maximum +23 dBm VDD = 8 V -40°C to +85°C -65°C to +150°C 1. Exceeding these limits may cause permanent damage. 2. Ambient temperature ( TA ) = +25°C 3. |VDD | + |VGG | not to exceed 12 volts. Pin Name 1 VGG 2 T/R CTRL 3 Rx OUT 4 GND 5 PA OUT Output of T/R switch for transmit mode 6 VDD PA VDD for output stage of PA, VDD for active bias circuit of output stage 7 8 9 10 GND ATTN CTRL GND SLEEP CTRL* -5 V 0V 0V -5 V X X Operating Mode Receive High Power Low Power Sleep Mode ANT 1 ANT 2 X - Don’t Care “0” = 0 V to 0.2 V @ 100 µA “1” = VDD to VDD -0.2 V @ 200 µA Pin Configuration Pin No. Control Line ATTN T/R CTRL CTRL X 1 0 0 1 0 X 1 X X X X ANT CTRL X X X X 0 1 VGG = -8 V Operating Temperature Storage Temperature AM55- 0001 voltage levels between 0 V and VGG must be used on * Control SLEEP CTRL control line. (Pin 24) Description Negative voltage to all active bias networks 0 V for transmit mode, +5 V for receive mode Functional Diagram and Pin Configuration Output of T/R switch for receive mode DC and RF Ground 1 ANT 2 Output #2 of diversity switch 13 ANT 1 Output #1 of diversity switch 14 GND 15 ANT CTRL 16 GND DC and RF Ground 17 VDD2 VDD for both diversity and T/R switches, VDD for second stage of PA DC and RF Ground GND DC and RF Ground VDD1 VDD for first stage of PA, VDD of active bias for the first and second stage of PA 20 GND DC and RF Ground 21 GND DC and RF Ground 22 PA IN RF input to PA 23 GND DC and RF Ground 24 SLEEP CTRL GND VDD PA VDD1 GND GND ATTN CTRL VDD2 GND GND ANT CTRL GND ANT 1 ANT 2 12 0 V for ANT Common to ANT 1, +5 V for ANT Common to ANT 2 19 GND PA OUT ANT COMMON GND DC and RF Ground 18 PA IN GND ANT COMMON Common port of diversity switch 12 GND Rx OUT DC and RF Ground GND SLEEP CTRL T/R CTRL DC and RF Ground 0 V for high power mode, +5 V for low power mode 11 24 VGG 13 0 V PA "on" mode, -5 V PA "sleep" mode. Sleep mode shuts off active bias and "pinches off" all PA FETs. Specifications Subject to Change Without Notice V 2.00 2 14 0 mW Power Amplifier with T/R and Diversity Switches AM55-0001 Small Signal Power Amplifier1 LINEAR GAIN vs VDD, VGG LINEAR GAIN 28 30 -20°C GAIN (dB) GAIN (dB) +25°C 22 18 24 22 20 +70°C 14 18 2.0 2.2 2.4 2.6 ± 6.0 V 26 26 2.8 3.0 ±4.0 V 2.0 2.2 FREQUENCY (GHz) 2.8 3.0 0 RETURN LOSS (dB) RETURN LOSS (dB) 2.6 OUTPUT MATCH INPUT MATCH 0 -5 -10 -20°C +25°C -15 -20 +70°C -25 -30 2.4 FREQUENCY (GHz) 2.0 2.2 2.4 2.6 2.8 -4 +25°C +70°C -12 -16 3.0 -20°C -8 2.0 2.2 2.4 2.6 2.8 3.0 2.8 3.0 FREQUENCY (GHz) FREQUENCY (GHz) T/R Switch Small Signal Performance1 RETURN LOSS -1 -5 -2 -10 -3 -15 -4 -20 -5 2.0 2.2 2.4 2.6 2.8 -25 3.0 0 RETURN LOSS (dB) 0 ISOLATION (dB) INSERTION LOSS (dB) INSERTION LOSS & ISOLATION 0 -5 Output Input -10 -15 -20 2.0 FREQUENCY (GHz) 2.2 2.4 2.6 FREQUENCY (GHz) 1. Unless otherwise noted, Frequency: 2.45 GHz, VDD = 5 V ±5%, VGG = - 5 V ±5%, TA = +25°C Specifications Subject to Change Without Notice V 2.00 3 14 0 mW Power Amplifier with T/R and Diversity Switches AM55- 0001 0 -1 -2 -3 -4 -5 -6 -7 Compression -20°C +25°C +70°C -15 -12 -9 -6 -3 POUT (dBm) POUT (dBm) POUT vs PIN 24 22 20 18 16 14 12 10 COMPRESSION(dB) Power Amplifier Power Performance1 24 22 20 18 16 14 12 10 0 POUT vs VDD , VGG ±6.0 V -15 -11 -7 CURRENT DRAW and POWER ADDED EFFICIENCY 120 10 +25°C 5 0 100 -20°C 80 +70°C -1.5 -12 -9 -6 -3 0 POWER (dBm) PAE (%) 140 +70°C -20°C CURRENT (mA) 160 15 -3 1 PIN (dBm) 25 +25°C ±5.0 V ± 4.0 V PIN (dBm) 20 ± 5.5 V ± 4.5 V 60 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 HARMONIC LEAKAGE at ANT 1 & ANT 22 2nd Harmonic 3rd Harmonic 2.4 2.42 2.44 2.46 2.48 2.50 FREQUENCY (GHz) PIN (dB) 2. Measured with an RF input power of -3 dBm at PA IN. Output measured at ANT 1 and ANT 2 with PA OUT and ANT COMMON terminated in 50Ω. Diversity Switch Small Signal Performance1 -5 -2 -10 -3 -15 -4 -20 -5 2.2 2.4 2.6 2.8 0 RETURN LOSS (dB) -1 2.0 RETURN LOSS 0 ISOLATION (dB) INSERTION LOSS (dB) INSERTION LOSS & ISOLATION 0 -25 3.0 Output -5 Input -10 -15 -20 2.0 2.2 2.4 2.6 2.8 3.0 FREQUENCY (GHz) FREQUENCY (GHz) 1. Unless otherwise noted, Frequency: 2.45 GHz, VDD = 5 V ±5%, VGG = - 5 V ±5%, TA = +25°C Specifications Subject to Change Without Notice V 2.00 4 14 0 mW Power Amplifier with T/R and Diversity Switches AM55-0001 Recommended PCB Configuration Layout View Cross-Section View RF Traces + Components 0.710 in. RF Ground C7 DC Routing C3 Customer Defined C9 C2 0.550 in. The PCB dielectric between RF traces and RF ground layers should be chosen to reduce RF discontinuities between 50- Ω lines and package pins. M/A-COM recommends an FR-4 dielectric thickness of 0.008 in. (0.2 mm), yielding a 50 - Ω line width of 0.015 in. (0.38 mm). The recommended metalization thickness is 1 oz. copper. C6 C8 C4 PIN 1 Shaded traces are vias to DC routing layer and traces on DC routing layer. C1 C5 Biasing Procedure The AM55-0001 requires the VGG bias be applied prior to any VDD bias. Permanent damage may occur if this procedure is not followed. All FETs in the PA will draw excessive current and damage internal circuitry. External Circuitry Parts List Label Value Purpose C1 - C4 33 pF Bypass (GHz) C5 - C8 1000 pF Bypass (MHz) C9 0.01 µF Bypass (kHz) All off-chip components are low-cost surface mount components obtainable from multiple sources. (0.020 in. x 0.040 in. or 0.030 in. x 0.050 in.) External Circuitry VGG C5 C1 T/R CTRL Rx OUT PA OUT VDD PA C9 C6 C2 ATTN CTRL ANT COMMON ANT 2 Specifications Subject to Change Without Notice 1 2 3 4 5 24 23 22 21 20 6 7 8 9 10 11 12 19 18 17 16 15 14 13 SLEEP CTRL PA IN C4 C8 C3 C7 V DD1 V DD2 ANT CTRL ANT 1 V 2.00 5 14 0 mW Power Amplifier with T/R and Diversity Switches AM55- 0001 Designer’ s Kit (AM55-0001SMB) The AM55-0001SMB Designer's Kit allows for immediate evaluation of M/A-COM's AM55-0001 integrated Power Amplifier with T/R and Diversity Switch. The evaluation board consists of an AM55-0001, recommended external surface mount circuitry, RF connectors and a DC multi-pin connector, all mounted to a multi-layer FR-4 PCB. Other items included in the Designer's Kit: a floppy disk (with typical performance data and a .DXF file of the recommended PCB layout) and any additional Application Notes. The AM55-0001SMB evaluation PCB and block diagram are illustrated below with all functional ports labeled. P/A Switch Sample Board Functional Block Diagram ANT 2 ANT 1 ATTN TR CTL PA CTL ANT ANT COMMON (ANT IN) PA OUT ANT 2 ANT 1 PA IN Rx OUT (TO REC) ANT IN PA OUT TO REC. PA IN DC Connector Pinout PCB DC Connector Function Device Pin Number PCB DC Connector Function Device Pin Number 1 VDD1 (+ 5 V) 19 11 Logic High (VDD1) 19 2 VDD2 (+ 5 V) 17 12 T/R Control (0 V/+5 V) 2 3 Logic Low (GND) N/C 13 Logic Low (GND) N/C 4 ANT Control (0 V/+5 V) 15 14 T/R Control (0 V/+5 V) 2 5 Logic High (VDD1) 19 15 Logic High (VDD1) 19 6 ANT Control (0 V/+5 V) 15 16 ATTN Control (0 V/+5 V) 8 7 Negative Logic High (GND) N/C 17 Logic Low (GND) N/C 8 PA Control (0 V/-5 V) 24 18 ATTN Control (0 V/+5 V) 8 9 Negative Logic Low (VGG) 1 19 VDD PA (+5 V) 6 10 PA Control (0 V/-5 V) 24 20 VGG ( - 5 V) 1 Specifications Subject to Change Without Notice V 2.00 6 14 0 mW Power Amplifier with T/R and Diversity Switches AM55-0001 PCB DC Connector Jumper Settings Jumpers (Position 1) Pin 2 Jumpers (Position 2) Pin 1 Pin 2 Pin 1 Jumper 1 Jumper 1 Jumper 2 Jumper 2 Jumper 3 Jumper 3 Jumper 4 Jumper 4 Pin 20 Pin 19 Pin 20 Jumper 1 (Diversity Switch Control) Position 1 = ANT Common to ANT 2 Insertion Loss Position 2 = ANT Common to ANT 1 Insertion Loss Jumper 2 (PA Sleep Control) Position 1 = PA ON Position 2 = PA Sleep Mode Jumper 3 (T/R Switch Control) Position 1 = Receive Mode Position 2 = Transmit Mode Jumper 4 (Attenuator Control) Position 1 = Attenuator ON (Low Power Transmit) Position 2 = Attenuator OFF (High Power Transmit) AM55-0001SMB Biasing Procedure Evaluation PCB and RF Connector Losses In order to prevent transients which may damage the MMIC, please adhere to the following procedure. • Turn on all power supplies and set all voltages to 0 volts BEFORE connecting the power supplies to the DC connector. • Set jumpers for desired test mode. • Apply a -5.0 volt supply to DC connector pin 20 (VGG). • Apply a +5.0 volt supply to the DC connector pin 1 (VDD1). • Apply a +5.0 volt supply to the DC connector pin 2 (VDD2). • Apply a +5.0 volt supply to the DC connector pin 19 (VDD PA). Port Reference PA IN PA OUT Rx OUT (TO REC) ANT COMMON (ANT IN) ANT1 ANT2 Approximate Loss (dB) 0.25 0.25 0.25 0.25 0.30 0.30 The DC connector on the Designer’s Kit PCB allows selection of all the device’s operating modes. It is accomplished by one or more of the following methods: 1. A mating female multi-pin connector (Newark Electronics Stock # 46F-4658, not included) • Adjust V GG supply to -5 volts. • Adjust all V DD supplies to +5 volts. 2. Wires soldered to the necessary pins (not included) • Hot switching of jumpers will not damage device. • To power off, reverse above procedure. 1. 2. 3. 4. Pin 19 3. Clip leads (not included) Set VDD1 & VDD2 & VDD PA to 0 volts. Set VGG to 0 volts. Disconnect bias lines from DC connector. Turn off power supplies. 4. A combination of clip leads or wires and jumpers (jumpers included as required) Specifications Subject to Change Without Notice V 2.00 7