October 1993 DP802518 TROPIC Tsunami TM TROPIC II TM Microcode ROM General Description Features The DP802518 Tsunami is the microcode device for the high performance Token Ring Protocol Interface ControllerÐTROPIC II Token Ring chipset. this device features an interface compatible to the DP80253 controller, which allows direct connection without the use of glue logic. The DP802518 Tsunami is implemented using National Semiconductor’s Advanced CMOS process, and operates from a single 5V g 10% power supply. The Tsunami is available in either a 28-pin DIP or 32-pin PLCC package. Y Y Y TROPIC II compatible Ð Glueless interface High performance CMOS Surface Mount and DIP Packages Ð 28-pin molded plastic DIP Ð 32-pin PLCC Block Diagram TL/F/11914 – 1 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. TROPIC TsunamiTM and TROPIC IITM are trademarks of National Semiconductor Corporation. C1995 National Semiconductor Corporation TL/F/11914 RRD-B30M105/Printed in U. S. A. DP802518 TROPIC Tsunami TROPIC II Microcode ROM PRELIMINARY Connection Diagrams PLCC DIP TL/F/11914 – 3 Order Number DP802518V See NS Package Number VA32A TL/F/11914–2 Order Number DP802518N See NS Package Number N28B Commercial Temperature Range (0§ C to a 70§ C) VCC e 5V g 10% Parameter/Order Number Check Sum DP802518 N, V xxxx Pin Names A0–A15 Addresses CE Chip Enable OE Output Enable O0–O7 Outputs NC No Connect 2 Absolute Maximum Ratings (Note 1) Operating Range If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Storage Temperature Range Temperature VCC Commercial 0§ C to a 70§ C 5V g 10% b 65§ C to a 150§ C All Input Voltages with Respect to Ground b 0.6V to a 7V VCC Supply Voltage with Respect to Ground b 0.6V to a 7V ESD Protection All Output Voltages with Respect to Ground l 2000V VCC a 1.0V to GND b0.6V Read Operation DC Electrical Characteristics Over operating range Symbol VIL Parameter Test Conditions Input Low Level VIH Input High Level VOL Output Low Voltage IOL e 2.1 mA VOH Output High Voltage IOH e b400 mA ISB1 VCC Standby Current (CMOS) CE e VCC g 0.3V ISB2 VCC Standby Current CE e VH ICC VCC Active Current CE e OE e VIL, I/O e 0 mA ILI Input Load Current VIN e 5.5V or GND ILO Output Leakage Current VOUT e 5.5V, OR GND Min Max Units b 0.5 0.8 V 2.0 VCC a 1 V 0.4 V 3.5 V 100 mA 1 mA 40 mA b1 1 mA b 10 10 mA AC Electrical Characteristics Over operating range Symbol Parameter Min Max tACC Address to Output Delay 120 tCE CE to Output Delay 120 tOE OE to Output Delay 50 tDF (Note 2) Output Disable to Output Float tOH (Note 2) Output Hold From Addresses, CE or OE, Whichever Occurred First Units ns 25 7 Capacitance TA e a 25§ C, 1 e 1 MHz (Note 2) Typ Max CIN Symbol Input Capacitance Parameter VIN e 0V Conditions 13 20 Units pF COUT Output Capacitance VOUT e 0V 13 20 pF AC Test Conditions Output Load Input Rise and Fall Time Input Pulse Levels Timing Measurement Level (Note 8) Inputs Outputs 1 TTL Gate and CL e 100 pF (Note 8) s 5 ns 3 0.45V to 2.4V (Note 8) 0.8V and 2V 0.8V and 2V AC Waveforms (Notes 6, 7 and 9) TL/F/11914 – 4 Note 1: Stresses above those listed under ‘‘Absolute Maximum Ratings’’ may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operations sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2: This parameter is only sampled and is not 100% tested. Note 3 OE may be delayed up to tACC b tOE after the falling edge of CE without impacting tACC. Note 4: The tDF and tCF compare level is determined as follows: High to TRI-STATEÉ, the measure VCH1 (DC) b 0.10V; Low to TRI-STATE, the measured VOL1 (DC) a 0.10V. Note 5: TRI-STATE may be attained using OE or CE. Note 6: The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.2 mF ceramic capacitor be used on every device between VCC and GND. Note 7: The outputs must be restricted to VCC a 1.0V to avoid latch-up and device damage. Note 8: 1 TTL Gate: IOL e 1.6 mA, IOH e b 400 mA. CL: 100 pF includes fixture capacitance. Note 9: Inputs and outputs can undershoot to b 2.0V for 20 ns max. Functional Description DEVICE OPERATION The three modes of operation of the Tsunami are listed in Table I. It should be noted that all inputs of the three modes are at TTL levels. The power supply required is supplied via the VCC pin and the power supply tolerance should be 5V g 10%. APPLICATION In application, the DP802518 is connected to the DP80253 TROPIC II high performance token ring controllers as shown in Figure 1 . The DP802518 is connected to the TROPIC II with outputs O0 to O7 connected to LÐD0 –LÐ D7 respectively. Read Mode The Tsunami has two control functions, both of which must be logically active to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs tOE after the falling edge of OE, assuming that CE has been low and addresses have been stable for at least tACC b tOE. SYSTEM CONSIDERATION The power switching characteristics of Tsunami require careful decoupling of the devices. The supply current ICC has three segments that are of interest to the system designer: The standby current level, the active current level, and the transient current peaks that are produced by the voltage transition on the input pins. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. The associated VCC transient voltage peaks can be suppressed by properly selecting decoupling capacitors. It is recommended that a 0.2 mF ceramic capacitor be used between VCC and GND for each of the eight devices. The bulk capacitor should be located near the point where the power supply is connected to the subsystem. The bulk capacitor is used to overcome the voltage drop caused by the inductive effects of the PC board traces. Standby Mode The Tsunami has a standby mode which reduces the active power dissipation drastically, from 275 mW to 0.55 mW. The DP802518 is placed in the standby mode by applying a CMOS high signal to the CE input. When in standby mode, the outputs are in a high impedance state, independent of the OE input. Output Disable The DP802518 is placed in output disable by applying a TTL high signal to the OE input. When in output disable, all circuitry is enabled except the outputs are in a high impedance state (TRI-STATE). 4 Mode Selection The modes of operation for the Tsunami are listed in Table I. A single 5V power supply is required and all inputs are at TTL levels. TABLE I. Mode Selection CE OE VCC Outputs Read Mode VIL VIL 5.0V DOUT Standby VIH X 5.0V High Z X VIH 5.0V High Z Output Disable Note 1: X can be VIL or VIH. TL/F/11914 – 5 FIGURE 1. Typical Interfacing of the TROPIC Tsunami Microcode ROM Physical Dimensions inches (millimeters) 28-Lead (0.600× Wide) Molded Dual-In-Line Package Order Number DP802518N NS Package Number N28B 5 DP802518 TROPIC Tsunami TROPIC II Microcode ROM Physical Dimensions inches (millimeters) (Continued) 28-Lead Molded Dual-In-Line Package Order Number DP802518V NS Package Number VA32A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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