TM RIMM Module with 256/288Mb RDRAMs Preliminary Revision History * Rev. 0.95 Date : 2001.07.23 1. Page2, 7, 8, 10, 12 : Add 2D RIMM part Rev. 0.95 / July.01 1 TM RIMM Module with 256/288Mb RDRAMs Preliminary Overview Key Timing Parameters/Part Numbers The‘Rambus ® RIMMTM module is a general purpose high-performance memory subsystem suitable for use in a broad range of applications including computer memory, personal computers, workstations, and other applications where high bandwidth and low latency are required. The following table lists the frequency and latency bins available from RIMM modules. The Rambus RIMM module consist of 256/288Mb Direct Rambus DRAM devices. These are extremely high-speed CMOS DRAMs organized as 16M words by 16/18 bits. The use of Rambus Signaling Level (RSL) technology permits 600MHz ,711MHz or 800MHz transfer rates while using conventional system and board design technologies. RDRAM devices are capable of sustained data transfers at 1.25 ns per two bytes (10ns per 16 bytes). The RDRAM architecture enables the highest sustained bandwidth for multiple, simultaneous randomly addressed memory transactions. The separate control and data buses with independent row and column control yield over 95% bus efficiency. The Direct RDRAM's 32-banks architecture supports up to four simultaneous transactions per device. Features w High speed 800,711 and 600 MHz RDRAM storage w 184 edge connector pads with 1 mm pad spacing w Maximum module PCB size: 133.5mm x 34.93mm x 1.37mm(5.21” x 1.375” x 0.05”) w Gold plated edge connector pad contacts w Serial Presence Detect(SPD) support w Operates from a 2.5 volt supply (±5%) w Powerdown self refresh modes w µBGA Package (92 balls) w Separate Row and Column buses for higher efficiency Table 1: Part Number by Frequency and Latency Organization I/O Freq. MHz 32M x 16/18 t rac ( Row Access Time ) ns Part Number 600 53 HYMR23216(18)H-653 32M x 16/18 711 45 HYMR23216(18)H-745 32M x 16/18 800 45 HYMR23216(18)H-845 32M x 16/18 800 40 HYMR23216(18)H-840 64M x 16/18 600 53 HYMR26416(18)H-653 64M x 16/18 711 45 HYMR26416(18)H-745 64M x 16/18 800 45 HYMR26416(18)H-845 64M x 16/18 800 40 HYMR26416(18)H-840 128M x 16/18 600 53 HYMR212816(18)H-653 128M x 16/18 711 45 HYMR212816(18)H-745 128M x 16/18 800 45 HYMR212816(18)H-845 128M x 16/18 800 40 HYMR212816(18)H-840 256M x 16/18 600 53 HYMR225616(18)H-653 256M x 16/18 711 45 HYMR225616(18)H-745 256M x 16/18 800 45 HYMR225616(18)H-845 256M x 16/18 800 40 HYMR225616(18)H-840 Form Factor The Rambus RIMM modules are offered in a 184-pad 1mm edge connector pad pitch from factor suitable for either 184 or 168 contact RIMM connectors. The RIMM module is suitable for desktop and other system applications. Figure 1 below, shows an eight device Rambus RIMM module without heat spreader. Figure 1: Rambus RIMM Module without heat spreader Rev. 0.95 / July.01 2 TM RIMM Module with 256/288Mb RDRAMs Preliminary Table 2: Module Pad Number and Signal Names Pin A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46 Pin Name Gnd LDQA8 Gnd LDQA6 Gnd LDQA4 Gnd LDQA2 Gnd LDQA0 Gnd LCTMN Gnd LCTM Gnd NC Gnd LROW1 Gnd LCOL4 Gnd LCOL2 Gnd LCOL0 Gnd LDQB1 Gnd LDQB3 Gnd LDQB5 Gnd LDQB7 Gnd LSCK Vcmos SOUT Vcmos NC Gnd NC Vdd Vdd NC NC NC NC Rev. 0.95 / July.01 Pin B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 B41 B42 B43 B44 B45 B46 Pin Name Gnd LDQA7 Gnd LDQA5 Gnd LDQA3 Gnd LDQA1 Gnd LCFM Gnd LCFMN Gnd NC Gnd LROW2 Gnd LROW0 Gnd LCOL3 Gnd LCOL1 Gnd LDQB0 Gnd LDQB2 Gnd LDQB4 Gnd LDQB6 Gnd LDQB8 Gnd LCMD Vcmos SIN Vcmos NC Gnd NC Vdd Vdd NC NC NC NC Pin A47 A48 A49 A50 A51 A52 A53 A54 A55 A56 A57 A58 A59 A60 A61 A62 A63 A64 A65 A66 A67 A68 A69 A70 A71 A72 A73 A74 A75 A76 A77 A78 A79 A80 A81 A82 A83 A84 A85 A86 A87 A88 A89 A90 A91 A92 Pin Name NC NC NC NC Vref Gnd SCL Vdd SDA SVdd SWP Vdd RSCK Gnd RDQB7 Gnd RDQB5 Gnd RDQB3 Gnd RDQB1 Gnd RCOL0 Gnd RCOL2 Gnd RCOL4 Gnd RROW1 Gnd NC Gnd RCTM Gnd RCTMN Gnd RDQA0 Gnd RDQA2 Gnd RDQA4 Gnd RDQA6 Gnd RDQA8 Gnd Pin B47 B48 B49 B50 B51 B52 B53 B54 B55 B56 B57 B58 B59 B60 B61 B62 B63 B64 B65 B66 B67 B68 B69 B70 B71 B72 B73 B74 B75 B76 B77 B78 B79 B80 B81 B82 B83 B84 B85 B86 B87 B88 B89 B90 B91 B92 Pin Name NC NC NC NC Vref Gnd SA0 Vdd SA1 SVdd SA2 Vdd RCMD Gnd RDQB8 Gnd RDQB6 Gnd RDQB4 Gnd RDQB2 Gnd RDQB0 Gnd RCOL1 Gnd RCOL3 Gnd RROW0 Gnd RROW2 Gnd NC Gnd RCFMN Gnd RCFM Gnd RDQA1 Gnd RDQA3 Gnd RDQA5 Gnd RDQA7 Gnd 3 TM RIMM Module with 256/288Mb RDRAMs Preliminary Table 3: Module Connector Pad Description Signal Module Connector Pads Gnd A1, A3, A5, A7, A9, A11, A13, A15, A17, A19, A21, A23, A25, A27, A29, A31, A33, A39, A52, A60, A62, A64, A66, A68, A70, A72, A74, A76, A78, A80, A82, A84, A86, A88, A90, A92, B1, B3, B5, B7, B9, B11, B13, B15, B17, B19, B21, B23, B25, B27, B29, B31, B33, B39, B52, B60, B62, B64, B66, B68, B70, B72, B74, B76, B78, B80, B82, B84, B86, B88, B90, B92 LCFM B10 LCFMN B12 LCMD B34 LCOL4.. LCOL0 A20, B20, A22, B22, A24 LCTM A14 LCTMN A12 LDQA8.. LDQA0 A2, B2, A4, B4, A6, B6, A8, B8, A10 LDQB8.. LDQB0 B32, A32, B30, A30, B28, A28, B26, A26, B24 LROW2.. B16, A18, B18 LROW0 I/O Type Description Ground reference for RDRAM core and interface. 72 PCB connector pads. I RSL Clock from master. Interface clock used for receiving RSL signals from the Channel. Positive polarity. I RSL Clock from master. Interface clock used for receiving RSL signals from the Channel. Negative polarity. I V CMOS control registers. Also used for power management. I RSL Column bus. 5-bit bus containing control and address information for column accesses. I RSL Clock to master. Interface clock used for transmitting RSL signals to the Channel. Positive polarity. I RSL Clock to master. Interface clock used for transmitting RSL signals to the Channel. Negative polarity. I/O RSL Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. LDQA8 is non-functional on x16 RDRAM devices. I/O RSL Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. LDQB8 is non-functional on x16 RDRAM devices. I RSL Row bus. 3-bit bus containing control and address information for row accesses. I V CMOS and write to the RDRAM control registers. Serial Command used to read from and write to the LSCK A34 NC A16, B14, A38, B38, A40, B40, A77, B79 These pads are not connected. These 8 connector pads are reserved for future use. NC A43, B43, A44, B44, A45, B45, A46, B46, A47, B47, A48, B48, A49, B49, A50, B50 These pads are not connected. These 16connector pads art reserved for future use. The 168 contact RIMM connector does not connect to these PCB pads. RCFM B83 RCFMN B81 Rev. 0.95 / July.01 Serial Clock input. Clock source used to read from I RSL Clock from master. Interface clock used for receiving RSL signals from the Channel. Positive polarity. I RSL Clock from master. Interface clock used for receiving RSL signals from the Channel. Negative polarity. 4 TM RIMM Module with 256/288Mb RDRAMs Preliminary Signal Module Connector Pads RCMD B59 I/O Type Description Serial Command Input used to read from and write to the control registers. Also used for power management. I V CMOS I RSL Column bus. 5-bit bus containing control and address information for column accesses. I RSL Clock to master. Interface clock used for transmitting RSL signals to the Channel. Positive polarity. I RSL Clock to master. Interface clock used for transmitting RSL signals to the Channel. Negative polarity. RDQA8.. A91, B91, A89, B89, A87, B87, A85, B85, A83 RDQA0 I/O RSL Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. RDQA8 is non-functional on x16 RDRAM devices. RDQB8.. B61, A61, B63, A63, B65, A65, B67, A67, B69 RDQB0 I/O RSL Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. RDQB8 is non-functional on x16 RDRAM devices. I RSL Row bus. 3-bit bus containing control and address information for row accesses. I V CMOS Serial Clock input. Clock source used to read from and write to the RDRAM control registers. RCOL4.. RCOL0 A73, B73, A71, B71, A69 RCTM A79 RCTMN A81 RROW2.. B77, A75, B75 RROW0 RSCK A59 SA0 B53 I SV DD Serial Presence Detect Address 0. SA1 B55 I SV DD Serial Presence Detect Address 1. SA2 B57 I SV DD Serial Presence Detect Address 2. SCL A53 I SV DD Serial Presence Detect Clock. SDA A55 I/O SV DD Serial Presence Detect Data (Open Collector I/O) SIN B36 I/O V CMOS Serial I/O for reading from and writing to the control registers. Attaches to SIO0 of the first RDRAM on the module. I/O V CMOS Serial I/O for reading from and writing to the control registers. Attaches to SIO1 of the last RDRAM on the module. SOUT A36 SV DD A56, B56 SWP A57 V CMOS A35, B35, A37, B37 Vdd A41, A42, A54, A58, B41, B42, B54, B58 Vref A51, B51 Rev. 0.95 / July.01 SPD Voltage. Used for signals SCL, SDA, SWE, SA0, SA1 and SA2. I SV DD Serial Presence Detect Write Protect (active high). When low, the SPD can be written as well as read. CMOS I/O Voltage. Used for signals CMD, SCK, SIN, SOUT. I Supply voltage for the RDRAM core and interface logic. Logic threshold reference voltage for RSL signals. 5 LDQA8 LDQA7 LDQA6 LDQA5 LDQA4 LDQA3 LDQA2 LDQA1 LDQA0 LCFM LCFMN LCTM LCTMN LROW2 LROW1 LROW0 LCOL4 LCOL3 LCOL2 LCOL1 LCOL0 LDQB0 LDQB1 LDQB2 LDQB3 LDQB4 LDQB5 LDQB6 LDQB7 LDQB8 SIN LSCK LCMD VREF DQA8 DQA7 DQA6 DQA5 DQA4 DQA3 DQA2 DQA1 DQA0 CFM CFMN CTM CTMN ROW2 ROW1 ROW0 COL4 COL3 COL2 COL1 COL0 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 DQA8 DQA7 DQA6 DQA5 DQA4 DQA3 DQA2 DQA1 DQA0 CFM CFMN CTM CTMN ROW2 ROW1 ROW0 COL4 COL3 COL2 COL1 COL0 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 DQA8 DQA7 DQA6 DQA5 DQA4 DQA3 DQA2 DQA1 DQA0 CFM CFMN CTM CTMN ROW2 ROW1 ROW0 COL4 COL3 COL2 COL1 COL0 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 DQA8 DQA7 DQA6 DQA5 DQA4 DQA3 DQA2 DQA1 DQA0 CFM CFMN CTM CTMN ROW2 ROW1 ROW0 COL4 COL3 COL2 COL1 COL0 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 RDQA8 RDQA7 RDQA6 RDQA5 RDQA4 RDQA3 RDQA2 RDQA1 RDQA0 RCFM RCFMN RCTM RCTMN RROW2 RROW1 RROW0 RCOL4 RCOL3 RCOL2 RCOL1 RCOL0 RDQB0 RDQB1 RDQB2 RDQB3 RDQB4 RDQB5 RDQB6 RDQB7 RDQB8 SOUT RLSCK RCMD U0 1 per 2 RDRAMs 0.1§Þ Plus one SA0 Near Connector SA1 0.1§ Þ Gnd SA2 Gnd Note 1: Rambus Channel signals form a loop through the RIMM module, with the exception of the SIO chain. Note 2: See Serial Presence Detection Specification for information on the SPD device and its contents. SDA Vcc SCL SDA WP A0A1A2 6 Rev. 0.95 / July.01 SV D D 2 per RDRAM 0.1§ Þ V CMOS 1 per 2 RDRAMs 0.1§Þ Serial Presence Detect Vdd SCL SWP Gnd SV D D Gnd V REF Direct RDRAM (256/288Mb) UN SIO0 SIO1 SCK CMD Vref Direct RDRAM (256/288Mb) U3 SIO0 SIO1 SCK CMD Vref Direct RDRAM (256/288Mb) U2 SIO0 SIO1 SCK CMD Vref Direct RDRAM (256/288Mb) U1 SIO0 SIO1 SCK CMD Vref Module TM RIMM with 256/288Mb RDRAMs Preliminary Figure 2: RIMM Module Functional Diagram TM RIMM Module with 256/288Mb RDRAMs Preliminary Absolute Maximum Ratings Signal Parameter Min Max Unit VI,ABS Voltage applied to any RSL or CMOS pin with respect to Gnd - 0.3 V DD + 0.3 V VDD,ABS Voltage on VDD with respect to Gnd - 0.5 V DD + 1.0 V TSTORE Storage temperature - 50 100 ºC TPLATE Plate temperature - 100 ºC DC Recommended Electrical Conditions Signal Parameter and Conditions Min Max Unit VDD Supply voltage 2.50 - 0.13 2.50 + 0.13 V VCMOS CMOS I/O power supply at pad for 2.5V controllers: CMOS I/O power supply at pad for 1.8V controllers: 2.5 - 0.13 1.8 - 0.1 2.5 + 0.25 1.8 + 0.2 V V VREF Reference voltage 1.4 - 0.2 1.4 + 0.2 V VSPD Serial Presence Detector - Positive power supply 2.2 3.6 V VIL RSL input low voltage VREF - 0.5 VREF - 0.2 V VIH RSL input high voltage VREF + 0.2 VREF + 0.5 V VIL,CMOS CMOS input low voltage - 0.3 0.5VCMOS - 0.25 V VIH,CMOS CMOS input high voltage 0.5VCMOS + 0.25 VCMOS + 0.3 V 0.3 V VOL,CMOS CMOS output low voltage @ IOL,CMOS = 1mA VOH,CMOS CMOS output high voltage @ IOH,CMOS = -0.25mA V VCMOS - 0.3 IREF VREF current @ VREF,MAX -10 x no. RDRAMsa 10 x no. RDRAMsa µA ISCK,CMD CMOS input leakage current @ (0 ≤ VCMOS ≤ VDD ) -10 x no. RDRAMsa 10 x no. RDRAMsa µA ISIN,SOUT CMOS input leakage current @ (0 ≤ VCMOS ≤ VDD ) -10.0 10.0 µA a. The tale below shows the number of 256Mb or 288Mb RDRAM devices contained in a RIMM module of listed memory storage capacity RIMM Module Capacity: Number of 256Mb or 288Mb RDRAM devices: Rev. 0.95 / July.01 512/576MB 384/432MB 256/288MB 128/144MB 16 12 8 4 64/72MB 2 7 TM RIMM Module with 256/288Mb RDRAMs Preliminary RIMM Module Current Profile RIMM Module Capacity: No. of 256/288Mb RDRAMs: IDD RIMM Module power conditionsa IDD1 IDD2 IDD3 IDD4 IDD5 IDD6 One RDRAM in Readb, balance in NAP mode Readb, One RDRAM in in Standby mode balance One RDRAM in Readb, balance in Active mode One RDRAM in in NAP mode Writeb, balance One RDRAM in Writeb, balance in Standby mode One RDRAM in in Active mode Writeb, balance 512/576MB 16 384/423MB 12 256/288MB 8 128/144MB 4 64/72MB 2 Freq. Max Max Max Max Max 800 798 782 767 751 742 711 746 730 714 698 679 600 641 625 609 593 584 800 2860 2340 1820 1300 1040 711 2667 2187 1707 1227 987 600 2406 1996 1526 1086 866 800 3100 2460 1820 1180 860 711 2900 2300 1700 1100 800 600 2350 1870 1390 910 670 800 956 940 924 908 899 711 851 835 819 803 792 600 746 730 714 698 689 800 2868 2303 1738 1174 892 711 2800 2240 1680 1120 840 600 2262 1818 1375 932 711 800 3055 2535 2015 1495 1235 711 2800 2320 1840 1360 1120 600 2544 2104 1664 1224 1004 Unit mA mA mA mA mA mA a. Actual Power will depend on individual RDRAM component specifications, memory controller and usage patterns. Please refer to specific RIMM module vendor data sheets for additional information. b. I/O current is a function of the % of 1’s, to add I/O power for 50% 1’s for a x16 need to add 257mA or 290mA for x18 ECC modu le for the following : VDD = 2.5V, VTERM = 1.8V, VREF = 1.4V and V DIL = VREF - 0.5V. Rev. 0.95 / July.01 8 TM RIMM Module with 256/288Mb RDRAMs Preliminary AC Electrical Specifications Symbol Parameter and Condition Min Typ Max Unit ZL Module Impedance of RSL Signals 25.2 28 30.8 Ω ZUL-CMOS Module Impedance of SCK and CMD signals 23.8 28 32.2 Ω TPD Average clock delay form finger to finger of all RSL clock nets (CTMN, CFM, and CFMN) - See Tablea ns ∆TPD Propagation delay variation of RSL signals with respect to TPDa,b for 4, 6, 8, and 12 device modules -21 21 ps Propagation delay variation of RSL signals with respect to TPDa,b for 16 device modules -24 24 ps ∆TPD-CMOS Propagation delay variation of SCK signal with respect to an average clock delaya -250 250 ps ∆TPD-SCK Propagation delay variation of CMD signal with respect to SCK signal -200 200 ps ,CMD V α/VIN Attenuation Limit See Tablea % VXF /VIN Forward crosstalk coefficient (300ps input rise time 20%-80%) See Tablea % VXB /VIN Backward crosstalk coefficient (300ps input rise time 20%-80%) See Tablea % a. Tpd or Average clock delay is defined as the average delay from finger of all RSL clock nets(CTM, CTMN, CFM, and CFMN) b. If the RIMM module meets the following specification, then it is compliant to the specification. If the RIMM module does not meet these specifications, then the specification can be adjusted by the “Adjusted ∆TPD Specification” table Adjusted ∆TPD Specification Adjusted Min/Max Absolute Min/Max Symbol Parameter and Conditions Unit ∆TPD Propagation delay variation of RSL signals with respect to TPD for 4,6 and 8 device modules +/-[17+(18*N* ∆Z0)]a -30 30 ns Propagation delay variation of RSL signals with respect to TPD for 12 device modules +/-[20+(18*N* ∆Z0)]a -40 40 ps Propagation delay variation of RSL signals with respect to TPD for 16 device modules +/-[24+(18*N* ∆Z0)]a -50 50 ps a. Where : N =Number of RDRAM devices installed on the RIMM module ∆Z0 = delta Z0% = (max Z0 - min Z0)/(min Z0) (max Z0 and min Z0 are obtained from the loaded (high impedance) impedance coupons of all RSL layers on the modules) Rev. 0.95 / July.01 9 TM RIMM Module with 256/288Mb RDRAMs Preliminary AC Electrical Specifications for RIMM Modules RIMM Module Capacity: No. of 256/288Mb RDRAMs: 512/576MB 384/432MB 256/288MB 128/144MB 16 12 8 4 64/72MB 2 Symbol Unit Parameter and Condition for -800, -711 & -600 RIMM Module Max Max Max Max Max Propagation Delay, all RSL signals 2.11 1.76 1.56 1.28 1.28 ns Attenuation Limit -800, -711 25.0 20.0 16.0 12.0 12.0 % Attenuation Limit -600 18.5 15.5 12.5 10.5 10.5 % VXF / VIN Forward crosstalk coefficient (300ps input rise time @ 20%-80%) -800, -711, -600 8.0 6.0 4.0 2.0 2.0 % VXB / VIN Backward crosstalk coefficient (300ps input rise time @ 20%-80%) -800, -711, -600 2.5 2.3 2.0 1.5 1.5 % RDC DC Resistance Limit -800, -711, -600 1.2 1.1 0.8 0.6 0.6 Ω TPD Vα / VIN Rev. 0.95 / July.01 10 TM RIMM Module with 256/288Mb RDRAMs Preliminary Physical Dimensions The following defines the RIMM module dimensions. All units are in millimeters. The height of the module is 31.75mm. 133.35 ± 0.15 1.27 ± 0.1 3.0 4.0 ± 0.15 Top Area - N Components 34.925 ± 0.127 R 2.0 17.78 Detail A A1 5.675 45.0 4.5 Detail B A92 11.5 27.5 Max. 7.37 Including Heat spreader 55.175 ± 0.08 B92 B1 1.0 0.8 ± 0.1 2.99 ± 0.05 R 1.0 3.0 ± 0.1 2.0 ± 0.1 Detail A 0.15 ± 0.1 Detail B Note 1.Tolerances on all dimensions ± 0.127mm unless otherwise specified. 2.Thickness(* Mark) includes plating and/or metallization. Figure 3: RIMM Module PCB Physical Description Module Weight The maximum RIMM Module weight is 75gm(2.625oz) with a center of mass 35mm (1.378 in.) upwards from bottom edge. Rev. 0.95 / July.01 11 TM RIMM Module with 256/288Mb RDRAMs Preliminary Standard RIMM Module Marking The RIMM modules available from RIMM module manufacturers will be marked per Figure 4 below. This industry standard marking will help OEMs and users identify the Rambus RIMM modules for use in specific system application. This marking also assists OEMs or users to specify and verify if the correct RIMM I F HYMR212818H-840 G100 KOREA YWWDV S100 H J Label Field B A C 512MB / 8 R A MBUS 800-45 G D E Description Marked Text Unit A Module Memory capacity Number of 8-bit or 9-bit Mbytes of RDRAM storage in RIMM module 512MB, 384MB 256MB,128MB,64MB MBytes B Number of DRDRAMs Number of RDRAM devices contained in the RIMM module /16, /12, /8, /4, /2 RDRAM devices C ECC support Indicates whether the RIMM module supports 8-bit (no ECC) or 9-bit (ECC) Bytes Blank = 8-bit Byte ECC = 9-bit Byte D Memory Speed Data transfer speed for RDRAM RIMM module 800, 711, 600 E tRAC Row Access Time (Optional field) -40, -45, -50, -53 or blank F Gerber Version PCB Gerber file revision used on RIMM Module (Optional field) Rev 1.00 = G100 or blank G SPD Version SPD Code Version (Optional field) Rev 1.00 = S100 or blank H Country Country Area Korea I Vendor Hynix specific RIMM module Information Product Part No J Vendor Hynix specific Date code, Ass’y Vender YWWDV MHz ns Figure 4: Standard RIMM Module Marking Rev. 0.95 / July.01 12 HYMR2xxx16(18)H Rambus Module Serial Presence Detect SPD Specification based on 256/288Mb RDRAM Version 1.1 July 2001 Rev. 1.1/July 01 1 HYMR2xxx16(18)H Rambus Module Serial Presence Detect Revision History Revision 1.1 (July 2001) • Added 2D Product. - Added 2D items at Byte75, 76, 77 regarding Part Number - Added 2D items at Byte99, 101, 102 regarding device number - Added 2D checksum data. Rev. 1.1/July 01 2 HYMR2xxx16(18)H Rambus Module Serial Presence Detect SERIAL PRESENCE DETECT BYTE NUMBER FUNCTION DESCRIPTION BYTE0 SPD Revision Level BYTE1 Total # of Bytes in the SPD BYTE2 Device Type BYTE3 Module Type BYTE4 Row Address bits[0:3], Column Address bits[0:3] BYTE5 FUNCTION -840 -845 -745 Hex VALUE -653 -840 -845 SPD Revision 1.0 02h 256Bytes 08h Direct RDRAM 01h RIMM 01h 9bits, 7bits 97h Bank Address bits and Type 32Banks (5bank bits) C5h BYTE6 Refresh Bank bits 32 Refresh Bank Sets 05h BYTE7 Refresh Reriod (tREF) 32ms 20h BYTE8 Protocol Version BYTE9 Miscellaneous Device Configuration Field BYTE10 Protocol Version 1 02h DQS=1.5, no-LP, S28, S3 05h Minimum Precharge to RAS time(tRP-R,Min) 8cycles 08h BYTE11 Minimum RAS to Precharge time(tRAS-R,Min) 20cycles BYTE12 Minimum RAS to CAS time(tRCD-R,Min) BYTE13 Minimum RAS to RAS time(tRR-R,Min) BYTE14 Minimum Precharge to Precharge time(tPP-R,Min) BYTE15 Min tCYCLE for RangeA BYTE16 Max tCYCLE for RangeA 3.83ns 1Eh BYTE17 tCDLY Range for RangeA 5tCYCLE ~ 9tCYCLE 59h BYTE18 tCLS and tCAS Range for RangeA 2tCYCLE for tCLS & tCAS AAh BYTE19 Min tCYCLE for RangeB Reserved 00h BYTE20 Max tCYCLE for RangeB Reserved 00h BYTE21 tCDLY Range for RangeB Reserved 00h BYTE22 tCLS and tCAS Range for RangeB Reserved 00h BYTE23 Min tCYCLE for RangeC Reserved 00h BYTE24 Max tCYCLE for RangeC Reserved 00h BYTE25 tCDLY Range for RangeC Reserved 00h BYTE26 tCLS and tCAS Range for RangeC Reserved 00h BYTE27 Min tCYCLE for RangeD Reserved 00h BYTE28 Max tCYCLE for RangeD Reserved 00h BYTE29 tCDLY Range for RangeD Reserved 00h BYTE30 tCLS and tCAS Range for RangeD Reserved 00h 4us 04h 9000tCYCLE 8Dh 50ns 32h BYTE31 BYTE32 8cycles Nap Exit Max.time, PhaseA(tNAPXA,Max) BYTE34 Nap Exit Max.time, PhaseB(tNAPXB,Max) BYTE35 fIMIN[11:8], fIMAX[11:8] BYTE36 fIMIN[7:0] BYTE37 fIMAX[7:0] BYTE38 ODF Mapping BYTE39 BYTE40 08h 0Ah 2.80ns 261MHz, 357MHz 13h 357MHz 1Ah 65h 2Ch 11h 05h 300MHz 90h Reserved 00h Max time between Current Control(tCCTRL,Max) 100ms 64h Max time between Temp. Calibration(tTEMP,Max) 100ms 64h BYTE41 Max time between Temp. Calibration Enable and Command (tTCEN,Min) 150tCYCLE 96h BYTE42 Maximum RAS to Precharge time(tRAS-R,Max) 64us 40h BYTE43 Maximum time that a Device can stay in Nap Mode (tNLIMIT,Max) 10us 0Ah Rev. 1.1/July 01 15h 28h 261MHz, 300MHz 261MHz 400MHz 08h 08h 3.33ns 40ns 261MHz, 400MHz 08h NOTE 08h 8cycles 2.50ns -653 14h 8cycles 8cycles Power Down Exit Max. time, PhaseA(tPDNXA,Max) Power Down Exit Max. time, PhaseB(tPDNXB,Max) BYTE33 8cycles 10cycles -745 3 HYMR2xxx16(18)H Rambus Module Serial Presence Detect Continued BYTE NUMBER FUNCTION DESCRIPTION Opti on FUNCTION Hex VALUE NOTE -840 -845 -745 -653 -840 -845 6tCYCLE, 6tCYCLE -745 -653 65h 2Ch BYTE44 ACTREFPT[3:0], PCHREFPT[3:0] BYTE45 CPCHREFPT_DC[3:0], RDREFPT_DC[3:0] 5tCYCLE, 5tCYCLE 55h BYTE46 RETREFPT_DC[3:0], WRREFPT_DC[3:0] 5tCYCLE, 13tCYCLE 5Dh BYTE47~ 49 Reserved - 00h BYTE50 fRAS[11:8] BYTE51 fRAS[7:0] BYTE52 PMAX,HI,PMAX,LO,Tj BYTE53 HeatSpreader, thermal sensor, Tplate BYTE54 PSTBY,HI 130mA 120mA 110mA 82h 78h 6Eh BYTE55 PACTI,HI 200mA 190mA 180mA 64h 5Fh 5Ah BYTE56 PACTRW,HI 750mA 700mA 650mA 5Eh 58h 4Bh BYTE57 PSTBY,LO TBD TBD TBD 00h 00h 00h BYTE58 PACTI,LO TBD TBD TBD 00h 00h 00h BYTE59 PACTRW,HI TBD TBD TBD 00h 00h 00h BYTE60 PNAP 4.2mA 21h BYTE61 PRESA(Reserved for a future thermal parameter) Reserved 00h BYTE62 PRESB(Reserved for a future thermal parameter) Reserved BYTE63 Checksum for bytes 0 ~ 62 A2h 19h BYTE64 Module Manufacturer ID Code BYTE65~ 71 ..... Module Manufacturer ID Code 01h 400MHz BYTE72 Module Manufacturing Location BYTE73 Module Part Number (Component) BYTE74 Module Part Number (256/288Mb based) BYTE75 BYTE76 BYTE77 Module Part Number (Memory Width) ... Module Part Number (Memory Width) ..... Module Part Number (Memory Width) Rev. 1.1/July 01 66h 357MHz 300MHz 90h 24h 0,0,100℃ A4h 1,0,100℃ - 00h 0Bh 0Dh Hynix ADh Hynix 00h Hynix (Korea Area) HSA (United States Area) HSE (Europe Area) HSJ (Japan Area) Asia Area 0*h 1*h 2*h 3*h 4*h 1 R (Rambus) 52h 2,3 2 32h 2,3 2D Blank 20h 4D Blank 20h 8D 1 31h 12D 1 31h 16D 2 32h 2D 3 33h 4D 6 36h 8D 2 32h 12D 9 39h 16D 5 35h 2D 3 32h 4D 4 34h 8D 8 38h 12D 2 32h 16D 6 36h 2,3 2,3 2,3 4 HYMR2xxx16(18)H Rambus Module Serial Presence Detect Continued BYTE NUMBER BYTE78 BYTE79 FUNCTION DESCRIPTION Opti on FUNCTION Hex VALUE NOTE -840 -845 -745 -653 -840 -845 -745 16bits 1 31h 18bits 1 31h 16bits 6 36h 18bits 8 38h -653 Module Part Number (Data Width) 2,3 ..... Module Part Number (Data Width) 2,3 BYTE80 Module Part Number (Manufacturing Site) BYTE81 Module Part Number (Hyphent) BYTE82 Module Part Number (tRAC & Speed) 8 8 7 6 38h 38h 37h 36h 2,3 BYTE83 Module Part Number (tRAC & Speed) 4 4 4 5 34h 34h 34h 35h 2,3 BYTE84 Module Part Number (tRAC & Speed) 0 5 5 3 30h 35h 35h 33h 2,3 BYTE85 ~90 BYTE91~ 92 48h 2,3 2Dh 2,3 Blank 20h Module Revision Code - - BYTE93 Module Manufacturing Year - - BYTE94 Module Manufacturing Week - - BYTE95 ~98 Module Serial Number - - 2D 2 02h 4D 4 04h 8D 8 08h 12D 12 0Ch 16D 16 10h 16bits 16 10h 18bits 18 12h 2D All 2Devices 03h 4D All 4Devices 0Fh 8D All 8Devices FFh 12D All 12Devices FFh 16D All 16Devices FFh 2D All 2Devices 00h 4D All 4Devices 00h BYTE99 BYTE100 BYTE101 BYTE102 Module Part Number H -(Hyphen) Number of Devices on module 2,3 Module Data Width Device Enalbes ..... Device Enalbes 8D All 8Devices 00h 12D All 12Devices 0Fh 16D All 16Devices FFh - 00h 2.5Vdd,1.8Vterm 10h 5% DC, 2% AC 52h - 00h BYTE103 ~104 ..... Device Enalbes BYTE105 Module Vdd, Module Voltage Interface Level BYTE106 Module Vdd Tolerance BYTE107 ~113 Reserved BYTE114 CDLY0/1 for tCDLY=3 - 00h BYTE115 CDLY0/1 for tCDLY=4 2/0 20h BYTE116 CDLY0/1 for tCDLY=5 3/0 30h BYTE117 CDLY0/1 for tCDLY=6 3/1 31h BYTE118 CDLY0/1 for tCDLY=7 3/2 32h BYTE119 CDLY0/1 for tCDLY=8 4/2 42h Rev. 1.1/July 01 5 HYMR2xxx16(18)H Rambus Module Serial Presence Detect Continued BYTE NUMBER FUNCTION DESCRIPTION FUNCTION Hex VALUE Option NOTE -840 -845 -745 -653 -840 -845 -745 BYTE120 CDLY0/1 for tCDLY=9 5/2 52h BYTE121 CDLY0/1 for tCDLY=10 - 00h BYTE122 CDLY0/1 for tCDLY=11 - 00h BYTE123 CDLY0/1 for tCDLY=12 - 00h BYTE124 CDLY0/1 for tCDLY=13 - 00h BYTE125 CDLY0/1 for tCDLY=14 - 00h BYTE126 CDLY0/1 for tCDLY=15 16bit s BYTE127 00h 2 BEh 4D 4 CCh 8D 8 C0h 12D 12 D3h 16D 16 C7h 2D 2 C0h 4D 4 CEh 8D 8 C2h 12D 12 D5h 16D 16 C9h - Undefined Checksum for bytes 99 - 126 18bit s BYTE128 + 2D -653 Open for Customer use Note : 1. Refer to Hynix Web Site. 2. ASCII adopted 3. Basically Hynix writes Part No. except for ‘HYM’ in Byte 73~90 to use the limited 18 bytes from byte 73 to byte 90 Rev. 1.1/July 01 6