ETC IRU1261CP

Data Sheet No. PD94139
IRU1261
DUAL 6A AND 1A LOW DROPOUT
POSITIVE FIXED 1.5V AND 2.5V REGULATOR
DESCRIPTION
FEATURES
Guaranteed to Provide 1.5V and 2.5V Supplies
with 3.1V Input
Fast Transient Response
1% Voltage Reference Initial Accuracy
Built-In Thermal Shutdown
The IRU1261, using a proprietary process, combines a
dual low dropout regulator with fixed outputs of 1.5V and
2.5V in a single package with the 1.5V output having a
minimum of 6A and the 2.5V having a 1A output current
capability. This product is specifically designed to provide well regulated supplies from 3.3V to generate 1.5V
for GTL+ termination resistor supply and 2.5V clock
supply for the new generation of the Pentium II processor applications.
APPLICATIONS
Pentium II Processor Applications
TYPICAL APPLICATION
3.3V
C1
IRU1261
Vout1
5
Vin
4
Gnd
3
Vout2
2
Vctrl
1
2.5V / 1A
C3
C2
1.5V / 6A
C4
5V
1261app1-1.3
R1
Figure 1 - Typical application of IRU1261 in a Pentium II processor application
PACKAGE ORDER INFORMATION
Tj (°C)
0 To 150
Rev. 1.8
07/03/01
5-PIN PLASTIC
TO-220 (T)
IRU1261CT
5-PIN PLASTIC
TO-263 (M)
IRU1261CM
5-PIN PLASTIC
Ultra Thin-Pak (P)
IRU1261CP
1
IRU1261
ABSOLUTE MAXIMUM RATINGS
Input Voltage (Vin) ....................................................
Power Dissipation ......................................................
Storage Temperature Range ......................................
Operating Junction Temperature Range .....................
7V
Internally Limited
-65°C To 150°C
0°C To 150°C
PACKAGE INFORMATION
7-PIN PLASTIC TO-220 (T)
FRONT VIEW
7-PIN PLASTIC TO-263 (M)
7-PIN ULTRA THIN-PAK (P)
FRONT VIEW
FRONT VIEW
5
Vout1
Vin
4
3
Gnd
Vout2
2
1
Vctrl
θJT=2.7$C/W, θJA=60$C/W
5
Vout1
5
Vout1
4
Vin
4
Vin
3
Gnd
3
Gnd
2
Vout2
2
Vout2
1
Vctrl
1
Vctrl
θJA=30$C/W for 1"sq pad
θJA=30$C/W for 1"sq pad
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Cin=1µF, Cout=100µF and Tj=0 to 150$C. Typical
values refer to Tj=25$C. IFL=6A for output #2 and 1A for output #1. Vctrl=5V, Vin=3.3V.
PARAMETER
Vctrl Input Voltage
Output Voltage #2
SYM
TEST CONDITION
Vo2
Output Voltage #1
Vo1
Io=10mA, Tj=25°C
Io=10mA
Io=10mA, Tj=25°C
Io=10mA
Io=10mA, 3.1V<Vin<3.6V
10mA<Io<IFL
Note 2, Io=6A, Vctrl=4.75V
Note 2, Io=1A, Vctrl=4.75V
∆Vo=100mV
∆Vo=100mV
Note 3
30ms Pulse, Io=IFL
f=120Hz ,Co=25µF Tantalum,
Io=0.5 × IFL
Io=10mA
Tj=125$C, 1000Hrs
10Hz<f<10KHz
Line Regulation
Load Regulation (Note 1)
Dropout Voltage (Output #2)
Dropout Voltage (Output #1)
Current Limit (Output #2)
Current Limit (Output #1)
Minimum Load Current
Thermal Regulation
Ripple Rejection
Temperature Stability
Long Term Stability
RMS Output Noise
Note 1: Low duty cycle pulse testing with Kelvin connections is required in order to maintain accurate data.
Note 2: Dropout voltage is defined as the minimum differential voltage between Vin and Vout required to maintain regulation at Vout. It is measured when the output
voltage drops 1% below its nominal value.
2
MIN
TYP
3.0
1.485 1.500
1.470 1.500
2.462 2.500
2.425 2.500
0.2
0.4
MAX
1.515
1.530
2.537
2.575
0.4
1.3
0.6
5
0.01
10
0.02
6.1
1.1
70
0.5
0.3
0.003
UNITS
V
V
V
%
%
V
V
A
A
mA
%/W
dB
%
%
%Vo
Note 3: Minimum load current is defined as the minimum current required at the output in order for the output voltage to maintain regulation. Typically the resistor
dividers are selected such that it automatically maintains this current.
Rev. 1.8
07/03/01
IRU1261
PIN DESCRIPTIONS
PIN # PIN SYMBOL
1
Vctrl
PIN DESCRIPTION
The control input pin of the regulator. This pin is connected, via a 10Ω resistor, to the
5V supply to provide the base current for the pass transistor of both regulators. This
allows the regulator to have very low dropout voltage which allows one to generate a
well regulated 2.5V supply from the 3.3V input. A high frequency, 1µF capacitor is
connected between this pin and Vin pin to insure stability.
2
Vout2
The output #2 (high current) of the regulator. A minimum of 100µF capacitor must be
connected from this pin to ground to insure stability.
3
Gnd
This pin is connected to ground. It is also the Tab of the package.
4
Vin
The power input pin of the regulator. Typically a large storage capacitor is connected
from this pin to ground to insure that the input voltage does not sag below the minimum
drop out voltage during the load transient response. This pin must always be higher
than both Vout pins by the amount of the dropout voltage (see data sheet) in order for
the device to regulate properly.
5
Vout1
The output #1 (low current) of the regulator. A minimum of 100µF capacitor must be
connected from this pin to ground to insure stability.
BLOCK DIAGRAM
Vin 4
5 Vout1
Vctrl 1
THERMAL
SHUTDOWN
1.20V
3 Gnd
+
1261blk1-1.1
2 Vout2
Figure 2 - Simplified block diagram of the IRU1261
Rev. 1.8
07/03/01
3
IRU1261
APPLICATION INFORMATION
Introduction
The IRU1261 is a dual fixed output Low Dropout (LDO)
regulator available in a 5-pin TO-220 or TO-263 packages. This voltage regulator is designed specifically for
PentiumII processor applications requiring 2.5V and 1.5V
supplies, eliminating the need for a second regulator resulting in lower overall system cost. The IRU1261 is designed to take advantage of 5V supply to provide the
drive for the pass transistor, allowing 2.5V supply to be
generated from 3.3V input. This feature improves the
power dissipation of the 2.5V regulator substantially allowing a smaller heat sink to be used for the application. Compared to the IRU1260 dual adjustable regulator, the IRU1261 includes the resistor dividers that are
otherwise needed with the IRU1260, eliminating four external components and their tolerances, resulting in a
more accurate initial accuracy for each output voltage.
Other features of the device include: fast response to
sudden load current changes, such as GTL+ termination application and thermal shutdown protection to protect the device if an overload condition occurs.
mum continuous load operation the junction temperature is kept below this number. Two examples are given
which shows the steps in selecting the proper regulator
heat sink for driving the Pentium II processor GTL+ termination resistors and the Clock IC using IRU1261 in
TO-220 and TO-263 packages.
Example # 1:
Assuming the following specifications:
VIN = 3.3V
VOUT2 = 1.5V
VOUT1 = 2.5V
IOUT2(MAX) = 5.4A
IOUT1(MAX) = 0.4A
TA = 35$C
The steps for selecting a proper heat sink to keep the
junction temperature below 135$C is given as:
1) Calculate the maximum power dissipation using:
Stability
The IRU1261 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for the microprocessor
applications use standard electrolytic capacitors with
typical ESR in the range of 50 to 100mΩ and the output
capacitance of 500 to 1000µF. Fortunately as the capacitance increases, the ESR decreases resulting in a
fixed RC time constant. The IRU1261 takes advantage
of this phenomena in making the overall regulator loop
stable. For most applications a minimum of 100µF aluminum electrolytic capacitor with the maximum ESR of
0.3Ω such as Sanyo, MVGX series, Panasonic FA series as well as the Nichicon PL series insures both stability and good transient response. The IRU1261 also
requires a 1µF ceramic capacitor connected from Vin to
Vctrl and a 10Ω, 0.1W resistor in series with Vctrl pin in
order to further insure stability.
Thermal Design
The IRU1261 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction temperatures in the range of 150$C, it is recommended that the
selected heat sink be chosen such that during maxi-
4
PD = IOUT1 × (VIN - VOUT1) + IOUT2 × (VIN - VOUT2)
PD = 0.4 × (3.3 - 2.5) + 5.4 × (3.3 - 1.5) = 10W
2) Select a package from the data sheet and record its
junction to case (or Tab) thermal resistance.
Selecting TO-220 package gives us:
θJC = 2.7$C/W
3) Assuming that the heat sink is black anodized, calculate the maximum heat sink temperature allowed:
Assume, θCS = 0.05$C/W (heat-sink-to-case thermal
resistance for black anodized)
TS = TJ - PD × (θJC + θCS)
TS = 135 - 10 × (2.7 + 0.05) = 107.4$C
4) With the maximum heat sink temperature calculated
in the previous step, the heat-sink-to-air thermal resistance θSA is calculated as follows:
∆T = TS - TA = 107.4 - 35 = 72.4$C
θSA =
∆T
72.4
=
= 7.24$C/W
PD
10
Rev. 1.8
07/03/01
IRU1261
5) Next, a heat sink with lower θSA than the one calculated in Step 4 must be selected. One way to do this
is to simply look at the graphs of the “Heat Sink Temp
Rise Above the Ambient” vs. the “Power Dissipation”
and select a heat sink that results in lower temperature rise than the one calculated in previous step.
The following heat sinks from AAVID and Thermalloy
meet this criteria.
Thermalloy
AAVID
Air Flow (LFM)
0
100
200
300
400
7021B 7020B 6021PB 7173D
7141D
593101B 551002B 534202B 577102B 576802B
Note: For further information regarding the above companies and their latest product offering and application support contact your local representative or the
numbers listed below:
Thermalloy..........PH# (214) 243-4321
AAVID.................PH# (603) 528-3400
Example # 2 :
Assuming the following specifications:
VIN = 3.3V
VOUT2 = 1.5V
VOUT1 = 2.5V
IOUT2(MAX) = 1.5A
IOUT1(MAX) = 0.2A
TA = 35$C
Rev. 1.8
07/03/01
The steps for selecting a proper heat sink to keep the
junction temperature below 135$C is given as:
1) Calculate the maximum power dissipation using:
PD = IOUT1 × (VIN - VOUT1) + IOUT2 × (VIN - VOUT2)
PD = 0.2 × (3.3 - 2.5) + 1.5 × (3.3 - 1.5) = 2.86W
2) Assuming a TO-263 surface mount package, the junction to ambient thermal resistance of the package is:
θJA = 30$C/W for 1" square pad area
3) The maximum junction temperature of the device is
calculated using the equation below:
TJ = TA - PD × θJA
TJ = 35 - 2.86 × 30 = 121$C
Since this is lower than our selected 135$C maximum junction temperature (150$C is the thermal shutdown of the device), TO-263 package is a suitable
package for our application.
Layout Consideration
The IRU1261 like all other high speed linear regulators
need to be properly laid out to insure stable operation.
The most important component is the output capacitor,
which needs to be placed close to the output pin and
connected to this pin using a plane connection with a
low inductance path.
5
IRU1261
TYPICAL APPLICATION
PENTIUM ΙΙ APPLICATION
3.3V
C1
IRU1261
1261app1-1.3
Vout1
5
Vin
4
Gnd
3
Vout2
2
Vctrl
1
2.5V / 1A
C3
C2
1.5V / 6A
C4
5V
R1
Figure 3 - Typical application of IRU1261 in the Pentium ΙΙ design with the 1.5V
output providing for GTL+ termination while 2.5V supplies the clock chip
Note: Pentium ΙΙ is trademark of Intel Corp.
Ref Desig
U1
C1, C4
C3
C2
R1
HS1
Description
Dual LDO Regulator
Capacitor
Capacitor
Capacitor
Resistor
Heat Sink
Qty
Part #
Manuf
1
IRU1261CM
IR
2 Elect, 680µF, EEUFA1A681L
Panasonic
1 Elect, 220µF, 6.3V, ECAOJFQ221 Panasonic
1 Ceramic, 1µF, 16V, Z5U
1
3Ω, 0.1W, 0805 SMT
Panasonic
1) Use 1" Square Copper Pad area if IOUT2<1.7A and
IOUT1<0.2A.
2) For IOUT2<3A and IOUT1<0.5A, use IRU1261CT and
Thermalloy 6030B
3) For IOUT2<5.4A and IOUT1<0.5A, use IRU1261CT and
Thermalloy 7021B
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TAC Fax: (310) 252-7903
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Data and specifications subject to change without notice. 02/01
6
Rev. 1.8
07/03/01