ETC LM1279A

LM1279A
110 MHz RGB Video Amplifier System with OSD
General Description
The LM1279A is a full featured and low cost video amplifier
with OSD (On Screen Display). 8V operation for low power
and increased reliability. Supplied in a 20-pin DIP package,
accommodating very compact designs of the video channel
requiring OSD. All video functions controlled by 0V to 4V
high impedance DC inputs. This provides easy interfacing to
5V DACs used in computer controlled systems and digital
alignment systems. Unique OSD switching, no OSD switching signal required. An OSD signal at any OSD input typically
switches the LM1279A to the OSD mode within 5 ns. Ideal
video amplifier for the low cost OSD monitor with resolutions
up to 1024 x 768. The LM1279A provides superior protection
against ESD. Excellent alternative for the MC13282 in new
designs.
Features
n Three wideband video amplifiers 110 MHz @ −3dB (4
VPP output)
n OSD signal to any OSD input pin automatically switches
all 3 outputs to the OSD mode
Fast OSD switching time, typically 5 ns
3.5 kV ESD protection
Fixed cutoff level typically set to 1.2V
0V to 4V, high impedance DC contrast control with over
40 dB range
n 0V to 4V, high impedance DC drive control (0 dB to
−12 dB range)
n Matched ( ± 0.1 dB or 1.2%) attenuators for contrast
control
n Output stage directly drives most hybrid or discrete CRT
drivers
n
n
n
n
Applications
n
n
n
n
High resolution RGB CRT monitors
Video AGC amplifiers
Wideband amplifiers with contrast and drive controls
Interface amplifiers for LCD or CCD systems
Block and Connection Diagram
DS101250-1
FIGURE 1. Order Number LM1279AN
See NS Package Number N20A
© 1999 National Semiconductor Corporation
DS101250
www.national.com
LM1279A 110 MHz RGB Video Amplifier System with OSD
October 1999
LM1279A
Absolute Maximum Ratings (Note 1)
Thermal Resistance to Case (θJA)
Junction Temperature (TJ)
ESD Susceptibility (Note 4)
ESD Machine Model (Note 16)
Storage Temperature
Lead Temperature
(Soldering, 10 sec.)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Pins 2 and 16 (Note 3)
Peak Video Output Source Current
(Any One Amp) Pins 13, 15, or 18
Voltage at Any Input Pin (VIN)
Power Dissipation (PD)
(Above 25˚C Derate Based on θJA
and TJ)
Thermal Resistance to Ambient (θJA)
10V
VCC ≥ VIN
28 mA
≥ GND
37˚C/W
150˚C
3.5 kV
300V
−65˚C to 150˚C
265˚C
Operating Ratings (Note 2)
Temperature Range
Supply Voltage (VCC)
0˚C to 70˚C
7.5V ≤ VCC ≤ 8.5V
2.1W
60˚C/W
DC Electrical Characteristics
TA = 25˚C; VCC1 = VCC2 = 8V; V10 = 4V; VDrive = 4V; V11 = 7V; VOSD = 0V unless otherwise stated.
Symbol
Parameter
Condition
IS
Supply Current
V3, 5, 8
Video Amplifier Input Bias Voltage
RIN
Video Input Resistance
V11clamp
Clamp Voltage
I11 clamp off
Clamp Off Current
V11 = 0V
I11 clamp on
Clamp On Current
V11 = 6.5V
I clamp
Clamp Cap Charge Current
Clamp Comparators On
I bias
Clamp Cap Bias Discharge
Current
Clamp Comparators Off
ICC1 + ICC2 − ILoad (Note 7)
Any One Amplifier
Typical
(Note 5)
Limit
(Note 6)
Units
80
90
mA(max)
2.5
V
20
kΩ
3.2
3.6
V (min)
−5.0
−8.0
µA(max)
−100
−500
nA (max)
± 750
± 500
µA(min)
50
200
nA (max)
1.35
1.55
V (max)
± 50
± 200
mV (max)
5.0
4.6
V (min)
−0.25
−1.5
µA (max)
VOL
Video Black Level
VVideo
∆VOL
Video ∆Black Level Output
Voltage
Between Any Two Amplifiers
VOH
Video Output High Voltage
V11 < 1.2V
I10, 12, 14, 17
Contrast/Drive Control Input
Current
VContrast = VDrive = 0V to 4V
I1I, 19I, 20I
OSD Low Input Current (each)
VOSD
in
= 0V
−2.5
−10
µA(max)
I1h, 19h, 20h
OSD High Input Current (each)
VOSD
in
= 5V
100
130
µA (max)
in
= 0V, V11 = 6.5V
AC Electical Characteristics
TA = 25˚C; VCC1 = VCC2 = 8V. Manually adjust Video Output pins 13, 15, and 18 to 4V DC for the AC test unless otherwise
stated. (Note 15)
Symbol
AVmax
Parameter
Video Amplifier Gain
Conditions
Typical
(Note 5)
Limit
(Note 6)
Units
V10 = 4V, VIN = 635 mVPP
6.8
5.9
V/V (min)
Vdrive = 4V
16.7
15.4
dB (min)
∆AV 2V
Contrast Attenuation @ 2V
Ref: AV max, V10 = 2V
−6
dB
∆AV 0.25V
Contrast Attenuation @ 0V
Ref: AV max, V10 = 0V
−35
dB
∆Drive
Drive Control Range
Vdrive = 0V to 4V, V10 = 4V
AV match
Absolute Gain Match @ AV max
V10 = 4V, Vdrive = 4V (Note 9)
AV track
Gain Change Between Amplifiers
V10 = 4V to 2V (Notes 9, 10)
f(−3 dB)
Video Amplifier Bandwidth
V10 = 4V, Vdrive = 4V,
(Notes 11, 12))
VO = 3.5 VP-P
12
dB
± 0.3
± 0.3
dB
110
MHz
ns
dB
tr(Video)
Video Output Rise Time
VO = 3.5 VP-P (Note 11)
3.6
tf(Video)
Video Output Fall Time
VO = 3.5 VP-P (Note 11)
3.2
ns
Vsep 10 kHz
Video Amplifier 10 kHz Isolation
V10 = 4V (Note 13)
−70
dB
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2
(Continued)
Symbol
Parameter
Conditions
Typical
(Note 5)
Limit
(Note 6)
Vsep 10 MHz
Video Amplifier 10 MHz Isolation
V10 = 4V (Notes 11, 13)
∆VOL(OSD)
OSD Black Level, Difference from
Video Black Level
VOSD
VOH(OSD)
OSD Output High Voltage (above
measured video black level)
VOSD
tr(OSD)
Going into OSD Mode
OSD Mode (Figure 2)
5.0
ns
tf(OSD)
Going out of OSD Mode
OSD Mode (Figure 2)
10.0
ns
in
= 0.8V, OSD Mode
in
= 2.5V, OSD Mode
−50
Units
dB
−0.4
−0.7
V (max)
2.1
2.4
V (max)
tr-prop(OSD)
Starting OSD Propagation Delay
Switching to OSD Mode (Figure 3)
13.0
ns
tf-prop(OSD)
Ending OSD Propagation Delay
Switching to Vid. Mode (Figure 3)
14.0
ns
Tpw(Clamp)
Input Clamp Pulse Width
(Note 14)
200
ns (min)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: VCC supply pins 2 and 16 must be externally wired together to prevent internal damage during VCC power on/off cycles.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Typical specifications are specified at +25˚C and represent the most likely parametric norm.
Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 7: The supply current specified is the current for VCC1 and VCC2 minus the current through RL (Isupply = ICC1 + ICC2 − IL). The supply current for VCC2 (pin 16)
does depend on the output load. With video output at 1V DC, the additional current through VCC2 is 7.7 mA with RL = 390Ω.
Note 8: Output voltage is dependent on load resistor. Test circuit uses RL = 390Ω.
Note 9: Measure gain difference between any two amplifiers. VIN = 635 mVPP.
Note 10: ∆AV track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators. It is the difference in
gain change between any two amplifiers with the contrast voltage (V10) at either 4V or 2V measured relative to an AV max condition, V10 = 4V. For example, at AV
max the three amplifiers’ gains might be 17.1 dB, 16.9 dB, and 16.8 dB and change to 11.2 dB, 10.9 dB and 10.7 dB respectively for V10 = 2V. This yields the measured typical ± 0.1 dB channel tracking.
Note 11: When measuring video amplifier bandwidth or pulse rise and fall times, a double sided full ground plane printed circuit board without socked is recommended. Video amplifier 10 MHz isolation test also requires this printed circuit board. The reason for a double sided full ground plane PCB is that large measurement
variations occur in single sided PCBs.
Note 12: Adjust input frequency from 10 MHz (AV max reference level) to the −3 dB corner frequency (f−3 dB).
Note 13: Measure output levels of the other two undriven amplifiers relative to the driven amplifier to determine channel separation. Terminate the undriven amplifier
inputs to simulate generator loading. Repeat test at fIN = 10 MHz for Vsep 10 MHz.
Note 14: A minimum pulse width of 200 ns is guaranteed for a horizontal line of 15 kHz. This limit is guaranteed by design. If a lower line rate is used then a longer
clamp pulse may be required.
Note 15: During the AC test the 4V DC level is the center voltage of the AC output signal. For example, if the output is 4 VPP the signal will swing between 2V DC
and 6V DC.
Note 16: Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200 pF cap is charged to the specified voltage, then discharged directly into the
IC with no external series resistor (resistance of discharge path must be under 50Ω).
3
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LM1279A
AC Electical Characteristics
TA = 25˚C; VCC1 = VCC2 = 8V. Manually adjust Video Output pins 13, 15, and 18 to 4V DC for the AC test unless otherwise
stated. (Note 15)
LM1279A
Timing Diagrams
DS101250-2
FIGURE 2. OSD Rise and Fall Times
DS101250-3
FIGURE 3. OSD Propagation Delays
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4
LM1279A
Test Circuits
DS101250-5
**Note: All video inputs must have a series 30Ω resistor for protection against EOS (Electrical Over Stress). If the OSD signals are external to the monitor, or
these signals are present any time when +8V is not fully powered up, then the OSD inputs also require a series 30Ω resistor.
FIGURE 4. LM1279A OSD Video Pre-amp Demonstration Board Schematic
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LM1279A
Pin Descriptions
Pin
No.
Pin
Name
Schematic
Description
These are standard TTL inputs. An OSD
signal at any of the three pins will
automatically switch the pre-amp into the
OSD mode. 7 colors, including white, are
available.
1
Red OSD Input
19
Blue OSD Input
20
Green OSD Input
2
VCC1
Power supply pin (excluding output stage)
3
Red Video In
5
Green Video In
Video inputs. These inputs must be AC
Coupled with a minimum of a 1 µF cap, 10
µF is preferred. A series resistor of about
33Ω must be used for ESD protection.
8
Blue Video In
4
Red Clamp Cap
7
Green Clamp Cap
9
Blue Clamp Cap
The external clamp cap is charged and
discharged to the correction voltage
needed for DC restoration. 0.1 µF is the
recommended value.
6
Ground
Ground pin.
10
Contrast
12
Blue Drive
14
Green Drive
Contrast control pin:
4V - no attenuation
0V - over 40 dB attenuation
Drive control pins:
4V - no attenuation
0V - 20 dB attenuation
17
Red Drive
11
Clamp Pulse
The clamp pulse activates the DC
restoration circuitry. A 3.6V input is
required to activate the clamp pulse.
13
Blue Video Out
Video output. For proper black level the
output must drive 390Ω impedance.
15
Green Video Out
18
Red Video Out
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6
Pin
No.
16
LM1279A
Pin Descriptions
(Continued)
Pin
Name
Schematic
Description
Power supply pin for the output stage.
There are no internal connections to VCC1.
VCC2
ESD and Arc-Over Protection
against arc-over. The pre-amp vulnerability is mainly through
the ground traces on the PCB. For proper operation all
ground connections associated with the video pre-amp, including the grounds to the bypass capacitors, must have
short returns to the ground pins. A significant ground plane
should be used to connect all the pre-amp grounds. Figure
16, the demo board layout, is an excellent example on an effective ground plane, yet using only a single sided PCB layout. Here is a check list to make sure a PC board layout has
good grounding:
The ESD cells of the LM1279A are improved over the ESD
cells used in typical video pre-amps. The monitor designer
must still use good PC board layout techniques when designing with the LM1279A. The human body model ESD
susceptibility of these parts is rated at 3 kV (Note 4). However, many monitor manufacturers are now testing their
monitors to the level 4 of the IEC 801-2 specification. This requires the inputs to the monitor to survive an 8 kV discharge.
If the monitor designer expects to survive such levels he
MUST provide external ESD protection to the video pre-amp
inputs! PC board layout is very important with LM1279A as
with other video pre-amps. The LM1279A provides excellent
protection against ESD and arc-over, but the LM1279A is not
a substitute for good PCB layout.
Figure 5 shows the recommended input protection for a
video pre-amp. The two diodes at the video pre-amp input
and after the 30Ω series resistor offers the best protection
against ESD. When this protection is combined with a good
PCB layout, the video pre-amp will easily survive the IEC
801-2 level 4 (8 kV ESD) testing commonly done by monitor
manufacturers. If the protection diodes are moved to the
video input side of the 30Ω resistor, then the ESD protection
will be less effective. There is also the risk of damaging the
diodes since there is no resistor for current limiting. In such
a design a heavier duty diode, such as the FDH400, should
be used. It is strongly recommended that the protection diodes be added as shown in Figure 5. The 1N4148 diode has
a maximum capacitance of 4 pF. This would have little affect
on the response of the video system due to the low impedance of the input video.
Many monitor designers prefer to use a single zener diode
instead of the recommended two diodes at the video preamp input. The required location of the zener diode is shown
in Figure 5. It is shown as a dashed line, indicating an alternative to the two diode solution. The zener diode does give
the savings of one component, but now the protection is less
effective. To minimize capacitance, the zener diode needs to
have a zener voltage of 24V or higher. This is well above the
VCC voltage of the LM1279A. The zener diode must be located at the video input for protection against a low voltage
surge. The 30Ω resistor is needed to limit the current of such
a voltage surge, protecting the video pre-amp. Protection
against ESD by using a zener diode is about as effective as
having the two diodes at the video input (same location as
the zener diode). A higher series resistor may be necessary
for protection against the zener voltage, but the higher resistor value will impair the performance of the LM1279A; resulting in a lower bandwidth and a less stable black level. For
maximum reliability the monitor designer should not consider
the zener diode solution for ESD protection of the LM1279A.
The ESD cells of the LM1279A also gives good tolerance
against arc-over. Once again the monitor designer must be
careful in his PCB layout for good arc-over protection. In the
video chain only the outputs of the CRT driver are directly
exposed to the voltages that may occur during arc-over. A
good PCB layout is the best protection for the video pre-amp
•
All associated grounds with the video pre-amp are connected together through a large ground plane.
•
CRT driver ground is connected to the video pre-amp
ground at one point.
•
CRT and arc protection grounds are connected directly to
chassis, or the main ground. There is no arc-over current
flow from these grounds through the pre-amp or CRT
driver grounds.
If any one of the above suggestions are not followed, then
the LM1279A may become vulnerable to arc-over. Improper
grounding is by far the most common cause of a video preamp failure during arc-over.
DS101250-12
FIGURE 5. Recommended Video Input ESD Protection
Functional Description
Figure 1 on the front page shows the block diagram of the
LM1279A along with the pinout of the IC. Each channel receives a video input signal at its input amplifier (-A1). The
output of the input amplifier goes to the contrast attenuator
stage. For easy interfacing to 5V DACs all controls inputs, including the contrast control, use a 0V to 4V range. The contrast control has no attenuation with an input of 4V, and has
full attenuation (over −40 dB) with a 0V input. All three channels will accurately track the contrast control setting at pin
10. Each channel will have the same amount of attenuation
for a given input voltage typically to within ± 0.3 dB. All channels will track because the contrast control is the first stage
of attenuation and the internal control voltage generated
from the input voltage is common to all three channels.
The output of the contrast attenuator goes to the drive attenuator. This stage has a 12 dB control range. This stage is
used for color balance, so the adjustment range has been
limited to 12 dB for a more accurate color balance. Each
7
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LM1279A
Functional Description
drivers can be used in this board, but the LM2407 is considered the best match to the LM1279A based on cost and performance.
Some important notes on Figure 4. All three video inputs
have a 75Ω terminating resistor for a 75Ω video system. This
is the normal video impedance of the video from a computer
system. It is possible to also have a 50Ω system, then R1,
R3, and R5 would be changed to 50Ω. R2, R4, and R6 are in
series with the video inputs of the LM1279A. These three
30Ω resistors are required to protect the IC from any sudden
voltage surges that may result during the power up and
power down modes, or when connecting the monitor to other
equipment. The monitor designer must include these resistors in his design for good monitor reliability. If additional protection against ESD at the video inputs is necessary, then
adding clamp diodes on the IC side of the 30Ω resistors is
recommended, one to VCC1 and one to ground (see Figure
5). Sometimes a designer may want to increase the value of
the 30Ω resistors at the video inputs, for additional ESD protection. This is not recommended with the LM1279A. C5, C7,
and C9 are part of the DC restoration circuit. This circuit is
depending on a total maximum circuit resistance of about
110Ω; 30Ω input series resistor plus 75Ω for the video termination resistor. Increasing the value of the 30Ω resistors will
exceed the 110Ω limit. The excellent internal ESD protection
and the external clamp diodes (if needed) will provide excellent ESD protection.
The 30Ω resistors in series with the OSD inputs are also
necessary if the OSD signals are external to the monitor, or
if these signals are present any time when the +8V is not
fully powered up. Interfacing to the OSD inputs is quite easy
since the signal processing necessary to match the OSD signals to the video levels is done internal by the LM1279A.
There is also no need for an OSD window signal. Any time
there is a high TTL signal at any of the three OSD inputs, the
LM1279A will automatically switch to the OSD mode. A high
TTL OSD signal will give a high video output for that color.
The OSD level is fixed, typically 2.3V above the video black
level. This will give a fixed brightness to the OSD window,
but not at maximum video brightness which could be unpleasant to the user. Figure 2 and Figure 3 show the timing
diagrams of the OSD signals for the LM1279A.
The recommended load impedance for the LM1279A is
390Ω. However, some changes in the load impedance can
be made. If the load impedance is reduced, the monitor designer must confirm that the part is still operating in its proper
die temperature range, never exceeding a die temperature
of 150˚C. When changing the load impedance, the black
level shift is shown in the chart below. The measured VP-P
output with under 1% distortion is also listed.
(Continued)
channel has its own independent control pin with the 0V to
4V control range. An input of 4V give no attenuation, and an
input of 0V gives the full 12 dB attenuation.
The output of the drive attenuator stage goes to the inverting
input of A2. Since this is the second inversion stage, the output of A2 will be the non-inverted video signal. Note that the
output of gm1 goes to the non-inverting input of A2. Also note
that the output of A2 goes to the inverting input of gm1. This
is the feedback for the clamp circuitry. The output stage of A2
is an exact duplicate of the video output through A3. If a
390Ω load impedance is used at the video output, then the
black level at the output stage will accurately track the output
of A2. The other input to gm1 is the desired black level output
of the LM1279A. Since the LM1279A has a fixed black level
output, the non-inverting inputs to gm1 in all three channels
go to a fixed 1.35V internal reference. This sets the black
level output to a nominal 1.35V. gm1 acts like a sample and
hold amplifier. Once the clamp pulse exceeds 3.6V gm1 is
activated, driving the input of A2 to a level where the video
output will be 1.35V. For proper DC restoration it is important
that gm1 be activated only during the horizontal flyback time
when the video is at the black level. gm1 also charges the
clamp cap to the correct voltage to maintain a 1.35V black
level at the video output. When gm1 is turned off the voltage
stored on the clamp cap will maintain the correct black level
during the active video, thus restoring the DC level for a
1.35V black level.
The input of A3 receives the output from A2. The video channel of A3 is a duplication of the output stage to A2. As mentioned in the previous paragraph this is done so that the DC
restoration can be done at the A2 stage. A3 also receives the
OSD input for blanking the channels with no OSD input. By
doing DC restoration at the A2 stage, OSD can be activated
at the output stage during the time DC restoration is being
done at A2.
The OSD signal goes into a special interface circuit. The output of this circuit will drive the output of A3 to either an OSD
black level or to about 2.4V above the video black level
(OSD white level). The OSD black level is about 300 mV below the video black level. This guarantees that if the OSD
signal is not activated for a particular channel, then its output
will be slightly below the cutoff level. If an OSD input is received in a particular channel, then the video output will be at
the OSD white level. The OSD mode is automatically activated if there is only one OSD signal to any of the video
channels. This OSD control circuit will allow any color, except black, during the OSD mode. This also saves the need
for a special signal to switch into the OSD mode. Remember
that at least one OSD input must be high to enable the OSD
mode, therefore black can’t be used in the OSD window.
Load
VP-P
Blk. Level Shift
430Ω
3.62V
+15 mV
Applications of the LM1279A
390Ω
3.62V
0 mV
Two demonstration boards are available to evaluate the
LM1279A. One board is the pre-amp demonstration board.
This board was used for testing and characterizing the
LM1279A. The schematic for this board is shown in Figure 4
and the printed circuit layout for this board is shown in Figure
6. The other board is a complete video channel neck board
that can be directly plugged into the CRT socket. The schematic for this board is shown in Figure 9 and the printed circuit layout is shown in Figure 10. The CRT driver used on
this board is the LM2407. Any of National’s monolithic CRT
330Ω
3.58V
−25 mV
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270Ω
3.51V
−45 mV
When using a lower load impedance, the LM1279A does go
into hard clipping more quickly. This does reduce the headroom of the video output.
Board layout is always critical in a high frequency application
such as using the LM1279A. A poor layout can result in ringing of the video waveform after sudden transitions, or the
part could actually oscillate. A good ground plane and proper
routing of the +8V are important steps to a good PCB layout.
The LM1279A does require very good coupling between
8
LM1279A
Applications of the LM1279A
(Continued)
VCC1 and VCC2 (pins 2 and 16). This is clearly shown in Figure 6 and Figure 10 with the short and large trace between
pins 2 and 16. Both demonstration boards offer the monitor
designer an excellent example of good ground plane being
used with the LM1279A. These boards are single sided, yet
allow the LM1279A to operate at its peak performance. The
neck board also shows a good example of interfacing to a
CRT driver and to the CRT. The video signal path is kept as
short as possible between the LM1279A and the CRT driver,
and also between the CRT driver and the CRT socket. Actual
performance of the LM1279A in the video pre-amp demonstration board is shown in Figure 7 and Figure 8.
References
Ott, Henry W. Noise Reduction Techniques in Electronic
Systems, John Wiley & Sons, New York, 1976
Zahid Rahim, “Guide to CRT Video Design,” Application
Note 861, National Semiconductor Corp., Jan. 1993
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LM1279A
Applications of the LM1279A
DS101250-13
FIGURE 6. LM1279A OSD Video Pre-Åmp Demontration Board Layout
DS101250-16
DS101250-17
FIGURE 7. LM1279A Rise Time
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FIGURE 8. LM1279A Fall Time
10
DS101250-14
(Continued)
11
LM1279A
FIGURE 9. LM1279A/LM2407 Demonstration Neck Board Schematic
Applications of the LM1279A
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LM1279A
Applications of the LM1279A
(Continued)
DS101250-15
FIGURE 10. LM1279A/LM2407 Demonstration Neck Board Layout
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LM1279A 110 MHz RGB Video Amplifier System with OSD
Physical Dimensions
inches (millimeters) unless otherwise noted
Order Number LM1279AN
NS Package Number N20A
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.