ETC LM3702XCBPX-308

LM3702/LM3703
Microprocessor Supervisory Circuits with Low Line
Output and Manual Reset
General Description
The LM3702/LM3703 series of microprocessor supervisory
circuits provide the maximum flexibility for monitoring power
supplies and battery controlled functions in systems without
backup batteries. The LM3702/LM3703 series are available
in a 9-bump micro SMD package.
Built-in features include the following:
Reset: Reset is asserted during power-up, power-down, and
brownout conditions. RESET is guaranteed down to VCC of
1.0V.
Manual Reset Input: An input that asserts reset when pulled
low.
Low Line Output: This early power failure warning indicator
goes low when the supply voltage drops to a value which is
2% higher than the reset threshold voltage.
Features
No external components required
Manual-Reset input
RESET (LM3702) or RESET (LM3703) outputs
Precision supply voltage monitor
Factory programmable Reset Timeout Delay
Available in micro SMD package for minimum footprint
± 0.5% Reset threshold accuracy at room temperature
± 2% Reset threshold accuracy over temperature
extremes
n Reset assertion down to 1V VCC (RESET option only)
n 28 µA VCC supply current
n
n
n
n
n
n
n
n
Applications
n
n
n
n
Embedded Controllers and Processors
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
n Standard Reset Threshold voltage: 3.08V
n Custom Reset Threshold voltages: For other voltages
between 2.2V and 5.0V in 10mV increments, contact
National Semiconductor Corp.
Typical Application
20011503
© 2001 National Semiconductor Corporation
DS200115
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LM3702/LM3703 Microprocessor Supervisory Circuits with Low Line Output and Manual Reset
June 2001
LM3702/LM3703
Connection Diagram
Top View
(looking from the coating side)
micro SMD 9 Bump Package
BPA09
20011501
Pin Descriptions
Bump No.
Name
Function
1
MR
Manual-Reset input. When MR is less than VMRT (Manual Reset Threshold)
RESET/RESET is engaged.
2
VCC
Power Supply input.
3
RESET
Reset Logic Output. Pulses low for tRP (Reset Timeout Period) when triggered, and stays
low whenever VCC is below the reset threshold or when MR is below VMRT. It remains low
for tRP after either VCC rises above the reset threshold, or after MR input rises above
VMRT (LM3702 only).
RESET
Reset Logic Output. RESET is the inverse of RESET (LM3703 only).
5
LLO
Low-Line Logic Output. Early Power-Fail warning output. Low when VCC falls below VLLOT
(Low-Line Output Threshold). This output can be used to generate an NMI (Non-Maskable
Interrupt) to provide an early warning of imminent power-failure.
Ground reference for all signals.
6
GND
4, 7, 8
NC
No Connect.
9
NC
No Connect. Test input used at factory only. Leave floating.
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2
LM3702/LM3703
Block Diagram
20011505
3
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LM3702/LM3703
Ordering Information
20011504
*For other voltages between 2.2V and 5.0V, please contact National Semiconductor sales office.
LM3702/LM3703
Part Number
Output
Reset Timeout
Period
Package
Marking
LM3702XCBP-308
totem-pole
200ms
%%I2
LM3702XCBPX-308
totem-pole
200ms
%%I2
LM3703XCBP-308
totem-pole
200ms
%%I3
LM3703XCBPX-308
totem-pole
200ms
%%I3
%% is the datecode and will vary with time.
Table Of Functions
Part
Number
LM3702
Active
Low
Reset
Active
High
Reset
x
LM3703
x
Output
(X = totem-pole)
(Y = open-drain)
Reset
Timeout
Period
Manual
Reset
Low
Line
Output
X, Y*
Customized
x
x
X
Customized
x
x
* = available upon request. Contact National
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4
(Note 1)
Power Dissipation
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
Operating Ratings (Note 1)
−0.3V to 6.0V
All Other Inputs
(Note 3)
−40˚C ≤ TJ ≤ 85˚C
Temperature Range
−0.3V to VCC + 0.3V
ESD Ratings (Note 2)
Human Body Model
Machine Model
1.5kV
150V
LM3702/LM3703 Series Electrical Characteristics
Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise
specified: VCC = +2.2V to 5.5V.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
POWER SUPPLY
VCC
ICC
Operating Voltage
Range: VCC
VCC Supply
Current
LM3702
1.0
5.5
LM3703
1.2
5.5
All inputs = VCC; all outputs floating
V
28
50
µA
VRST
+0.5
+2
%
RESET THRESHOLD
VRST
Reset Threshold
VCC falling
−0.5
−2
VCC falling: TA = 0˚C to 70˚C
VRSTH
tRP
tRD
−1.5
+1.5
0.0032 • VRST
Reset Threshold
Hysteresis
Reset Timeout
Period
Reset
Reset
Reset
Reset
Timeout
Timeout
Timeout
Timeout
Period
Period
Period
Period
VCC to Reset
Delay
VCC falling at 1mV/µs
=
=
=
=
A
B
C
D
1
20
140
1120
1.4
28
200
1600
mV
2
40
280
2240
20
ms
µs
RESET (LM3703)
VOL
VOH
ILKG
RESET
RESET
Output Leakage
Current
VCC > 2.25V, ISINK = 900µA
0.3
VCC > 2.7V, ISINK = 1.2mA
0.3
VCC > 4.5V, ISINK = 3.2mA
0.4
VCC > 1.2V, ISOURCE = 50µA
0.8 VCC
VCC > 1.8V, ISOURCE = 150µA
0.8 VCC
VCC > 2.25V, ISOURCE = 300µA
0.8 VCC
VCC > 2.7V, ISOURCE = 500µA
0.8 VCC
VCC > 4.5V, ISOURCE = 800µA
VCC − 1.5V
V
V
VRESET = 5.5V
1.0
VCC > 1.0V, ISINK = 50µA
0.3
VCC > 1.2V, ISINK = 100µA
0.3
µA
RESET (LM3702)
VOL
RESET
VCC > 2.25V, ISINK = 900µA
0.3
VCC > 2.7V, ISINK = 1.2mA
0.3
VCC > 4.5V, ISINK = 3.2mA
VOH
RESET
0.4
VCC > 2.25V, ISOURCE = 300µA
0.8 VCC
VCC > 2.7V, ISOURCE = 500µA
0.8 VCC
VCC
> 4.5V, ISOURCE = 800µA
5
V
VCC − 1.5V
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LM3702/LM3703
Absolute Maximum Ratings
LM3702/LM3703
LM3702/LM3703 Series Electrical Characteristics
(Continued)
Limits in the standard typeface are for TJ = 25˚C and limits in boldface type apply over full operating range. Unless otherwise
specified: VCC = +2.2V to 5.5V.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
MR
VMRT
VMRTH
MR Input
Threshold
MR, Low
MR Threshold
Hysteresis
MR falling: VCC = VRST
RMR
MR Pull-up
Resistance
tMD
MR to Reset
Delay
tMR
MR Pulse Width
0.8
2.0
MR, High
MAX
0.0032 • VRST
to 5.5V
35
56
V
mV
75
12
kΩ
µS
25
µS
LLO
VOL
LLO Output
Voltage
VOH
VCC > 2.25V, ISINK = 900µA
0.3
VCC > 2.7V, ISINK = 1.2mA
0.3
VCC > 4.5V, ISINK = 3.2mA
0.4
VCC
VCC
VCC
> 2.25V, ISOURCE = 300µA
> 2.7V, ISOURCE = 500µA
> 4.5V, ISOURCE = 800µA
0.8 VCC
V
0.8 VCC
VCC − 1.5V
LLO OUTPUT
VLLOT
LLO Output
Threshold
(VLLO − VRST, VCC
falling)
VLLOTH
Low-Line
Comparator
Hysteresis
tCD
Low-Line
Comparator Delay
1.01 • VRST
VCC falling at 1mV/µs
1.02 • VRST
1.03 • VRST
V
0.0032 • VRST
mV
20
µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device
is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the
listed conditions.
Note 2: The Human Body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin.
Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ-A,
and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated using:
Where the value of θJ-A for the micro SMD package is 220˚C/W.
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6
Supply Current vs Supply Voltage
3.3V Supply Current vs Temperature
20011511
20011515
Normalized Reset Threshold Voltage vs Temperature
Reset Timeout Period vs VCC
20011512
20011532
Max. Transient Duration vs Reset Comparator Overdrive
(VCC = 3.3V)
Reset Timeout Period vs Temperature
20011510
20011516
7
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LM3702/LM3703
Typical Performance
Characteristics
LM3702/LM3703
Typical Performance Characteristics
(Continued)
Low-Line Comparator Propagation Delay vs Temperature
20011514
timeout period expires after MR rises above VMRT. Use MR
with digital logic to assert or to daisy chain supervisory
circuits. It may be used as another low-line comparator by
adding a buffer.
Circuit Information
Reset Output
The Reset input of a µP initializes the device into a known
state. The LM3702/LM3703 microprocessor supervisory circuits assert a forced reset output to prevent code execution
errors during power-up, power-down, and brownout conditions.
RESET is guaranteed valid for VCC > 1V. Once VCC exceeds the reset threshold, an internal timer maintains the
output for the reset timeout period. After this interval, reset
goes high. The LM3702 offers an active-low RESET; The
LM3703 offers an active-high RESET.
Any time VCC drops below the reset threshold (such as
during a brownout), the reset activates. When VCC again
rises above the reset threshold, the internal timer starts.
Reset holds until VCC exceeds the reset threshold for longer
than the reset timeout period. After this time, reset releases.
The Manual Reset input (MR) will initiate a forced reset also.
See the Manual Reset Input section.
Low-Line Output (LLO)
The low-line output comparator is typically used to provide a
non-maskable interrupt to a µP when VCC begins falling. LLO
monitors VCC and goes low when VCC falls below VLLOT
(typically 1.02 • VRST) with hysteresis of 0.0032 • VRST.
Special Precautions for the micro SMD Package
As with most integrated circuits, the LM3702 and LM3703
are sensitive to exposure from visible and infrared (IR) light
radiation. Unlike a plastic encapsulated IC, the micro SMD
package has very limited shielding from light, and some
sensitivity to light reflected from the surface of the PC board
or long wavelength IR entering the die from the side may be
experienced. This light could have an unpredictable affect on
the electrical performance of the IC. Care should be taken to
shield the device from direct exposure to bright visible or IR
light during operation.
Reset Threshold
The LM3702/LM3703 family is available with a reset voltage
of 3.08V. Other reset thresholds in the 2.20V to 5.0V range,
in steps of 10 mV, are available; contact National Semiconductor for details.
Micro SMD Mounting
The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note AN-1112. Referring to the section Surface
Mount Technology (SMT) Assembly Considerations, it
should be noted that the pad style which must be used with
the 9-pin package is the NSMD (non-solder mask defined)
type.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
Manual Reset Input (MR)
Many µP-based products require a manual reset capability,
allowing the operator to initiate a reset. The MR input is fully
debounced and provides an internal 56 kΩ pull-up. When the
MR input is pulled below VMRT (1.225V) for more than 25 µs,
reset is asserted after a typical delay of 12 µs. Reset remains
active as long as MR is held low, and releases after the reset
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8
LM3702/LM3703
Timing Diagrams
20011528
FIGURE 1. LM3702 Reset Time with MR
20011529
FIGURE 2. LLO Output
9
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LM3702/LM3703
Typical Application Circuits
20011524
FIGURE 3. LM3703 Power-On Delay
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10
LM3702/LM3703
Typical Application Circuits
(Continued)
20011522
FIGURE 4. Regulator/Switch with Long-Term Overvoltage Lockout Prevents Overdissipation in Linear Regulator
20011531
FIGURE 5. Switch Debouncer
11
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LM3702/LM3703
Physical Dimensions
inches (millimeters)
unless otherwise noted
9 bump micro SMD Package
NS Package Number BPA09FFB
The dimensions of X1, X2 and X3 are given below
X1 = 1.412mm
X2 = 1.412mm
X3 = 0.850mm
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. 63Sn/37Pb EUTECTIC BUMP
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER
CLOCKWISE.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS
PACKAGE HEIGHT.
6.NO JEDEC REGISTRATION AS OF AUG.1999.
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LM3702/LM3703 Microprocessor Supervisory Circuits with Low Line Output and Manual Reset
Notes