TI LM3700XCBP-290

OBSOLETE
LM3700, LM3701
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SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
LM3700/LM3701 Microprocessor Supervisory Circuit with Low Line Output
Check for Samples: LM3700, LM3701
FEATURES
DESCRIPTION
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The LM3700/LM3701 series of microprocessor
supervisory circuits provide the maximum flexibility for
monitoring power supplies and battery controlled
functions in systems without backup batteries. The
LM3700/LM3701 series are available in a 9-bump
micro SMD package.
1
2
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•
•
•
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Standard Reset Threshold Voltage: 3.08V
Custom Reset Threshold Voltages: For Other
Voltages between 2.2V and 5.0V in 10mV
Increments, Contact Texas Instruments.
No External Components Required
RESET (LM3700) or RESET (LM3701) Outputs
Precision Supply Voltage Monitor
Factory Programmable Reset Timeout Delay
Available in micro SMD Package for Minimum
Footprint
±0.5% Reset Threshold Accuracy at Room
Temperature
±2% Reset Threshold Accuracy Over
Temperature Extremes
Reset Assertion Down to 1V VCC (RESET
Option Only)
28 µA VCC Supply Current
Built-in features include the following:
Reset: Reset is asserted during power-up, powerdown, and brownout conditions. RESET is specified
down to VCC of 1.0V.
Low Line Output: This early power failure warning
indicator goes low when the supply voltage drops to a
value which is 2% higher than the reset threshold
voltage.
APPLICATIONS
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•
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Embedded Controllers and Processors
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
Typical Application
VIN
VCC
VCC
Reset
Reset
PP
LLO
GND
INT
GND
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2013, Texas Instruments Incorporated
OBSOLETE
LM3700, LM3701
SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
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Connection Diagram
1
Reset
VCC
NC
NC
NC
NC
LLO
GND
NC
C
B
A
2
3
Figure 1. Top View (looking from the coating side)
micro SMD 9 Bump Package
BPA09
Table 1. PIN DESCRIPTIONS
Bump No.
Name
B1
VCC
Function
C1
RESET
Reset Logic Output. Pulses low for tRP (Reset Timeout Period) when triggered, and stays low
whenever VCC is below the reset threshold or when MR is below VMRT. It remains low for tRP
after either VCC rises above the reset threshold, or after MR input rises above VMRT (LM3700
only).
RESET
Reset Logic Output. RESET is the inverse of RESET (LM3701 only).
Power Supply input.
C3
LLO
Low-Line Logic Output. Early Power-Fail warning output. Low when VCC falls below VLLOT (LowLine Output Threshold). This output can be used to generate an NMI (Non-Maskable Interrupt) to
provide an early warning of imminent power-failure.
B3
GND
Ground reference for all signals.
A1, A2, A3, C2
NC
No Connect.
B2
NC
No Connect. Test input used at factory only. Leave floating.
Block Diagram
VCC
Reset Comparator
+
-
RESET/RESET
Reset Logic
& One-Shot
Timer
Low Line Comparator
+
-
LLO
1.225V
Reference
2
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SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
Table 2. Table Of Functions
Part Number
LM3700
Active Low
Reset
Output
(X = totem-pole)
(Y = open-drain)
x
LM3701
(1)
Active High
Reset
Reset Timeout Period
Low Line Output
X, Y (1)
Customized
x
X
Customized
x
x
= available upon request. Contact TI
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1) (2)
−0.3V to 6.0V
Supply Voltage (VCC)
−0.3V to VCC + 0.3V
All Other Inputs
ESD Ratings (3)
Human Body Model
1.5kV
Machine Model
150V
See (4)
Power Dissipation
(1)
(2)
(3)
(4)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance
characteristics may degrade when the device is not operated under the listed conditions.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
The Human Body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF
capacitor discharged directly into each pin.
The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated
using:
spacer
Where the value of θJ-A for the micro SMD package is 220°C/W.
OPERATING RATINGS (1)
−40°C ≤ TJ ≤ 85°C
Temperature Range
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance
characteristics may degrade when the device is not operated under the listed conditions.
LM3700/LM3701 SERIES ELECTRICAL CHARACTERISTICS
Limits in the standard typeface are for TJ = 25°C and limits in boldface type apply over full operating range. Unless otherwise
specified: VCC = +2.2V to 5.5V.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
POWER SUPPLY
VCC
ICC
Operating Voltage Range: VCC LM3700
1.0
5.5
LM3701
1.2
5.5
VCC Supply Current
All inputs = VCC; all outputs floating
V
28
50
µA
VRST
+0.5
+2
%
RESET THRESHOLD
VRST
Reset Threshold
−0.5
−2
VCC falling
VCC falling: TA = 0°C to 70°C
VRSTH
tRP
tRD
−1.5
Reset Threshold Hysteresis
Reset Timeout Period
VCCto Reset Delay
+1.5
0.0032•VRST
Reset
Reset
Reset
Reset
Timeout
Timeout
Timeout
Timeout
Period
Period
Period
Period
=A
=B
=C
=D
VCC falling at 1mV/µs
1
20
140
1120
1.4
28
200
1600
mV
2
40
280
2240
20
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ms
µs
3
OBSOLETE
LM3700, LM3701
SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
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LM3700/LM3701 SERIES ELECTRICAL CHARACTERISTICS (continued)
Limits in the standard typeface are for TJ = 25°C and limits in boldface type apply over full operating range. Unless otherwise
specified: VCC = +2.2V to 5.5V.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
RESET (LM3701)
VOL
RESET
VOH
RESET
ILKG
Output Leakage Current
VCC > 2.25V, ISINK = 900µA
0.3
VCC > 2.7V, ISINK = 1.2mA
0.3
VCC > 4.5V, ISINK = 3.2mA
0.4
VCC > 1.2V, ISOURCE = 50µA
0.8 VCC
VCC > 1.8V, ISOURCE = 150µA
0.8 VCC
VCC > 2.25V, ISOURCE = 300µA
0.8 VCC
VCC > 2.7V, ISOURCE = 500µA
0.8 VCC
VCC > 4.5V, ISOURCE = 800µA
VCC − 1.5V
V
V
VRESET = 5.5V
1.0
VCC > 1.0V, ISINK = 50µA
0.3
VCC > 1.2V, ISINK = 100µA
0.3
VCC > 2.25V, ISINK = 900µA
0.3
VCC > 2.7V, ISINK = 1.2mA
0.3
VCC > 4.5V, ISINK = 3.2mA
0.4
µA
RESET (LM3700)
VOL
RESET
VOH
RESET
VCC > 2.25V, ISOURCE = 300µA
0.8 VCC
VCC > 2.7V, ISOURCE = 500µA
0.8 VCC
VCC > 4.5V, ISOURCE = 800µA
VCC − 1.5V
V
LLO
VOL
LLO Output Voltage
VCC > 2.25V, ISINK = 900µA
0.3
VCC > 2.7V, ISINK = 1.2mA
0.3
VCC > 4.5V, ISINK = 3.2mA
VOH
0.4
VCC > 2.25V, ISOURCE = 300µA
0.8 VCC
VCC > 2.7V, ISOURCE = 500µA
0.8 VCC
VCC > 4.5V, ISOURCE = 800µA
VCC − 1.5V
V
LLO OUTPUT
VLLOT
LLO Output Threshold
(VLLO − VRST, VCC falling)
VLLOTH
Low-Line Comparator
Hysteresis
tCD
4
Low-Line Comparator Delay
1.01•VRST
VCC falling at 1mV/µs
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1.02•VRST
1.03•VRST
V
0.0032•VRST
mV
20
µs
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LM3700, LM3701
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SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
3.3V Supply Current vs Temperature
30
30
29
Supply Current (PA)
Supply Current (PA)
25
20
15
10
27
26
25
24
5
0
1
28
2
3
4
Supply Voltage (V)
23
-40
5
0
25
70
Temperature (°C)
Figure 2.
Figure 3.
Normalized Reset Threshold Voltage vs Temperature
Reset Timeout Period vs VCC
220
0.4
215
0.3
Reset Timeout Period (ms)
Normalized Threshold Voltage (%)
0.5
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
-40
25
Temperature (°C)
210
205
200
195
190
185
180
3.0
85
3.5
4
4.5
5
5.5
6
Supply Voltage (V)
Figure 4.
Figure 5.
Reset Timeout Period vs Temperature
Max. Transient Duration vs Reset Comparator Overdrive
(VCC = 3.3V)
215
80
Maximum Transient Duration (Ps)
Reset Timeout Period (ms)
85
210
205
200
195
190
-40
70
60
50
40
30
20
10
0
25
85
10
Temperature (°C)
100
1000
Reset Comparator Overdrive (mV)
VRST - VCC
Figure 6.
Figure 7.
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OBSOLETE
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SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Low-Line Comparator Propagation Delay vs Temperature
39
Propagation Delay (Ps)
37
35
33
31
29
27
25
-40
-20
0
20
40
60
80
Temperature (oC)
Figure 8.
6
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LM3700, LM3701
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SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
CIRCUIT INFORMATION
RESET OUTPUT
The Reset input of a µP initializes the device into a known state. The LM3700/LM3701 microprocessor
supervisory circuits assert a forced reset output to prevent code execution errors during power-up, power-down,
and brownout conditions.
RESET is ensured valid for VCC > 1V. Once VCC exceeds the reset threshold, an internal timer maintains the
output for the reset timeout period. After this interval, reset goes high. The LM3700 offers an active-low RESET;
The LM3701 offers an active-high RESET.
Any time VCC drops below the reset threshold (such as during a brownout), the reset activates. When VCC again
rises above the reset threshold, the internal timer starts. Reset holds until VCC exceeds the reset threshold for
longer than the reset timeout period. After this time, reset releases.
RESET THRESHOLD
The LM3700/LM3701 family is available with a reset voltage of 3.08V. Other reset thresholds in the 2.20V to
5.0V range, in steps of 10 mV, are available; contact TI for details.
LOW-LINE OUTPUT (LLO)
The low-line output comparator is typically used to provide a non-maskable interrupt to a µP when VCC begins
falling. LLO monitors VCC and goes low when VCC falls below VLLOT (typically 1.02 • VRST) with hysteresis of
0.0032 • VRST.
SPECIAL PRECAUTIONS FOR THE MICRO SMD PACKAGE
As with most integrated circuits, the LM3700 and LM3701 are sensitive to exposure from visible and infrared (IR)
light radiation. Unlike a plastic encapsulated IC, the micro SMD package has very limited shielding from light, and
some sensitivity to light reflected from the surface of the PC board or long wavelength IR entering the die from
the side may be experienced. This light could have an unpredictable affect on the electrical performance of the
IC. Care should be taken to shield the device from direct exposure to bright visible or IR light during operation.
MICRO SMD MOUNTING
The micro SMD package requires specific mounting techniques which are detailed in TI Application Note AN1112. Referring to the section Surface Mount Technology (SMT) Assembly Considerations, it should be
noted that the pad style which must be used with the 9-pin package is the NSMD (non-solder mask defined)
type.
For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the
micro SMD device.
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OBSOLETE
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Timing Diagrams
Figure 9. LM3700 Reset Time
Figure 10. LLO Output
8
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SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
Typical Application Circuits
VOUT
VIN
C
VCC
RESET
R
GND
VRSTH
VIN
VOUT
RESET
tRP
Figure 11. LM3701 Power-On Delay
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OBSOLETE
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SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
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IN
VIN
VOUT
OUT
+
LM2941
SD
GND
24.9k
2.2PF
ADJ
7.15k
14.7k
11.5k
VOUT = 3.3V
VCC
VIN(TRIP) = 5.0V
RESET
5V
4V
VIN
3.3V
VOUT
RESET
tRP
Figure 12. Regulator/Switch with Long-Term Overvoltage Lockout
Prevents Overdissipation in Linear Regulator
10
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SNVS146E – NOVEMBER 2000 – REVISED APRIL 2013
REVISION HISTORY
Changes from Revision D ( April 2013) to Revision E
•
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 9
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