ETC LV25620/25/30

27LV256
256K (32K x 8) Low-Voltage CMOS EPROM
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
30
1
31
32
2
5
29
6
28
7
27
8
9
10
11
26
25
24
23
A8
A9
A11
NC
OE
A10
CE
O7
O6
20
19
18
17
21
16
22
13
15
12
14
A6
A5
A4
A3
A2
A1
A0
NC
O0
3
4
A7
A12
VPP
NU
Vcc
A14
A13
PLCC
•1
2
3
4
5
6
7
8
9
10
11
12
13
14
SOIC
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
27LV256
The Microchip Technology Inc. 27LV256 is a low voltage (3.0 volt) CMOS EPROM designed for battery powered applications. The device is organized as a 32K x
8 (32K-Byte) non-volatile memory product. The
27LV256 consumes only 8 mA maximum of active current during a 3.0 volt read operation therefore improving battery performance. This device is designed for
very low voltage applications where conventional 5.0
volt only EPROMS can not be used. Accessing individual bytes from an address transition or from power-up
(chip enable pin going low) is accomplished in less than
200 ns at 3.0V. This device allows systems designers
the ability to use low voltage non-volatile memory with
today’s' low voltage microprocessors and peripherals in
battery powered applications.
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
VSS
27LV256
DESCRIPTION
PDIP
27LV256
• Wide voltage range 3.0V to 5.5V
• High speed performance
- 200 ns access time available at 3.0V
• CMOS Technology for low power consumption
- 8 mA Active current at 3.0V
- 20 mA Active current at 5.5V
- 100 µA Standby current
• Factory programming available
• Auto-insertion-compatible plastic packages
• Auto ID aids automated programming
• Separate chip enable and output enable controls
• High speed “Express” programming algorithm
• Organized 32K x 8: JEDEC standard pinouts
- 28-pin Dual-in-line package
- 32-pin PLCC package
- 28-pin SOIC package
- Tape and reel
• Data Retention > 200 years
• Available for the following temperature ranges:
- Commercial:
0˚C to +70˚C
- Industrial:
-40˚C to +85˚C
PACKAGE TYPES
O1
O2
VSS
NU
O3
O4
O5
FEATURES
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
A complete family of packages is offered to provide the
most flexibility in applications. For surface mount applications, PLCC or SOIC packaging is available. Tape
and reel packaging is also available for PLCC or SOIC
packages.
 1998 Microchip Technology Inc.
DS11020G-page 1
27LV256
1.0
ELECTRICAL
CHARACTERISTICS
1.1
Maximum Ratings*
TABLE 1-1:
PIN FUNCTION TABLE
Name
Function
A0-A14
Address Inputs
VCC and input voltages w.r.t. VSS ........ -0.6V to +7.25V
CE
Chip Enable
VPP voltage w.r.t. VSS during
programming ......................................... -0.6V to +14V
OE
Output Enable
Voltage on A9 w.r.t. VSS ....................... -0.6V to +13.5V
VPP
Programming Voltage
Output voltage w.r.t. VSS .................-0.6V to VCC +1.0V
O0 - O7
Storage temperature .......................... -65˚C to +150˚C
VCC
+5V or +3V Power Supply
Ambient temp. with power applied...... -65˚C to +125˚C
VSS
Ground
NC
No Connection; No Internal
Connection
NU
Not Used; No External Connection Is
Allowed
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TABLE 1-2:
Data Output
READ OPERATION DC CHARACTERISTICS
VCC = +5V ±10% or 3.0V where indicated
Commercial:
Tamb = 0˚C to +70˚C
Industrial:
Tamb = -40˚C to +85˚C
Parameter
Part*
Status
Symbol
Min.
Max.
Units
Conditions
Input Voltages
all
Logic "1"
Logic "0"
VIH
VIL
2.0
-0.5
VCC+1
0.8
V
V
Input Leakage
all
ILI
-10
10
µA
VIN = 0 to VCC
Output Voltages
all
Logic "1"
Logic "0"
VOH
VOL
2.4
0.45
V
V
IOH = -400 µA
IOL = 2.1 mA
10
µA
VOUT = 0V to VCC
Output Leakage
all
—
ILO
-10
Input Capacitance
all
—
CIN
—
6
pF
VIN = 0V; Tamb = 25°C;
f = 1 MHz
Output Capacitance
all
—
COUT
—
12
pF
VOUT = 0V; Tamb = 25°C;
f = 1 MHz
Power Supply Current,
Active
C
TTL input
ICC1
—
I
TTL input
ICC2
—
20 @ 5.0V
8 @ 3.0V
25 @ 5.0V
10 @ 3.0V
mA
mA
mA
mA
VCC = 5.5V; VPP = VCC
f = 1 MHz;
OE = CE = VIL;
IOUT = 0 mA;
VIL = -0.1 to 0.8V;
VIH = 2.0 to VCC;
Note 1
C
I
all
TTL input
TTL input
CMOS input
ICC(S)
—
1 @ 3.0V
2 @ 3.0V
100 @ 3.0V
mA
mA
µA
Power Supply Current,
Standby
CE=VCC ± 0.2V
* Parts: C=Commercial Temperature Range
I =Industrial Temperature Ranges
Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.
DS11020G-page 2
 1998 Microchip Technology Inc.
27LV256
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
Input Rise and Fall Times:
Ambient Temperature:
Parameter
VIH = 2.4V and VIL = 0.45V; VOH = 2.0V VOL = 0.8V
1 TTL Load + 100 pF
10 ns
Commercial:
Tamb = 0˚C to +70˚C
Industrial:
Tamb = -40˚C to +85˚C
27HC256-20
27HC256-25
27HC256-30
Min
Max
Min
Max
Min
Max
Sym
Units
Conditions
Address to Output Delay
tACC
—
200
—
250
—
300
ns
CE = OE = VIL
CE to Output Delay
tCE
—
200
—
250
—
300
ns
OE = VIL
OE to Output Delay
tOE
—
100
—
125
—
125
ns
CE = VIL
CE or OE to O/P High
Impedance
tOFF
0
50
0
50
0
50
ns
Output Hold from
Address CE or OE,
whichever goes first
tOH
0
—
0
—
0
—
ns
FIGURE 1-1:
READ WAVEFORMS
VIH
Address valid
Address
VIL
VIH
CE
VIL
t CE(2)
VIH
OE
VIL
Outputs
O0 - O7
VOH
t OFF(1,3)
t OH
t OE(2)
High Z
Valid Output
High Z
VOL
t ACC
Notes: (1) tOFF is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to t CE - tOE after the falling edge of CE without impact on tCE
(3) This parameter is sampled and is not 100% tested.
 1998 Microchip Technology Inc.
DS11020G-page 3
27LV256
TABLE 1-4:
PROGRAMMING DC CHARACTERISTICS
Ambient Temperature: Tamb = 25°C ± 5°C
VCC = 6.5V ± 0.25V, VPP = 13.0V ± 0.25V
Parameter
Status
Symbol
Min
Max.
Units
Input Voltages
Logic”1”
Logic”0”
VIH
VIL
2.0
-0.1
VCC+1
0.8
V
V
Input Leakage
—
ILI
-10
10
µA
VIN = 0V to VCC
Logic”1”
Logic”0”
VOH
VOL
2.4
0.45
V
V
IOH = -400 µA
IOL = 2.1 mA
VCC Current, program & verify
—
ICC2
—
20
mA
Note 1
VPP Current, program
—
IPP2
—
25
mA
Note 1
A9 Product Identification
—
VH
11.5
12.5
V
Output Voltages
Conditions
Note 1: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
TABLE 1-5:
PROGRAMMING AC CHARACTERISTICS
for Program, Program Verify
and Program Inhibit Modes
Parameter
AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V
Output Load:
1 TLL Load + 100pF
Ambient Temperature: Tamb=25°C±5°C
VCC= 6.5V ± 0.25V, VPP =13.0V ± 0.25V
Symbol
Min.
Max.
Units
Address Set-Up Time
tAS
2
—
µs
Data Set-Up Time
tDS
2
—
µs
Data Hold Time
tDH
2
—
µs
Address Hold Time
tAH
0
—
µs
Float Delay (2)
tDF
0
130
ns
VCC Set-Up Time
tVCS
2
—
µs
Program Pulse Width (1)
tPW
95
105
µs
CE Set-Up Time
tCES
2
—
µs
OE Set-Up Time
tOES
2
—
µs
VPP Set-Up Time
tVPS
2
—
µs
Data Valid from OE
tOE
—
100
ns
Remarks
100 µs typical
Note 1: For express algorithm, initial programming width tolerance is 100 µs ±5%.
2: This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no
longer driven (see timing diagram).
DS11020G-page 4
 1998 Microchip Technology Inc.
27LV256
FIGURE 1-2:
PROGRAMMING WAVEFORMS
Program
Verify
VIH
Address
Address Stable
VIL
t AS
t AH
VIH
High Z
Data
Data Stable
VIL
t DS
Data Out Valid
t DF
(1)
t DH
13.0V(2)
VPP
t VPS
5.0V
6.5V(2)
VCC
t VCS
5.0V
VIH
CE
VIL
OE
t OPW
VIL
Notes:
TABLE 1-6:
t OES
t PW
VIH
t OE
(1)
(1) t DF and tOE are characteristics of the device but must be accommodated by the programmer
(2) VCC = 6.5V ±0.25V, VPP = VH = 13.0V ±0.25V for express algorithm
MODES
Operation Mode
CE
OE
VPP
A9
O0 - O7
Read
VIL
VIL
VCC
X
DOUT
Program
VIL
VIH
VH
X
DIN
Program Verify
VIH
VIL
VH
X
DOUT
Program Inhibit
VIH
VIH
VH
X
High Z
Standby
VIH
X
VCC
X
High Z
Output Disable
VIL
VIH
VCC
X
High Z
Identity
VIL
VIL
VCC
VH
Identity Code
X = Don’t Care
1.2
Read Mode
(See Timing Diagrams and AC Characteristics)
Read Mode is accessed when:
a)
b)
For Read operations, if the addresses are stable, the
address access time (tACC) is equal to the delay from
CE to output (tCE). Data is transferred to the output
after a delay from the falling edge of OE (tOE).
the CE pin is low to power up (enable) the chip
the OE pin is low to gate the data to the output
pins
 1998 Microchip Technology Inc.
DS11020G-page 5
27LV256
1.3
Standby Mode
The standby mode is defined when the CE pin is high
(VIH) and a program mode is not defined. Output Disable
1.4
Output Enable
1.6
After the array has been programmed it must be verified to ensure that all the bits have been correctly programmed. This mode is entered when all of the
following conditions are met:
This feature eliminates bus contention in multiple bus
microprocessor systems and the outputs go to a high
impedance when the following condition is true:
a)
b)
c)
d)
• The OE pin is high and program mode is not
defined.
1.7
1.5
Programming Mode
The Express algorithm has been developed to improve
on the programming throughput times in a production
environment. Up to 10 100-microsecond pulses are
applied until the byte is verified. No over-programming
is required. A flowchart of the express algorithm is
shown in Figure 1.
Programming takes place when:
a)
b)
c)
d)
VCC is brought to the proper voltage
VPP is brought to the proper VH level
the OE pin is high
the CE pin is low
Since the erased state is “1” in the array, programming
of “0” is required. The address to be programmed is set
via pins A0-A14 and the data to be programmed is presented to pins O0-O7. When data and address are stable, a low-going pulse on the CE line programs that
location.
Verify
VCC is at the proper level
VPP is at the proper VH level
the CE pin is high
the OE line is low
Inhibit
When Programming multiple devices in parallel with different data, only CE needs to be under separate control
to each device. By pulsing the CE line low on a particular device, that device will be programmed, and all
other devices with CE held high will not be programmed
with the data although address and data are available
on their input pins.
1.8
Identity Mode
In this mode specific data is outputted which identifies
the manufacturer as Microchip Technology Inc. and
device type. This mode is entered when Pin A9 is taken
to VH (11.5V to 12.5V). The CE and OE lines must be
at VIL. A0 is used to access any of the two non-erasable bytes whose data appears on O0 through O7.
Pin
Identity
Manufacturer
Device Type*
Input
Output
A0
0 O O O O O O O H
7 6 5 4 3 2 1 0 e
x
VIL
VIH
0 0 1 0 1 0 0 1 29
1 0 0 0 1 1 0 0 8C
* Code subject to change.
DS11020G-page 6
 1998 Microchip Technology Inc.
27LV256
FIGURE 1-3:
PROGRAMMING EXPRESS ALGORITHM
Conditions:
Tamb = 25+/-5C
VCC = 6.5+/-0.25V
VPP = 13.0+/-0.25V
Start
ADDR = First Location
VCC = 6.5V
VPP = 13.0V
X=0
Program one 100 µs pulse
Increment X
Verify
Byte
Pass
Fail
No
X = 10?
Last
Address?
Yes
Device
Failed
Yes
No
Increment Address
VCC = VPP = 4.5V, 5.5V
Device
Passed
 1998 Microchip Technology Inc.
Yes
All
bytes
= original
data?
No
Device
Failed
DS11020G-page 7
27LV256
NOTES:
DS11020G-page 8
 1998 Microchip Technology Inc.
27LV256
NOTES:
 1998 Microchip Technology Inc.
DS11020G-page 9
27LV256
NOTES:
DS11020G-page 10
 1998 Microchip Technology Inc.
27LV256
27LV256 Product Identification System
To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed
sales offices.
27LV256
–
25
I
/P
Package:
Temperature
Range:
Access
Time:
Device:
 1998 Microchip Technology Inc.
L = Plastic Leaded Chip Carrier
P = Plastic DIP (600 Mil)
SO = Plastic SOIC (300 Mil)
Blank = 0˚C to +70˚C
I = -40˚C to +85˚C
20 = 200 ns
25 = 250 ns
30 = 300 ns (SOIC only)
27LV256
256K (32K x 8) Low-Voltage CMOS EPROM
DS11020G-page 11
Note the following details of the code protection feature on PICmicro® MCUs.
•
•
•
•
•
•
The PICmicro family meets the specifications contained in the Microchip Data Sheet.
Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today,
when used in the intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet.
The person doing so may be engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable”.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of
our product.
If you have any further questions about this matter, please contact the local sales office nearest to you.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
PICSTART, PRO MATE, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchip’s quality
system for the design and manufacture of
development systems is ISO 9001 certified.
 2002 Microchip Technology Inc.
M
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Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
01/18/02
 2002 Microchip Technology Inc.