NUP5120X6 5−Line Transient Voltage Suppressor Array This 5−line voltage transient suppressor array is designed for application requiring transient voltage protection capability. It is intended for use in over−transient voltage and ESD sensitive equipment such as cell phones, portables, computers, printers and other applications. This device features a monolithic common cathode design which protects five independent lines in a single SOT−563 package. http://onsemi.com SOT−563 5−LINE TRANSIENT VOLTAGE SUPPRESSOR Features • Protects up to 5 Lines in a Single SOT−563 Package • ESD Rating of Class 3B (Exceeding 8 kV) per Human Body Model • PIN ASSIGNMENT and Class C (Exceeding 400 V) per Machine Model. Compliance with IEC 61000−4−2 (ESD) 15 kV (Air), 8 kV (Contact) Applications • Hand Held Portable Applications • Serial and Parallel Ports • Notebooks, Desktops, Servers PPK 1 TJ Rating Peak Power Dissipation 8x20 sec double exponential waveform, (Note 1) Operating Junction Temperature Range TSTG Storage Temperature Range TL Lead Solder Temperature – Maximum (10 seconds) ESD Human Body Model (HBM) Machine Model (MM) IEC 61000−4−2 Air (ESD) IEC 61000−4−2 Contact (ESD) 6 2 5 3 4 PIN 1. 2. 3. 4. 5. 6. MAXIMUM RATINGS (TJ = 25°C, unless otherwise specified) Symbol 1 Value Unit 90 W −40 to 125 °C −55 to 150 °C 260 °C 16000 400 15000 8000 V CATHODE ANODE CATHODE CATHODE CATHODE CATHODE MARKING DIAGRAM 6 54 12 3 SOT−563 CASE 463A STYLE 6 RN D RN = Specific Device Code D = Date Code ORDERING INFORMATION Device 1. Non−repetitive current pulse per Figure 1. NUP5120X6T1 Package Shipping† SOT−563 4000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2004 March, 2004 − Rev. 1 1 Publication Order Number: NUP5120/D NUP5120X6 ELECTRICAL CHARACTERISTICS (TJ = 25°C, unless otherwise specified) Parameter Reverse Working Voltage Breakdown Voltage Reverse Leakage Current Capacitance Conditions Symbol (Note 2) VRWM IT = 1 mA, (Note 3) VBR VRWM = 3 V VR = 0 V, f = 1 MHz (Line to GND) Min Typ Max Unit − 5.0 V 6.2 6.8 7.2 V IR − 0.01 0.5 A CJ − 54 70 pF 2. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 3. VBR is measured at pulse test current IT. http://onsemi.com 2 NUP5120X6 1000 100 PEAK POWER (W) % OF RATED POWER OR IPP 120 80 60 40 100 20 0 0 25 50 75 100 125 10 150 Figure 2. Peak Power vs. Pulse Duration 60 CT, TYPICAL CAPACITANCE (pF) IPP, PEAK CURRENT (A) 1 6 8 10 12 50 40 30 20 10 0 16 14 0 1 2 3 4 5 VCL, CLAMP VOLTAGE (V) VR, REVERSE VOLTAGE (V) Figure 3. Peak Current vs. Clamp Voltage Figure 4. Typical Capacitance vs. Reverse Voltage 6 1 FORWARD CURRENT (A) 1000 REVERSE CURRENT (nA) 100 Figure 1. Power Derating vs. Ambient Temperature 10 100 TJ = 125 °C 10 TJ = 25 °C 1 0.1 0.01 10 PULSE DURATION (µS) 100 0.1 1 TA, AMBIENT TEMPERATURE (°C) 1 2 3 4 5 TJ = 125 °C 0.1 TJ = 25 °C 0.01 0.001 0.6 6 0.7 0.8 0.9 1.0 1.1 1.2 REVERSE VOLTAGE (V) FORWARD VOLTAGE (V) Figure 5. Reverse Current vs. Reverse Voltage Figure 6. Typical Forward Current vs. Forward Voltage http://onsemi.com 3 NUP5120X6 PACKAGE DIMENSIONS SOT−563, 6 LEAD CASE 463A−01 ISSUE B A −X− 5 6 1 2 C K MILLIMETERS MIN MAX 1.50 1.70 1.10 1.30 0.50 0.60 0.17 0.27 0.50 BSC 0.08 0.18 0.10 0.30 1.50 1.70 4 B −Y− 3 D G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. DIM A B C D G J K S S J 5 PL 6 0.08 (0.003) M X Y SOLDERING FOOTPRINT* 0.3 0.0118 INCHES MIN MAX 0.059 0.067 0.043 0.051 0.020 0.024 0.007 0.011 0.020 BSC 0.003 0.007 0.004 0.012 0.059 0.067 STYLE 6: PIN 1. CATHODE 2. ANODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE 0.45 0.0177 1.35 0.0531 1.0 0.0394 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. 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American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 4 For additional information, please contact your local Sales Representative. NUP5120/D