100355 Low Power Quad Multiplexer/Latch General Description The 100355 contains four transparent latches, each of which can accept and store data from two sources. When both Enable (En) inputs are LOW, the data that appears at an output is controlled by the Select (Sn) inputs, as shown in the Operating Mode table. In addition to routing data from either D0 or D1, the Select inputs can force the outputs LOW for the case where the latch is transparent (both Enables are LOW) and can steer a HIGH signal from either D0 or D1 to an output. The Select inputs can be tied together for applications requiring only that data be steered from either D0 or D1. A positive-going signal on either Enable input latches the out- puts. A HIGH signal on the Master Reset (MR) input overrides all the other inputs and forces the Q outputs LOW. All inputs have 50 kΩ pulldown resistors. Features n n n n n Greater than 40% power reduction of the 100155 2000V ESD protection Pin/function compatible with 100155 Voltage compensated operating range = −4.2V to −5.7V Standard Microcircuit Drawing (SMD) 5962-9165401 Logic Symbol DS100294-1 Pin Names Description E1, E2 Enable Inputs (Active LOW) S0, S1 Select Inputs MR Master Reset Dna–Dnd Data Inputs Qa–Qd Data Outputs Qa–Qd Complementary Data Outputs Connection Diagrams 24-Pin DIP 24-Pin Quad Cerpak DS100294-3 DS100294-2 © 1998 National Semiconductor Corporation DS100294 www.national.com 100355 Low Power Quad Multiplexer/Latch August 1998 Logic Diagram DS100294-5 www.national.com 2 Operating Mode Table Controls Outputs E1 E2 S1 S0 Qn H X X X Latched (Note 1) X H X X Latched (Note 1) L L L L D0x L L H L D0x + D1x L L L H L L L H H D1x H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Note 1: Stores data present before E went HIGH Truth Table Inputs Outputs MR E1 E2 S1 S0 D1x D0x Qx H X X X X X X H L L L L H H H X L H L L L H H L X H L L L L L L X H L H L L L L L X L H L L L L L H X X H L L L L H L H X L H L L L H L X H L H L L L H L L L H L L H X X X X X Latched (Note 1) L X H X X X X Latched (Note 1) 3 Qx www.national.com Absolute Maximum Ratings (Note 2) ESD (Note 3) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Above which the useful life may be impaired. Recommended Operating Conditions Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Ceramic VEE Pin Potential to Ground Pin Input Voltage (DC) Output Current (DC Output HIGH) ≥2000V Case Temperature (TC) Military Supply Voltage (VEE) −65˚C to +150˚C +175˚C −7.0V to +0.5V VEE to +0.5V −50 mA −55˚C to +125˚C −5.7V to −4.2V Note 2: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 3: ESD testing conforms to MIL-STD-883, Method 3015. Military Version DC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55˚C to +125˚C Symbol Conditions Parameter Min Max Units TC VOH Output HIGH Voltage −1025 −870 mV 0˚C to +125˚C −1085 −870 mV −55˚C VIN = VIH VOL Output LOW Voltage −1830 −1620 mV 0˚C to +125˚C or VIL (Min) 50Ω to −2.0V −1830 −1555 mV −55˚C VOHC Output HIGH Voltage −1035 mV 0˚C to +125˚C VIN = VIH Loading with VOLC Output LOW Voltage VIH Input HIGH Voltage −1085 −1165 mV −55˚C −1610 mV 0˚C to +125˚C −1555 mV −55˚C −870 mV −55˚C to +125˚C VIL Input LOW Voltage −1830 −1475 mV −55˚C to +125˚C IIL Input LOW Current 0.50 µA −55˚C to +125˚C IIH (Min) or VIL (Max) Loading with 50Ω to −2.0V Guaranteed HIGH Signal for ALL Inputs Guaranteed LOW Signal for ALL Inputs VEE = −4.2V VIN = VIL (Min) (Notes 4, 5, 6) (Notes 4, 5, 6) (Notes 4, 5, 6, 7) (Notes 4, 5, 6, 7) (Notes 4, 5, 6) Input HIGH Current S0, S1 220 E1, E2 350 Dna–Dnd 340 MR 430 S0, S1 320 E1, E2 500 Dna–Dnd 490 MR IEE (Max) Notes Power Supply Current µA 0˚C to +125˚C VEE = −5.7V VIN = VIH (Max) µA −55˚C mA −55˚C to +125˚C (Notes 4, 5, 6) 630 −95 −32 Inputs Open (Notes 4, 5, 6) Note 4: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 5: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C Temp., Subgroups 1, 2, 3, 7, and 8. Note 6: Sample tested (Method 5005, Table 1) on each Mfg. lot at +25˚, +125˚C, and −55˚C Temp., Subgroups 1, 2, 3, 7, and 8. Note 7: Guaranteed by applying specified input condition and testing VOH/VOL. www.national.com 4 Military Version AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol tPLH tPHL Parameter TC = −55˚C TC = +25˚C TC = +125˚C Min Max Min Max Min Max 0.40 2.30 0.50 2.20 0.50 2.60 ns 0.60 3.00 0.80 2.70 0.80 3.20 ns 0.50 2.60 0.60 2.30 0.70 2.70 ns 0.60 2.80 0.70 2.60 0.70 2.90 ns Figures 1, 3 (Notes 8, 9, 10) 0.40 1.90 0.40 1.90 0.40 1.90 ns Figures 1, 2 (Note 11) ns Figure 4 (Note 11) Units Conditions Notes Propagation Delay Dna–Dnd to Output (Transparent Mode) tPLH Propagation Delay tPHL S0, S1 to Output Figures 1, 2 (Notes 8, 9, 10) (Transparent Mode) tPLH Propagation Delay tPHL E1, E2 to Output tPLH Propagation Delay tPHL MR to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% tS Setup Time tH Dna–Dnd 0.90 0.90 0.90 S0, S1 2.40 2.40 2.40 MR (Release Time) 1.50 1.50 1.50 Dna–Dnd 0.40 0.40 0.40 S0, S1 0.00 0.00 0.00 Figure 3 Hold Time ns Figure 4 (Note 11) tpw (L) Pulse Width LOW E1, E2 2.00 2.00 2.00 ns Figure 2 (Note 11) tpw (H) Pulse Width HIGH MR 2.00 2.00 2.00 ns Figure 3 (Note 11) Note 8: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures. Note 9: Screen tested 100% on each device at +25˚C, Temperature only, Subgroup A9. Note 10: Sample tested (Method 5005, Table 1) on each Mfg. lot at +25˚, Subgroup A9, and at +125˚C, and −55˚C Temp., Subgroups A10 & A11. Note 11: Not tested at +25˚C, +125˚C and −55˚C Temperature (design characterization data). 5 www.national.com Test Circuit DS100294-6 Notes: VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF Pin numbers shown are for flatpak; for DIP see logic symbol FIGURE 1. AC Test Circuit (Using Quad Cerpak) Switching Waveforms DS100294-7 FIGURE 2. Enable Timing www.national.com 6 Switching Waveforms (Continued) DS100294-8 FIGURE 3. Reset Timing DS100294-9 Notes: ts is the minimum time before the transition of the enable that information must be present at the data input. th is the minimum time after the transition of the enable that information must remain unchanged at the data input. FIGURE 4. Data Setup and Hold Times 7 www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Ceramic Dual-In-Line Package (D) NS Package Number J24E 24-Lead Ceramic Flatpak (F) NS Package Number W24C 9 www.national.com 100355 Low Power Quad Multiplexer/Latch LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 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