NSC DS90C031B

DS90C031B
LVDS Quad CMOS Differential Line Driver
General Description
Features
The DS90C031B is a quad CMOS differential line driver
designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support
data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low
Voltage Differential Signaling (LVDS) technology.
The DS90C031B accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function
that may be used to disable the output stage, disabling the
load current, and thus dropping the device to an ultra low idle
power state of 11 mW typical.
In addition, the DS90C031B provides power-off high impedance LVDS outputs. This feature assures minimal loading
effect on the LVDS bus lines when VCC is not present.
The DS90C031B and companion line receiver (DS90C032B)
provide a new alternative to high power pseudo-ECL devices
for high speed point-to-point interface applications.
n
n
n
n
n
n
n
n
Connection Diagram
Functional Diagram
> 155.5 Mbps (77.7 MHz) switching rates
High impedance LVDS outputs with power-off
± 350 mV differential signaling
Ultra low power dissipation
400 ps maximum differential skew (5V, 25˚C)
3.5 ns maximum propagation delay
Industrial operating temperature range
Pin compatible with DS26C31, MB571 (PECL) and
41LG (PECL)
n Conforms to ANSI/TIA/EIA-644 LVDS standard
n Offered in narrow body SOIC package
n Fail-safe logic for floating inputs
Dual-In-Line
10098901
Order Number DS90C031BTM
See NS Package Number M16A
10098902
Driver Truth Table
Enables
Input
Outputs
EN
EN*
DIN
DOUT+
L
H
X
Z
Z
All other combinations
L
L
H
of ENABLE inputs
H
H
L
© 2001 National Semiconductor Corporation
DS100989
DOUT−
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DS90C031B LVDS Quad CMOS Differential Line Driver
October 2001
DS90C031B
Absolute Maximum Ratings
Maximum Junction Temperature
(Note 1)
ESD Rating (Note 7)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
+150˚C
≥ 2kV
(HBM, 1.5 kΩ, 100 pF)
(EIAJ, 0 Ω, 200 pF)
≥ 250V
−0.3V to +6V
Input Voltage (DIN)
−0.3V to (VCC + 0.3V)
Enable Input Voltage (EN, EN*)
−0.3V to (VCC + 0.3V)
Output Voltage (DOUT+, DOUT−)
−0.3V to +5.8V
Short Circuit Duration
(DOUT+, DOUT−)
Recommended Operating
Conditions
Supply Voltage (VCC)
Continuous
DS90C031BT
1068 mW
Derate M Package
Typ
Max
Units
+4.5
+5.0
+5.5
V
+25
+85
˚C
Operating Free Air Temperature (TA)
Maximum Package Power Dissipation @ +25˚C
M Package
Min
−40
8.5 mW/˚C above +25˚C
Storage Temperature Range
−65˚C to +150˚C
Lead Temperature Range
Soldering (4 sec.)
+260˚C
Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 2, 3)
Symbol
Parameter
Conditions
RL = 100Ω (Figure 1)
VOD1
Differential Output Voltage
∆VOD1
Change in Magnitude of
VOD1 for Complementary
Output States
VOS
Offset Voltage
∆VOS
Change in Magnitude of VOS
for Complementary Output
States
VOH
Output Voltage High
VOL
Output Voltage Low
VIH
Input Voltage High
VIL
Input Voltage Low
II
Input Current
VIN = VCC, GND, 2.5V or 0.4V
Pin
Min
Typ
Max
DOUT−,
DOUT+
250
345
450
mV
4
35
|mV|
1.25
1.35
V
5
25
|mV|
1.41
1.60
1.10
RL = 100Ω
0.90
DIN,
EN,
EN*
1.07
Units
V
V
2.0
VCC
V
GND
0.8
V
+10
µA
−3.5
−5.0
mA
−10
±1
+10
µA
−10
±1
+10
µA
−10
±1
−1.5
−0.8
VCL
Input Clamp Voltage
ICL = −18 mA
IOS
Output Short Circuit Current
VOUT = 0V (Note 8)
IOZ
Output TRI-STATE Current
EN = 0.8V and EN* = 2.0V,
VOUT = 0V or VCC
IOFF
Power - Off Leakage
VO = 0V or 2.4V, VCC = 0V or Open
ICC
No Load Supply Current
Drivers Enabled
DIN = VCC or GND
1.7
3.0
mA
DIN = 2.5V or 0.4V
4.0
6.5
mA
ICCL
Loaded Supply Current
Drivers Enabled
RL = 100Ω (all channels)
VIN = VCC or GND (all inputs)
15.4
21.0
mA
ICCZ
No Load Supply Current
Drivers Disabled
DIN = VCC or GND
EN = GND, EN* = VCC
2.2
4.0
mA
DOUT−,
DOUT+
VCC
V
Switching Characteristics
VCC = +5.0V, TA = +25˚C (Notes 3, 6, 9)
Symbol
Parameter
Min
Typ
Max
Units
1.0
2.0
3.0
ns
1.0
2.1
3.0
ns
Differential Skew |tPHLD – tPLHD|
0
80
400
ps
Channel-to-Channel Skew (Note 4)
0
300
600
ps
tPHLD
Differential Propagation Delay High to Low
tPLHD
Differential Propagation Delay Low to High
tSKD
tSK1
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Conditions
RL = 100Ω, CL = 5 pF
(Figure 2 and Figure 3)
2
(Continued)
VCC = +5.0V, TA = +25˚C (Notes 3, 6, 9)
Typ
Max
Units
tTLH
Symbol
Rise Time
Parameter
Conditions
Min
0.35
1.5
ns
tTHL
Fall Time
0.35
1.5
ns
tPHZ
Disable Time High to Z
2.5
10
ns
RL = 100Ω, CL = 5 pF
(Figure 4 and Figure 5)
tPLZ
Disable Time Low to Z
2.5
10
ns
tPZH
Enable Time Z to High
2.5
10
ns
tPZL
Enable Time Z to Low
2.5
10
ns
Min
Typ
Max
Units
0.5
2.0
3.5
ns
0.5
2.1
3.5
ns
900
ps
Switching Characteristics
VCC = +5.0V ± 10%, TA = −40˚C to +85˚C (Notes 3, 6, 9)
Symbol
Parameter
Conditions
tPHLD
Differential Propagation Delay High to Low
tPLHD
Differential Propagation Delay Low to High
tSKD
Differential Skew |tPHLD – tPLHD|
0
80
0
0.3
tSK1
Channel-to-Channel Skew (Note 4)
tSK2
Chip to Chip Skew (Note 5)
tTLH
Rise Time
tTHL
Fall Time
tPHZ
Disable Time High to Z
tPLZ
Disable Time Low to Z
tPZH
tPZL
RL = 100Ω, CL = 5 pF
(Figure 2 and Figure 3)
1.0
ns
3.0
ns
0.35
2.0
ns
0.35
2.0
ns
2.5
15
ns
2.5
15
ns
Enable Time Z to High
2.5
15
ns
Enable Time Z to Low
2.5
15
ns
RL = 100Ω, CL = 5 pF
(Figure 4 and Figure 5)
Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground except: VOD1 and
∆VOD1.
Note 3: All typicals are given for: VCC = +5.0V, TA = +25˚C.
Note 4: Channel-to-Channel Skew is defined as the difference between the propagation delay of the channel and the other channels in the same chip with an event
on the inputs.
Note 5: Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
Note 6: Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tr ≤ 6 ns, and tf ≤ 6 ns.
Note 7: ESD Ratings:
HBM (1.5 kΩ, 100 pF) ≥ 2kV
EIAJ (0Ω, 200 pF) ≥ 250V
Note 8: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
Note 9: CL includes probe and jig capacitance.
Parameter Measurement Information
10098903
FIGURE 1. Driver VOD and VOS Test Circuit
3
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DS90C031B
Switching Characteristics
DS90C031B
Parameter Measurement Information
(Continued)
10098904
FIGURE 2. Driver Propagation Delay and Transition Time Test Circuit
10098905
FIGURE 3. Driver Propagation Delay and Transition Time Waveforms
10098906
FIGURE 4. Driver TRI-STATE Delay Test Circuit
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4
DS90C031B
Parameter Measurement Information
(Continued)
10098907
FIGURE 5. Driver TRI-STATE Delay Waveform
Typical Application
10098908
FIGURE 6. Point-to-Point Application
Applications Information
the other logic state. The typical output current is a mere 3.4
mA with a minimum of 2.5 mA, and a maximum of 4.5 mA.
The current mode requires (as discussed above) that a
resistive termination be employed to terminate the signal
and to complete the loop as shown in Figure 6. AC or
unterminated configurations are not allowed. The 3.4 mA
loop current will develop a differential voltage of 340 mV
across the 100Ω termination resistor which the receiver detects with a 240 mV minimum differential noise margin neglecting resistive line losses (driven signal minus receiver
threshold (340 mV – 100 mV = 240 mV). The signal is
centered around +1.2V (Driver Offset, VOS) with respect to
ground as shown in Figure 7. Note that the steady-state
voltage (VSS) peak-to-peak swing is twice the differential
voltage (VOD) and is typically 680 mV.
The current mode driver provides substantial benefits over
voltage mode drivers, such as an RS-422 driver. Its quiescent current remains relatively flat versus switching frequency. Whereas the RS-422 voltage mode driver increases
exponentially in most case between 20 MHz–50 MHz. This
is due to the overlap current that flows between the rails of
the device when the internal gates switch. Whereas the
current mode driver switches a fixed current between its
output without any substantial overlap current. This is similar
LVDS drivers and receivers are intended to be primarily used
in an uncomplicated point-to-point configuration as is shown
in Figure 6. This configuration provides a clean signaling
environment for the quick edge rates of the drivers. The
receiver is connected to the driver through a balanced media
which may be a standard twisted pair cable, a parallel pair
cable, or simply PCB traces. Typically, the characteristic
impedance of the media is in the range of 100Ω. A termination resistor of 100Ω should be selected to match the media,
and is located as close to the receiver input pins as possible.
The termination resistor converts the current sourced by the
driver into a voltage that is detected by the receiver. Other
configurations are possible such as a multi-receiver configuration, but the effects of a mid-stream connector(s), cable
stub(s), and other impedance discontinuities as well as
ground shifting, noise margin limits, and total termination
loading must be taken into account.
The DS90C031B differential line driver is a balanced current
source design. A current mode driver, generally speaking
has a high output impedance and supplies a constant current for a range of loads (a voltage mode driver on the other
hand supplies a constant voltage for a range of loads).
Current is switched through the load in one direction to
produce a logic state and in the other direction to produce
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DS90C031B
Applications Information
The footprint of the DS90C031B is the same as the industry
standard 26LS31 Quad Differential (RS-422) Driver.
(Continued)
to some ECL and PECL devices, but without the heavy static
ICC requirements of the ECL/PECL designs. LVDS requires
> 80% less current than similar PECL devices. AC specifications for the driver are a tenfold improvement over other
existing RS-422 drivers.
The DS90C031B is electrically similar to the DS90C031, but
differs by supporting high impedance LVDS outputs under
power-off condition. This allows for multiple or redundant
drivers to be used in certain applications. The DS90C031B is
offered in a space saving narrow SOIC (150 mil.) package.
The fail-safe circuitry guarantees that the outputs are enabled and at a logic ’0’ (the true output is low and the
complement output is high) when the inputs are floating.
The TRI-STATE function allows the driver outputs to be
disabled, thus obtaining an even lower power state when the
transmission of data is not required.
For additional LVDS application information, please refer to
National’s LVDS Owner’s Manual available through National’s website www.national.com/appinfo/lvds.
10098909
FIGURE 7. Driver Output Levels
Pin Descriptions
Pin No.
Name
Description
1, 7, 9, 15
DIN
2, 6, 10, 14
DOUT+
Non-inverting driver output pin, LVDS levels
3, 5, 11, 13
DOUT−
Inverting driver output pin, LVDS levels
Driver input pin, TTL/CMOS compatible
4
EN
Active high enable pin, OR-ed with EN*
12
EN*
Active low enable pin, OR-ed with EN
16
VCC
Power supply pin, +5V ± 10%
8
GND
Ground pin
Ordering Information
Operating
Package Type/
Temperature
Number
−40˚C to +85˚C
SOP/M16A
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Order Number
DS90C031BTM
6
DS90C031B
Typical Performance
Characteristics
Power Supply Current
vs Power Supply Voltage
Power Supply Current
vs Temperature
10098910
10098911
Power Supply Current
vs Power Supply Voltage
Power Supply Current
vs Temperature
10098912
10098913
Output TRI-STATE Current
vs Power Supply Voltage
Output Short Circuit Current
vs Power Supply Voltage
10098914
10098915
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DS90C031B
Typical Performance Characteristics
(Continued)
Differential Output Voltage
vs Power Supply Voltage
Differential Output Voltage
vs Ambient Temperature
10098916
10098917
Output Voltage High vs
Power Supply Voltage
Output Voltage High vs
Ambient Temperature
10098918
10098919
Output Voltage Low vs
Power Supply Voltage
Output Voltage Low vs
Ambient Temperature
10098920
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10098921
8
DS90C031B
Typical Performance Characteristics
(Continued)
Offset Voltage vs
Power Supply Voltage
Offset Voltage vs
Ambient Temperature
10098922
10098923
Power Supply Current
vs Frequency
Power Supply Current
vs Frequency
10098924
10098925
Differential Output Voltage
vs Load Resistor
Differential Propagation Delay
vs Power Supply Voltage
10098926
10098927
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DS90C031B
Typical Performance Characteristics
(Continued)
Differential Propagation Delay
vs Ambient Temperature
Differential Skew vs
Power Supply Voltage
10098929
10098928
Differential Skew vs
Ambient Temperature
Differential Transition Time
vs Power Supply Voltage
10098930
10098931
Differential Transition Time
vs Ambient Temperature
10098932
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DS90C031B LVDS Quad CMOS Differential Line Driver
Physical Dimensions
inches (millimeters)
unless otherwise noted
16-Lead (0.150" Wide) Molded Small Outline Package, JEDEC
Order Number DS90C031BTM
NS Package Number M16A
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