BLOCK DIAGRAM—ÉLANSC410 MICROCONTROLLER
VL_BE3
VL_LDEV
MWE
VL_D/C
CASL/H1–CASL/H0
VL_LRDY
VL_RST
RAS1–RAS0
MA11–MA5
MA4
MA3 {CFG3}
MA2
MA1 {CFG1}
VL_BE2
MA0 {CFG0}
VL_M/IO
VL_W/R
VESA Local Bus
VL_ADS
DRAM Interface
and Feature
Configuration Pins
VL_BE1
D15–D0
VL_BE0
VL_LCLK
SD15–SD0 [D31–D16]
DRAM, VL, ROM,
and ISA Data
VL_BRDY
SA25–SA0
VL_BLAST
VL, ROM, and ISA
Address
DTR, RTS, SOUT
8-Pin Serial Port
CTS, DCD, DSR
RIN, SIN
IrDA Interface
Power
Management
Interface
GPIOs
GPIO/External
Buffer Control
ACIN
BL2–BL1
BL0 [CLK_IO]
GPIO_CS0
GPIO_CS1
GPIO_CS2 [[DBUFRDL]]
IOR
IOW
MEMR
MEMW
RSTDRV
ISA Bus Command
and Reset
BNDSCN_TCK
GPIO_CS3 [[DBUFRDH]]
GPIO_CS5 [IOCS16]
GPIO_CS6 [IOCHRDY]
GPIO_CS7 [PIRQ1]
GPIO_CS8 [PIRQ0]
GPIO_CS9 [TC]
GPIO_CS10 [AEN]
GPIO_CS11 [PDACK0]
GPIO_CS12 [PDRQ0]
GPIO_CS13
GPIO_CS14
GPIO15
GPIO/
Power Control
ROM/Flash Control
SIROUT
SIRIN
BNDSCN_TMS
GPIO_CS4 [[DBUFOE]]
GPIO/ISA
Interface
ROMCS1–ROMCS0
ROMRD
ROMWR
ÉlanSC410
Microcontroller
292 BGA
BNDSCN_TDI
BNDSCN_TDO
GPIO31 [STRB]
GPIO30 [AFDT]
GPIO29 [SLCTIN]
GPIO28 [INIT]
GPIO27 [ERROR]
GPIO16
GPIO26 [PE]
GPIO17
GPIO18
GPIO25 [ACK]
GPIO19 [LBL2]
GPIO20
Boundary Scan
Interface
Parallel Port or
GPIOs
GPIO24 [BUSY]
GPIO23 [SLCT]
GPIO22 [PPOEN]
Scan Keyboard
Columns/IRQs/XT
Keyboard Interface
Scan Keyboard
Rows/ISA Interface
KBD_COL7
KBD_COL6-2 / PIRQ7-3
GPIO21 [PPDWE]
KBD COL1-0 [XT_CLK/DAT]
SUS_RES / KBD_ROW14
KBD_ROW13 [R32BFOE]
32KXTAL1, 32KXTAL2
KBD_ROW12 [MCS16]
LF_INT, LF_LS
KBD_ROW11 [SBHE]
KBD_ROW10 [BALE]
KBD_ROW9 [PIRQ2]
KBD_ROW8 [PDRQ1]
LF_HS
RESET
32 KHz Crystal
Loop Filters
Reset
KBD_ROW7 [PDACK1]
Scan Keyboard
Rows/DRAM
Interface
KBD_ROW6 [MA12]
VCC_RTC
KBD_ROW5 [RAS3]
BBATSEN
RTC
KBD_ROW4 [RAS2]
KBD_ROW3 [CASH3]
SPKR
Speaker
KBD_ROW2 [CASH2]
KBD_ROW1 [CASL3]
KBD_ROW0 [CASL2]
BNDSCN_EN
Boundary Scan
Enable
Note: / =Two functions available on the pin at the same time. { } = Function during hardware reset. [ ] = Alternative function
selected by firmware configuration. [[ ]] = Alternate function selected by a hardware configuration pin state at power-on reset.