ETC AM29200?

PRELIMINARY
Am29200  and Am29205 
Advanced
Micro
Devices
RISC Microcontrollers
DISTINCTIVE CHARACTERISTICS
Am29200 Microcontroller
Glueless system interfaces with on-chip wait
state control
Completely integrated system for embedded
applications
Four banks of ROM, each separately
programmable for 8-, 16-, or 32-bit interface
Full 32-bit architecture
Four banks of DRAM, each separately
programmable for 16- or 32-bit interface
CMOS technology/TTL-compatible
16- and 20-MHz operating frequencies
Burst-mode and page-mode access support
8 million instructions per second (MIPS)
sustained at 16 MHz
On-chip DRAM mapping
Two-channel DMA controller with
queuing on one channel
304-Mbyte address space
192 general-purpose registers
6-port peripheral interface adapter
Three-address instruction architecture
16-line programmable I/O port
Fully pipelined
Am29200 MICROCONTROLLER BLOCK DIAGRAM
Parallel Port
Control/Status
Lines
4
4
Clock/
6
STAT
MEMCLK
5 Control
4
JTAG
Lines
ROM
Chip Selects
4
ROM
Space
Memory
7
2 DREQ
2 DACK
GREQ/GACK/TDMA
Parallel Port
Controller
2-Channel DMA
Controller
Serial Port
Programmable
I/O Port
Serial
Data
Printer/Scanner
Video
5
Serializer/
Deserializer
Am29000 CPU
Interrupt
Controller
ROM
Controller
DRAM Controller
PIA
Controller
Timer/Counter
6
PIA
Chip Selects
24
Address
Bus
32
Instruction/Data
Bus
16
6
I/O
Interrupts, Traps
RAS/CAS
4/4
DRAM
Peripherals
This document contains information on a product under development at Advanced Micro Devices, Inc. The information is intended
to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice.
Publication# 16361 Rev. C Amendment /0
Issue Date: January 1994. WWW: 5/4/95.
PRELIMINARY
AMD
Bidirectional bit serializer/deserializer
(video interface)
Binary compatibility with all 29K Family
microcontrollers and microprocessors
Serial port (UART)
Advanced debugging support
Bidirectional parallel port controller
IEEE Std 1149.1-1990 (JTAG) compliant
Standard Test Access Port and Boundary Scan
Architecture
Interrupt controller
On-chip timer
DISTINCTIVE CHARACTERISTICS
Am29205 Microcontroller
Fully functional 16-bit DRAM interface
complete with address MUXing, Refresh, and
RAS/CAS generation
The low-cost Am29205 microcontroller is similar to the
Am29200 microcontroller, with a 16-bit instruction/data
bus, fewer peripheral ports, and no JTAG interface. It includes the following features:
—Page-mode access support
—On-chip DRAM mapping
Two-port peripheral interface adapter
Completely integrated system for embedded
applications
Eight-line programmable I/O port
Full 16-bit external, 32-bit internal architecture
Bidirectional bit serializer/deserializer
(video interface)
Upgradeable to the Am29200 32-bit RISC
microcontroller
Serial port (UART)
12- and 16-MHz operating frequencies
Bidirectional parallel port controller
68-Mbyte address space
Interrupt controller
Two-channel DMA controller (one external)
On-chip timer
Three separately programmable ROM banks
with 8- and 16-bit ROM interface
Binary compatibility with all 29K Family
microcontrollers and microprocessors
Am29205 MICROCONTROLLER BLOCK DIAGRAM
Parallel Port
Control/Status
Lines
4
2
6
Clock/
Control
Lines
MEMCLK
ROM
Chip Selects
3
ROM
Space
Memory
2
DREQ
DACK
Parallel Port
Controller
DMA
Controller
Serial Port
Programmable
I/O Port
Serial
Data
Printer/Scanner
Video
3
Serializer/
Deserializer
Am29000 CPU
Interrupt
Controller
ROM
Controller
DRAM Controller
PIA
Controller
Timer/Counter
2
PIA
Chip Selects
22
Address
Bus
16
Instruction/Data
Bus
Peripherals
2
Am29200 and Am29205 RISC Microcontrollers
2
8
I/O
Interrupts
RAS/CAS
4/2
DRAM
ADVANCE INFORMATION
AMD
TABLE OF CONTENTS
DISTINCTIVE CHARACTERISTICS
1
Am29200 MICROCONTROLLER
Block Diagram
1
1
Am29205 MICROCONTROLLER
Block Diagram
2
2
GENERAL DESCRIPTION
5
RELATED AMD PRODUCTS
5
29K FAMILY DEVELOPMENT SUPPORT PRODUCTS
7
THIRD-PARTY DEVELOPMENT SUPPORT PRODUCTS
7
KEY FEATURES AND BENEFITS
Complete Set of Common SystemPeripherals
Wide Range of Price/Performance Points
Glueless System Interfaces
Bus- and Binary-Compatibility
Performance Overview
Debugging And Testing
CONNECTION DIAGRAMS
7
7
8
8
8
9
10
11
Am29200 MICROCONTROLLER
168-Lead Plastic Quad Flat Pack (PQR 168)
PQFP Pin Designations by Pin Number
PQFP Pin Designations by Pin Name
11
11
12
13
Am29205 MICROCONTROLLER
100-Lead Plastic Quad Flat Pack (PQB 100)
PQFP Pin Designations by Pin Number
PQFP Pin Designations by Pin Name
14
14
15
16
LOGIC SYMBOLS
17
Am29200 MICROCONTROLLER
17
Am29205 MICROCONTROLLER
18
ORDERING INFORMATION
19
Am29200 MICROCONTROLLER
19
Am29205 MICROCONTROLLER
20
ABSOLUTE MAXIMUM RATINGS
21
OPERATING RANGES
21
DC CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
21
Am29200 MICROCONTROLLER
21
Am29205 MICROCONTROLLER
23
CAPACITANCE
21
Am29200 MICROCONTROLLER
21
Am29205 MICROCONTROLLER
23
Am29200 and Am29205 RISC Microcontrollers
3
AMD
ADVANCE INFORMATION
SWITCHING CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29200 MICROCONTROLLER
22
Am29205 MICROCONTROLLER
24
SWITCHING WAVEFORMS
25
SWITCHING TEST CIRCUIT
26
THERMAL CHARACTERISTICS
26
PHYSICAL DIMENSIONS
28
4
Am29200 MICROCONTROLLER
PQR 168—Plastic Quad Flat Pack; Molded Carrier Ring
PQR 168—Plastic Quad Flat Pack; Trimmed and Formed
Solder Land Recommendations
28
28
29
30
Am29205 MICROCONTROLLER
PQB 100—Plastic Quad Flat Pack; Molded Carrier Ring
PQB 100—Plastic Quad Flat Pack; Trimmed And Formed
Solder Land Recommendations
31
31
32
33
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
GENERAL DESCRIPTION
The Am29200 and Am29205 RISC microcontrollers are
highly integrated, 32-bit embedded processors implemented in complementary metal-oxide semiconductor
(CMOS) technology. Based on the 29K architecture, the
Am29200 and Am29205 microcontrollers are part of a
growing family of RISC microcontrollers, which also includes the high-performance Am29240, Am29245,
and Am29243 RISC microcontrollers. A feature summary of the Am29200 RISC microcontroller family is included in Table 1.
Through submicron technology, the Am29200 and
Am29205 microcontrollers incorporate a complete set
of system facilities commonly found in printing, imaging,
graphics, and other embedded applications. The onchip functions include: a ROM controller, a DRAM controller, a peripheral interface adapter, a DMA controller,
a serializer/deserializer, a programmable I/O port, a parallel port, a serial port, and an interrupt controller. For a
complete description of the technical features, on-chip
peripherals, programming interface, and instruction set,
please refer to the Am29200 and Am29205 RISC Microcontrollers User’s Manual (order #16362).
The Am29200 and Am29205 RISC microcontrollers are
well suited for embedded applications since they provide
better performance than the CISC processors typically
used in these applications. Compared to the CISC processors, the Am29200 and Am29205 microcontrollers
offer superior price/performance and design flexibility for
the designer. Coupled with hardware and software development tools from AMD and the AMD Fusion29K Par-
tners, the Am29200 and Am29205 microcontrollers
provide very quick time-to-market.
Am29200 Microcontroller
The Am29200 microcontroller meets the common requirements of embedded applications such as industrial
control, graphics processing, imaging applications, laser printers, and general purpose applications requiring
high performance in a compact design.
The Am29200 microcontroller is available in a 168-lead
Plastic Quad Flat Pack (PQFP) package. The PQFP has
140 signal pins and 28 power/ground pins.
Am29205 Microcontroller
The Am29205 RISC microcontroller is a highly integrated, low-cost derivative of the Am29200 32-bit RISC
microcontroller. The Am29205 microcontroller is functionally very similar to an Am29200 microcontroller operating with 16-bit external memories.
The Am29205 microcontroller is designed specifically
for low-cost general purpose embedded applications,
as well as graphics processors, mass storage controllers, network interfaces, application program interface
(API) accelerators, scanners, and laser printers.
The Am29205 microcontroller is available in a 100-lead
PQFP package. The PQFP has 84 signal pins and 16
power/ground pins.
RELATED AMD PRODUCTS
29K Family Devices
Part No.
Description
Am29000
32-bit RISC microprocessor
Am29005
Low-cost 32-bit RISC microprocessor with no MMU and no branch target cache
Am29030
32-bit RISC microprocessor with 8-Kbyte instruction cache
Am29035
32-bit RISC microprocessor with 4-Kbyte instruction cache
Am29050
32-bit RISC microprocessor with on-chip floating point
Am29240
32-bit RISC microcontroller with 4-Kbyte instruction cache and 2-Kbyte data cache
Am29245
Low-cost 32-bit RISC microcontroller with 4-Kbyte instruction cache
Am29243
32-bit RISC data microcontroller with instruction and data caches and DRAM parity
Am29200 and Am29205 RISC Microcontrollers
5
PRELIMINARY
AMD
Table 1. Product Comparison—Am29200 Microcontroller Family
FEATURE
Am29205
Microcontroller
Am29200
Microcontroller
Am29245
Microcontroller
Am29240
Microcontroller
Am29243
Microcontroller
Instruction Cache
—
—
4 Kbytes
4 Kbytes
4 Kbytes
Data Cache
—
—
—
2 Kbytes
2 Kbytes
Software
Software
Software
32 x 32-bit
32 x 32-bit
—
—
1 TLB
16 Entry
1 TLB
16 Entry
2 TLBs
32 Entry
32 bits
16 bits
32 bits
32 bits
32 bits
32 bits
32 bits
32 bits
32 bits
32 bits
3
8, 16 bits
4 Mbytes
16 bits
Not Supported
4
8, 16, 32 bits
16 Mbytes
8, 16, 32 bits
Supported
4
8, 16, 32 bits
16 Mbytes
8, 16, 32 bits
Supported
4
8, 16, 32 bits
16 Mbytes
8, 16, 32 bits
Supported
4
16, 32 bits
16 Mbytes
8, 16, 32 bits
Supported
4
16 bits only
—
8 Mbytes/bank
Not Supported
4
16, 32 bits
16 Mbytes/bank
8 Mbytes/bank
Supported
4
16, 32 bits
16 Mbytes/bank
8 Mbytes/bank
Supported
4
16, 32 bits
16 Mbytes/bank
8 Mbytes/bank
Supported
4
8, 16, 32 bits
16 Mbytes/bank
8 Mbytes/bank
Not Supported
3/2
No
3/2
No
2/1
No
2/1
No
2/1
Yes
8, 16 bits
1 Channel
No
No
No
8, 16, 32 bits
2 Channels
Yes
No
Yes
8, 16, 32 bits
2 Channels
Yes
Yes
Yes
8, 16, 32 bits
4 Channels
Yes
Yes
Yes
8, 16, 32 bits
4 Channels
Yes
Yes
Yes
Double-Frequency
CPU Option
No
No
No
Yes
Yes
Low Voltage Operation
No
No
Yes
Yes
Yes
2
8, 16 bits
3
6
8, 16, 32 bits
3
6
8, 16, 32 bits
2
6
8, 16, 32 bits
2
6
8, 16, 32 bits
2
8
16
16
16
16
8
8
8
8
8
1 Port
PIO signals
1 Port
Supported
1 Port
Supported
2 Ports
1 Port Supported
2 Ports
1 Port Supported
2
4
4
4
4
Integer Multiplier
Memory Management
Unit (MMU)
Data Bus Width
Internal
External
ROM Interface
Banks
Width
ROM Size (Max/Bank)
Boot-Up ROM Width
Burst-Mode Access
DRAM Interface
Banks
Width
Size: 32-Bit Mode
Size: 16-Bit Mode
Video DRAM
Access Cycles
Initial/Burst
DRAM Parity
On-Chip DMA
Width (ext. peripherals)
Externally Controlled
External Master Access
External Master Burst
External Terminate Signal
Peripheral Interface
Adapter (PIA)
PIA Ports
Data Width
Min. Cycles Access
Programmable I/O Port
(PIO)
Signals
Signals programmable
for interrupt generation
Serial Ports
Ports
DSR/DTR
Interrupt Controller
External Interrupt Pins
External Trap and Warn
Pins
0
3
3
3
3
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
JTAG Debug Support
No
Yes
Yes
Yes
Yes
Serializer/Deserializer
Yes
Yes
Yes
Yes
No
Pin Count and Package
100 PQFP
168 PQFP
196 PQFP
196 PQFP
196 PQFP
Processor Clock Rate
12, 16 MHz
16, 20 MHz
16 MHz
20, 25, 33 MHz
20, 25, 33 MHz
Parallel Port Controller
32-Bit Transfer
6
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
29K FAMILY DEVELOPMENT SUPPORT PRODUCTS
Contact your local AMD representative for information
on the complete set of development support tools. The
following software and hardware development products
are available on several hosts:
Optimizing compilers for common high-level
languages
Assembler and utility packages
Source- and assembly-level software debuggers
Target-resident development monitors
Simulators
Execution boards
THIRD-PARTY DEVELOPMENT SUPPORT PRODUCTS
The Fusion29K Program of Partnerships for Application
Solutions provides the user with a vast array of products
designed to meet critical time-to-market needs. Products and solutions available from the AMD Fusion29K
Partners include
Board level products
Laser printer solutions
Networking and communication solutions
Multiuser, kernel, and real-time operating systems
Graphics solutions
Silicon products
Software generation and debug tools
Manufacturing support
Custom software consulting, support, and training
Hardware development tools
KEY FEATURES AND BENEFITS
Complete Set of Common System
Peripherals
The Am29200 and Am29205 microcontrollers minimize
system cost by incorporating a complete set of system
facilities commonly found in embedded applications,
eliminating the cost of additional components.
The on-chip functions include: a ROM controller, a
DRAM controller, a peripheral interface adapter, a DMA
controller, a programmable I/O port, a parallel port, a serial port, and an interrupt controller. A serializer/deserializer (video interface) is also included for printer,
scanner, and other imaging applications.
By providing glueless interfacing to external memories
and a complete set of common system peripherals onchip, these microcontrollers let product designers capitalize on the very low system cost made possible by
the integration of processor and peripherals. Many simple systems can be built using only the Am29200 or
Am29205 microcontroller and external ROM and/or
DRAM memory.
ROM Controller
The ROM controller supports four individual banks of
ROM or other static memory in the Am29200 microcontroller and three banks in the Am29205 microcontroller.
Each ROM bank has its own timing characteristics, and
each bank may be of a different size: either 8, 16, or 32
bits wide in the Am29200 microcontroller and 8 or 16 bits
wide in the Am29205 microcontroller. The ROM banks
can appear as a contiguous memory area of up to 64
Mbytes in size on the Am29200 microcontroller. The
ROM controller also supports writes to the ROM memory
space for devices such as flash EPROMs and SRAMs.
DRAM Controller
The DRAM controller supports four separate banks of
dynamic memory. On the Am29200 microcontroller,
each bank can be a different size: either 16 or 32 bits
wide. DRAM banks on the Am29205 microcontroller are
16 bits wide. The DRAM banks can appear as a contiguous memory area of up to 64 Mbytes in size on the
Am29200 microcontroller and 32 Mbytes on the
Am29205 microcontroller. To support system functions
such as on-the-fly data compression and decompression, four 64-Kbyte regions of the DRAM can be mapped
into a 16-Mbyte virtual address space.
DMA Controller
The DMA controller in the Am29200 microcontroller provides two channels for transfer of data between the
DRAM and internal or external peripherals. One of the
DMA channels is double buffered to relax the
constraints on the reload time. On the Am29205 microcontroller, internal 32-bit transfers are supported on two
DMA channels; external transfers are limited to 8- or
16-bit data accesses on one DMA channel.
Peripheral Interface Adapter (PIA)
The peripheral interface adapter allows for additional
system features implemented by external peripheral
chips. The PIA permits glueless interfacing from the
Am29200 microcontroller to as many as six external peripheral regions and from the Am29205 microcontroller
to two external peripherals.
Interrupt Controller
The interrupt controller generates and reports the status
of interrupts caused by on-chip peripherals.
Am29200 and Am29205 RISC Microcontrollers
7
AMD
PRELIMINARY
I/O Port
The Am29200 microcontroller’s I/O port permits direct
access to 16 individually programmable external input/
output signals. Eight signals are available on the
Am29205 microcontroller. These eight signals can be
configured to cause interrupts on either microcontroller.
Serializer/Deserializer
The bidirectional bit serializer/deserializer (video interface) permits direct connection to a number of laser
marking engines, video displays, or raster input devices
such as scanners.
Serial Port
The serial port implements a full-duplex UART.
Parallel Port
The parallel port implements a bidirectional IBM PCcompatible parallel interface to a host processor.
Wide Range of Price/Performance Points
To reduce design costs and time-to-market, one basic
system design can be used as the foundation for an entire product line. From this design, numerous implementations of the product at various levels of price and
performance may be derived with minimum time, effort,
and cost.
The Am29200 and Am29205 microcontrollers provide
this capability through programmable memory widths,
burst-mode and page-mode access support, programmable wait states, and hardware and 29K Family software compatibility. A system can be upgraded without
hardware and software redesign using various memory
architectures.
The ROM controller on the Am29205 microcontroller accommodates memories that are either 8 or 16 bits wide,
while that of the Am29200 microcontroller supports either
8-, 16-, or 32-bit memories. The DRAM controller on
the Am29205 microcontroller accommodates dynamic
memories that are 16 bits wide; the Am29200 microcontroller supports either 16- or 32-bit memories.
These unique features provide a flexible interface to
low-cost memory as well as a convenient, flexible upgrade path. For example, a system can start with a 16-bit
memory design and can subsequently improve performance by migrating to a 32-bit memory design. One particular advantage is the ability to add memory in
half-megabyte increments. This provides significant
cost savings for applications that do not require larger
memory upgrades.
The Am29200 microcontroller family allows users to address a wide range of cost performance points, with
higher performance and lower cost than existing designs based on CISC microprocessors.
8
Glueless System Interfaces
The Am29200 and Am29205 microcontrollers minimize
system cost by providing a glueless attachment to external ROMs, DRAMs, and other peripheral components.
Processor outputs have edge-rate control that allows
them to drive a wide range of load capacitances with low
noise and ringing. This eliminates the cost of external
logic and buffering.
Bus- and Binary-Compatibility
Compatibility within a processor family is critical for
achieving a rational, easy upgrade path. The Am29200
and Am29205 microcontrollers are members of a buscompatible family of RISC microcontrollers, which also
includes the high-performance Am29240, Am29245,
and Am29243 microcontrollers. Future members of this
family will improve in price and performance and system
capabilities without requiring that users redesign their
system hardware or software. Bus compatibility ensures
a convenient upgrade path for future systems.
The Am29200 microcontroller is binary compatible with
the Am29240, Am29245, and Am29243 microcontrollers,
as well as the Am29000, Am29005, Am29030, Am29035,
and Am29050 microprocessors. The Am29200 microcontroller family provides a migration path to low-cost, highly
integrated systems for products based on other 29K
Family microprocessors, without requiring expensive rewrites of application software.
Complete Development and
Support Environment
A complete development and support environment is vital for reducing a product’s time-to-market. Advanced
Micro Devices has created a standard development environment for the 29K Family of processors. In addition,
the Fusion29K third-party support organization provides
the most comprehensive customer/partner program in
the embedded processor market.
Advanced Micro Devices offers a complete set of hardware and software tools for design, integration, debugging, and benchmarking. These tools, which are
available now for the 29K Family, include the following:
High C 29K optimizing C compiler with assembler, linker, ANSI library functions, and 29K architectural simulator
XRAY29KTM source-level debugger
MiniMON29KTM debug monitor
A complete family of demonstration and development boards
In addition, Advanced Micro Devices has developed a
standard host interface (HIF) specification for operating
system services, the Universal Debug Interface (UDI) for
seamless connection of debuggers to ICEs and target
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
hardware, and extensions for the UNIX common object
file format (COFF).
This support is augmented by an engineering hotline, an
on-line bulletin board, and field application engineers.
PERFORMANCE OVERVIEW
The Am29200 and Am29205 microcontrollers offer a
significant margin of performance over CISC microprocessors in existing embedded designs, since the majority
of processor features were defined for the maximum
achievable performance at a very low cost. This section describes the features of the Am29200 and
Am29205 microcontrollers from the point of view of
system performance.
Instruction Timing
AMD
Instruction Set Overview
The Am29200 and Am29205 microcontrollers employ a
three-address instruction set architecture. The compiler
or assembly-language programmer is given complete
freedom to allocate register usage. There are 192 general-purpose registers, allowing the retention of intermediate calculations and avoiding needless data
destruction. Instruction operands may be contained in
any of the general-purpose registers, and the results
may be stored into any of the general-purpose registers.
The instruction set contains 117 instructions that are divided into nine classes. These classes are integer arithmetic, compare, logical, shift, data movement, constant,
floating point, branch, and miscellaneous. The floatingpoint instructions are not executed directly, but are emulated by trap handlers.
The Am29200 and Am29205 microcontrollers use an
arithmetic/logic unit, a field shift unit, and a prioritizer to
execute most instructions. Each of these is organized to
operate on 32-bit operands and provide a 32-bit result.
All operations are performed in a single cycle.
All directly implemented instructions are capable of
executing in one processor cycle, with the exception of
interrupt returns, loads, and stores.
The performance degradation of load and store operations is minimized in the Am29200 and Am29205 microcontrollers by overlapping them with instruction
execution, by taking advantage of pipelining, and by organizing the flow of external data into the processor so
that the impact of external accesses is minimized.
The Am29200 and Am29205 microcontrollers define a
word as 32 bits of data, a half-word as 16 bits, and a byte
as 8 bits. The hardware provides direct support for wordinteger (signed and unsigned), word-logical, word-boolean, half-word integer (signed and unsigned), and
character data (signed and unsigned).
Pipelining
Instruction operations are overlapped with instruction
fetch, instruction decode and operand fetch, instruction
execution, and result write-back to the register file.
Pipeline forwarding logic detects pipeline dependencies
and routes data as required, avoiding delays that might
arise from these dependencies.
Pipeline interlocks are implemented by processor hardware. Except for a few special cases, it is not necessary
to rearrange programs to avoid pipeline dependencies,
although this is sometimes desirable for performance.
Burst-Mode and Page-Mode Memories
The Am29200 microcontroller directly supports burstmode memories in ROM address space. The burstmode memory supplies instructions at the maximum
bandwidth, without the complexity of an external cache
or the performance degradation due to cache misses.
Both the Am29200 and Am29205 microcontrollers can
also use the page-mode capability of common DRAMs
to improve the access time in cases where page-mode
accesses can be used. This is particularly useful in very
low-cost systems with 16-bit-wide DRAMs, where the
DRAM must be accessed twice for each 32-bit operand.
Data Formats
Word-boolean data is based on the value contained in
the most significant bit of the word. The values TRUE
and FALSE are represented by the MSB values 1 and 0,
respectively.
Other data formats, such as character strings, are supported by instruction sequences. Floating-point formats
(single and double precision) are defined for the processor; however, there is no direct hardware support for these
formats in the Am29200 or Am29205 microcontroller.
Protection
The Am29200 and Am29205 microcontrollers offer two
mutually exclusive modes of execution, the user and
supervisor modes, that restrict or permit accesses to
certain processor registers and external storage locations.
The register file may be configured to restrict accesses
to supervisor-mode programs on a bank-by-bank basis.
DRAM Mapping
The Am29200 and Am29205 microcontrollers provide a
16-Mbyte region of virtual memory that is mapped to one
of four 64-Kbyte blocks in the physical DRAM memory.
This supports system functions such as on-the-fly data
compression and decompression, allowing a large data
Am29200 and Am29205 RISC Microcontrollers
9
AMD
PRELIMINARY
structure such as a frame buffer to be stored in a compressed format while the application software operates
on a region of the structure that is decompressed. Using
a mechanism that is analogous to demand paging, system software moves data between the compressed and
decompressed formats in a way that is invisible to the
application software. This feature can greatly reduce the
amount of memory required for printing, imaging, and
graphics applications.
Interrupts and Traps
When the microcontroller takes an interrupt or trap, it
does not automatically save its current state information
in memory. This lightweight interrupt and trap facility
greatly improves the performance of temporary interruptions such as simple operating-system calls that require no saving of state information.
In cases where the processor state must be saved, the
saving and restoring of state information is under the
control of software. The methods and data structures
used to handle interrupts—and the amount of state information saved—may be tailored to the needs of a particular system.
Interrupts and traps are dispatched through a 256-entry
vector table which directs the processor to a routine that
handles a given interrupt or trap. The vector table may
be relocated in memory by the modification of a processor register. There may be multiple vector tables in the
system, though only one is active at any given time.
processor performs a vector fetch every time an interrupt or trap is taken. The vector fetch requires at least
three cycles, in addition to the number of cycles required
for the basic memory access.
DEBUGGING AND TESTING
Software debugging on the Am29200 and Am29205 microcontrollers is facilitated by the instruction trace facility and instruction breakpoints. Instruction tracing is
accomplished by forcing the processor to trap after each
instruction has been executed. Instruction breakpoints
are implemented by the HALT instruction or by a software trap.
The Am29200 microcontroller provides two additional
features to assist system debugging and testing:
The test/development interface is composed of a
group of pins that indicate the state of the processor and control the operation of the processor.
An IEEE Std. 1149.1–1990 (JTAG) compliant Standard Test Access Port and Boundary-Scan Architecture provides a scan interface for testing system
hardware in a production environment. It contains
extensions that allow a hardware-development
system to control and observe the processor without interposing hardware between the processor
and system.
Hardware testing and debugging on the Am29205 microcontroller are supported by using an Am29200 microcontroller to emulate an Am29205 microcontroller.
The vector table is a table of pointers to the interrupt and
trap handlers and requires only 1 Kbyte of memory. The
10
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
CONNECTION DIAGRAMS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
168-Lead Plastic Quad Flat Pack (PQR 168)—Am29200 Microcontroller
Top View
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
Note:
Pin 1 is marked for orientation.
Am29200 and Am29205 RISC Microcontrollers
11
PRELIMINARY
AMD
PQFP PIN DESIGNATIONS (Sorted by Pin Number)—Am29200 Microcontroller
Pin No.
12
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
1
VCC
43
VCC
85
GND
127
PIO12
2
GND
44
GND
86
VCC
128
PIO11
3
MEMCLK
45
DTR
87
A23
129
PIO10
4
INCLK
46
RXD
88
A22
130
PIO9
5
VCC
47
UCLK
89
A21
131
PIO8
6
GND
48
VCC
90
A20
132
PIO7
7
GND
49
GND
91
A19
133
VCC
8
VCC
50
DSR
92
A18
134
GND
9
ID31
51
TXD
93
A17
135
PIO6
10
ID30
52
ROMCS3
94
A16
136
PIO5
11
ID29
53
ROMCS2
95
A15
137
PIO4
12
ID28
54
ROMCS1
96
A14
138
PIO3
13
GND
55
ROMCS0
97
A13
139
PIO2
14
ID27
56
BURST
98
A12
140
PIO1
15
ID26
57
RSWE
99
A11
141
PIO0
16
ID25
58
ROMOE
100
A10
142
TDO
17
ID24
59
RAS3
101
A9
143
STAT2
18
ID23
60
RAS2
102
A8
144
STAT1
19
ID22
61
RAS1
103
A7
145
STAT0
20
ID21
62
RAS0
104
A6
146
VDAT
21
ID20
63
CAS3
105
A5
147
PSYNC
22
ID19
64
CAS2
106
A4
148
GND
23
VCC
65
VCC
107
A3
149
VCC
24
ID18
66
GND
108
A2
150
GREQ
25
ID17
67
CAS1
109
A1
151
DREQ1
26
ID16
68
CAS0
110
A0
152
DREQ0
27
ID15
69
TR/OE
111
VCC
153
TDMA
28
ID14
70
WE
112
GND
154
TRAP0
29
ID13
71
GACK
113
BOOTW
155
TRAP1
30
ID12
72
PIACS5
114
WAIT
156
INTR0
31
ID11
73
PIACS4
115
PAUTOFD
157
INTR1
32
ID10
74
PIACS3
116
PSTROBE
158
INTR2
33
ID9
75
PIACS2
117
VCC
159
INTR3
34
ID8
76
PIACS1
118
GND
160
WARN
35
ID7
77
PIACS0
119
PWE
161
GND
36
ID6
78
PIAWE
120
POE
162
VCLK
37
ID5
79
PIAOE
121
PACK
163
LSYNC
38
ID4
80
R/W
122
PBUSY
164
TMS
39
ID3
81
DACK1
123
PIO15
165
TRST
40
ID2
82
DACK0
124
PIO14
166
TCK
41
ID1
83
GND
125
PIO13
167
TDI
42
ID0
84
VCC
126
GND
168
RESET
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
PQFP PIN DESIGNATIONS (Sorted by Pin Name)—Am29200 Microcontroller
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
A0
110
GND
49
ID31
9
RAS2
60
A1
109
GND
66
INCLK
4
RAS3
59
A2
108
GND
83
INTR0
156
RESET
168
A3
107
GND
85
INTR1
157
ROMCS0
55
A4
106
GND
112
INTR2
158
ROMCS1
54
A5
105
GND
118
INTR3
159
ROMCS2
53
A6
104
GND
126
LSYNC
163
ROMCS3
52
A7
103
GND
134
MEMCLK
3
ROMOE
58
A8
102
GND
148
PACK
121
RSWE
57
A9
101
GND
161
PAUTOFD
115
RXD
46
A10
100
GREQ
150
PBUSY
122
STAT0
145
A11
99
ID0
42
PIACS0
77
STAT1
144
A12
98
ID1
41
PIACS1
76
STAT2
143
A13
97
ID2
40
PIACS2
75
TCK
166
A14
96
ID3
39
PIACS3
74
TDI
167
A15
95
ID4
38
PIACS4
73
TDMA
153
A16
94
ID5
37
PIACS5
72
TDO
142
A17
93
ID6
36
PIAOE
79
TMS
164
A18
92
ID7
35
PIAWE
78
TR/OE
69
A19
91
ID8
34
PIO0
141
TRAP0
154
A20
90
ID9
33
PIO1
140
TRAP1
155
A21
89
ID10
32
PIO2
139
TRST
165
A22
88
ID11
31
PIO3
138
TXD
51
A23
87
ID12
30
PIO4
137
UCLK
47
BOOTW
113
ID13
29
PIO5
136
VCC
1
BURST
56
ID14
28
PIO6
135
VCC
5
CAS0
68
ID15
27
PIO7
132
VCC
8
CAS1
67
ID16
26
PIO8
131
VCC
23
CAS2
64
ID17
25
PIO9
130
VCC
43
CAS3
63
ID18
24
PIO10
129
VCC
48
DACK0
82
ID19
22
PIO11
128
VCC
65
DACK1
81
ID20
21
PIO12
127
VCC
84
DREQ0
152
ID21
20
PIO13
125
VCC
86
DREQ1
151
ID22
19
PIO14
124
VCC
111
DSR
50
ID23
18
PIO15
123
VCC
117
DTR
45
ID24
17
POE
120
VCC
133
GACK
71
ID25
16
PSTROBE
116
VCC
149
GND
2
ID26
15
PSYNC
147
VCLK
162
GND
6
ID27
14
PWE
119
VDAT
146
GND
7
ID28
12
R/W
80
WAIT
114
GND
13
ID29
11
RAS0
62
WARN
160
GND
44
ID30
10
RAS1
61
WE
70
Am29200 and Am29205 RISC Microcontrollers
13
PRELIMINARY
AMD
CONNECTION DIAGRAMS (continued)
79
78
77
76
82
81
80
86
85
84
83
90
89
88
87
94
93
92
91
98
97
96
95
100
99
100-Lead Plastic Quad Flat Pack (PQB 100)—Am29205 Microcontroller
Top View
75
74
73
72
1
2
3
4
5
71
70
6
7
8
9
69
68
67
66
65
64
10
11
12
13
63
62
61
14
15
16
17
60
59
58
57
18
19
20
56
55
54
53
21
22
23
24
52
51
Note:
Pin 1 is marked for orientation.
14
Am29200 and Am29205 RISC Microcontrollers
49
50
45
46
47
48
41
42
43
44
38
39
40
34
35
36
37
30
31
32
33
26
27
28
29
25
PRELIMINARY
AMD
PQFP PIN DESIGNATIONS (Sorted by Pin Number)—Am29205 Microcontroller
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
1
WAIT/TRIST
26
RXD
51
A21
76
PAUTOFD
2
RESET
27
UCLK
52
A20
77
PSTROBE
3
MEMCLK
28
TXD
53
A19
78
PWE
4
INCLK
29
VCC
54
A18
79
VCC
5
VCC
30
GND
55
A17
80
GND
6
GND
31
ROMCS2
56
A16
81
POE
7
GND
32
ROMCS1
57
A15
82
PACK
8
ID31♦
33
ROMCS0
58
A14
83
PBUSY
9
ID30♦
34
RSWE
59
A13
84
PIO15♦
10
ID29♦
35
ROMOE
60
A12
85
PIO14♦
11
ID28♦
36
RAS3
61
A11
86
PIO13♦
12
ID27♦
37
RAS2
62
A10
87
PIO12♦
13
ID26♦
38
RAS1
63
GND
88
PIO11♦
14
VCC
39
RAS0
64
VCC
89
PIO10♦
15
GND
40
CAS3♦
65
GND
90
PIO9♦
16
ID25♦
41
CAS2♦
66
A9
91
PIO8♦
17
ID24♦
42
WE
67
A8
92
VDAT
18
ID23♦
43
PIACS1
68
A7
93
PSYNC
19
ID22♦
44
PIACS0
69
A6
94
VCC
20
ID21♦
45
PIAWE
70
A5
95
GND
21
ID20♦
46
PIAOE
71
A4
96
DREQ1♦
22
ID19♦
47
GND
72
A3
97
INTR2♦
23
ID18♦
48
VCC
73
A2
98
INTR3♦
24
ID17♦
49
R/ W
74
A1
99
VCLK
25
ID16♦
50
DACK1♦
75
A0
100
LSYNC
Note:
♦ The nomenclature of these pins is consistent with the functionally equivalent pins on the Am29200 microcontroller. This is done to
simplify the ease of system design and to guarantee software compatibility between the Am29205 and Am29200 microcontrollers.
ID31 is the most significant data bit and ID16 is the least significant.
Am29200 and Am29205 RISC Microcontrollers
15
PRELIMINARY
AMD
PQFP PIN DESIGNATIONS (Sorted by Pin Name)—Am29205 Microcontroller
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
A0
75
DREQ1♦
96
PIACS0
44
RSWE
34
A1
74
ID16♦
25
PIACS1
43
RXD
26
A2
73
ID17♦
24
PIAOE
46
R/ W
49
A3
72
ID18♦
23
PIAWE
45
TXD
28
A4
71
ID19♦
22
PIO8♦
91
UCLK
27
A5
70
ID20♦
21
PIO9♦
90
VCC
5
A6
69
ID21♦
20
PIO10♦
89
VCC
29
A7
68
ID22♦
19
PIO11♦
88
VCC
48
A8
67
ID23♦
18
PIO12♦
87
VCC
79
A9
66
ID24♦
17
PIO13♦
86
VCC
94
A10
62
ID25♦
16
PIO14♦
85
VCC
64
A11
61
ID26♦
13
PIO15♦
84
VCC
14
A12
60
ID27♦
12
POE
81
VCLK
99
A13
59
ID28♦
11
PSTROBE
77
VDAT
92
A14
58
ID29♦
10
PSYNC
93
GND
7
A15
57
ID30♦
9
PWE
78
GND
30
A16
56
ID31♦
8
RAS0
39
GND
47
A17
55
INCLK
4
RAS1
38
GND
63
A18
54
INTR2♦
97
RAS2
37
GND
80
A19
53
INTR3♦
98
RAS3
36
GND
95
A20
52
LSYNC
100
RESET
2
GND
65
A21
51
MEMCLK
3
ROMCS0
33
GND
15
CAS2♦
41
PACK
82
ROMCS1
32
GND
6
CAS3♦
40
PAUTOFD
76
ROMCS2
31
WAIT/TRIST
1
DACK1♦
50
PBUSY
83
ROMOE
35
WE
42
Note:
♦ The nomenclature of these pins is consistent with the functionally equivalent pins on the Am29200 microcontroller. This is done to
simplify the ease of system design and to guarantee software compatibility between the Am29205 and Am29200 microcontrollers.
ID31 is the most significant data bit and ID16 is the least significant.
16
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
Am29200 MICROCONTROLLER LOGIC SYMBOL
INCLK
RESET
WARN
4
2
MEMCLK
STAT2–STAT0
3
A23–A0
24
INTR3–INTR0
TRAP1–TRAP0
WAIT
R/W
ROMCS3–ROMCS0
4
ROMOE
RSWE
BURST
BOOTW
RAS3–RAS0
4
CAS3–CAS0
4
WE
TR/OE
Am29200 Microcontroller
PIACS5–PIACS0
6
PIAOE
PIAWE
2
DACK1–DACK0
DREQ1–DREQ0
TDMA
GREQ
2
GACK
PBUSY
PACK
POE
PWE
PSTROBE
PAUTOFD
UCLK
RXD
DTR
TXD
DSR
VCLK
LSYNC
TCK
TDI
TMS
TRST
VDAT PSYNC
TDO
PIO15–PIO0 ID31–ID0
16
32
Am29200 and Am29205 RISC Microcontrollers
17
PRELIMINARY
AMD
Am29205 MICROCONTROLLER LOGIC SYMBOL
INCLK
MEMCLK
RESET
2
A21–A0
22
R/ W
INTR3–INTR2
WAIT/TRIST
ROMCS2–ROMCS0
3
ROMOE
RSWE
RAS3–RAS0
4
CAS3–CAS2
2
WE
Am29205 Microcontroller
PIACS1–PIACS0
PIAOE
PIAWE
DREQ1
DACK1
PSTROBE
PBUSY
PAUTOFD
PACK
POE
PWE
UCLK
TXD
RXD
VCLK
LSYNC
VDAT PSYNC
PIO15–PIO8 ID31–ID16
8
18
16
Am29200 and Am29205 RISC Microcontrollers
2
PRELIMINARY
AMD
ORDERING INFORMATION
Standard Products—Am29200 Microcontroller
AMD standard products are available in several packages and operating ranges. Valid order numbers are formed by a
combination of the elements below.
AM29200
–16
C
K
/W
SHIPPING OPTION
/W = Trimmed and Formed
Blank = with Molded Carrier Ring
TEMPERATURE RANGE
C = Commercial (TC = 0°C to +85°C)
I = Industrial (TC = –40°C to +85°C)
PACKAGE TYPE
K = 168-Lead Plastic Quad Flat Pack (PQR 168)
SPEED OPTION
–16 = 16.67 MHz
–20 = 20 MHz
DEVICE NUMBER/DESCRIPTION
Am29200 RISC Microcontroller
Valid Combinations
AM29200–16
AM29200–20
KC, KI
KC/W, KI/W
Valid Combinations
Valid Combinations list configurations planned to
be supported in volume. Consult the local AMD
sales office to confirm availability of specific valid
combinations, and check on newly released
combinations.
Am29200 and Am29205 RISC Microcontrollers
19
PRELIMINARY
AMD
ORDERING INFORMATION
Standard Products—Am29205 Microcontroller
AMD standard products are available in several packages and operating ranges. Valid order numbers are formed by a
combination of the elements below.
AM29205
–16
C
K
\W
SHIPPING OPTION
\W =Trimmed and Formed
Blank = with Molded Carrier Ring
TEMPERATURE RANGE
C = Commercial (TC = 0°C to +85°C)
I = Industrial (TC = –40°C to +85°C)
PACKAGE TYPE
K = 100-Lead Plastic Quad Flat Pack (PQB 100)
SPEED OPTION
–12 = 12.5 MHz
–16 = 16.67 MHz
DEVICE NUMBER/DESCRIPTION
Am29205 RISC Microcontroller
Valid Combinations
AM29205–12
AM29205–16
20
KC, KI,
KC\W, KI\W
Valid Combinations
Valid Combinations list configurations planned to
be supported in volume. Consult the local AMD
sales office to confirm availability of specific valid
combinations, and check on newly released
combinations.
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
ABSOLUTE MAXIMUM RATINGS
Am29200 and Am29205 Microcontrollers
OPERATING RANGES
Am29200 and Am29205 Microcontrollers
Storage Temperature . . . . . . . . . . . . –65°C to +125°C
Voltage on any Pin
with Respect to GND . . . . . . . . . . –0.5 to VCC +0.5 V
Maximum VCC . . . . . . . . . . . . . . . . . . . . . . . . . 6.0 V DC
Commercial (C) and Industrial (I) Devices
Case Temperature (TC) . . . . . . . . . . 0°C to +85°C (C)
Case Temperature (TC) . . . . . . . . . –40°C to +85°C (I)
Supply Voltage (VCC) . . . . . . . . . . . . . +4.75 to +5.25 V
Stresses outside the stated ABSOLUTE MAXIMUM RATINGS
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device functionality.
Operating ranges define those limits between which the functionality of the device is guaranteed.
DC CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29200 Microcontroller
Preliminary
Symbol
Parameter Description
Test Conditions
Notes
Min
Max
Unit
VIL
Input Low Voltage
1
–0.5
0.8
V
VIH
Input High Voltage
1
2.0
VCC +0.5
V
VILINCLK
INCLK Input Low Voltage
–0.5
0.8
V
VIHINCLK
INCLK Input High Voltage
2.4
VCC +0.5
V
0.45
V
VOL
Output Low Voltage for
All Outputs except MEMCLK
IOL = 3.2 mA
VOH
Output High Voltage for
All Outputs except MEMCLK
IOH = –400 µA
ILI
Input Leakage Current
0.45 V ≤ VIN ≤ VCC –0.45 V
ILO
Output Leakage Current
0.45 V ≤ VOUT ≤ VCC –0.45 V
ICCOP
Operating Power
Supply Current
VCC = 5.25 V, Outputs Floating;
Holding RESET active
VOLC
MEMCLK Output Low Voltage
IOLC = 20 mA
VOHC
MEMCLK Output High Voltage
IOHC = –20 mA
2.4
2
V
±10 or
+10/–200
µA
±10
µA
234
280
mA
mA
0.6
V
3
4
VCC –0.6
V
Notes:
1. All inputs except INCLK.
2. The Low input leakage current is –200 µA for the following inputs: TCK, TDI, TMS, TRST, DREQ1–DREQ0, WAIT, WARN,
INTR3–INTR0, TRAP1–TRAP0, and GREQ. These pins have weak internal pull-up transistors.
3. ICC measured at 16.7 MHz, Vcc =5.25 V, Reset Condition.
4. ICC measured at 20.0 MHz, Vcc =5.25 V, Reset Condition.
CAPACITANCE—Am29200 Microcontroller
Preliminary
Symbol
CIN
CINCLK
CMEMCLK
Parameter Description
Max
Unit
Input Capacitance
15
pF
INCLK Input Capacitance
15
pF
20
pF
MEMCLK Capacitance
Test Conditions
fC = 10 MHz
Min
COUT
Output Capacitance
20
pF
CI/O
I/O Pin Capacitance
20
pF
Note:
Limits guaranteed by characterization.
Am29200 and Am29205 RISC Microcontrollers
21
PRELIMINARY
AMD
SWITCHING CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29200 Microcontroller
Preliminary
20 MHz
No.
Test Conditions
(Note 1)
Parameter Description
16 MHz
Min
Max
Min
Max
Unit
1
INCLK Period (=0.5T)
Note 2, 9
25
62.5
30
62.5
ns
2
INCLK High Time
Note 2
9
53.5
9
53.5
ns
3
INCLK Low Time
Note 2
9
53.5
9
53.5
ns
4
INCLK Rise Time
Note 2
4
4
ns
5
INCLK Fall Time
Note 2
4
4
ns
6
MEMCLK Delay from INCLK
7
Synchronous Output Valid Delay
from MEMCLK Rising Edge
7a
0
10
0
10
ns
Note 3a
1
11
1
11
ns
Synchronous Output Valid Delay
from MEMCLK Rising Edge
Note 3a
1
12
1
12
ns
7b
Synchronous Output Valid Delay
from MEMCLK Falling Edge
Note 3b
1
10
1
10
ns
8
Synchronous Output Disable Delay from Note 8
MEMCLK Rising Edge
1
10
1
10
ns
9
Synchronous Input Setup Time
10
10
ns
10
Synchronous Input Hold Time
0
0
ns
11
Asynchronous Pulse Width
Note 4a, 9
4T
4T
ns
11a
Asynchronous Pulse Width
Note 4b
Note 4b
Note 4b
ns
12
MEMCLK High Time
Note 5
0.5T–3
0.5T+3
0.5T–3
0.5T+3
ns
13
MEMCLK Low Time
Note 5
0.5T–3
0.5T+3
0.5T–3
0.5T+3
ns
14
MEMCLK Rise Time
Note 5
0
4
0
4
ns
15
MEMCLK Fall Time
Note 5
0
4
0
4
ns
16
UCLK, VCLK Period
Note 2
25
30
ns
17
UCLK, VCLK High Time
Note 2, 8
9
9
ns
18
UCLK, VCLK Low Time
Note 2, 8
9
9
ns
19
UCLK, VCLK Rise Time
Note 2
4
4
ns
20
UCLK, VCLK Fall Time
Note 2
4
4
ns
21
Synchronous Output Valid Delay from
VCLK Edge
Note 6
1
15
ns
22
Input Setup Time to VCLK Edge
Note 6, 7
10
10
ns
23
Input Hold Time to VCLK Edge
Note 6, 7
0
0
ns
24
TCK Frequency
15
2
1
2
MHz
Notes:
1. All outputs driving 80 pF, measured at VOL =1.5 V and VOH =1.5 V.
2. INCLK, VCLK, and UCLK can be driven with TTL inputs. If not used, UCLK must be tied High.
3. a. Parameter 7a applies only to the outputs PIO15–PIO0, STAT2–STAT0, and DACK1–DACK0. Parameter 7 applies to the
remaining outputs.
b. Parameter 7b applies only to the outputs RASx, CASx, A2–A0, RSWE, TR/OE, and ROMOE. Some of these signals can
also be asserted during the rising edge of MEMCLK, depending on the type of access being performed.
4. a. Parameter 11 applies to all asynchronous inputs except LSYNC and PSYNC.
b. The LSYNC and PSYNC minimum width time is two bit-times. One bit-time corresponds to one internal video clock period.
The internal video clock period is a function of the VCLK period and the programmed VCLK divisor.
5. MEMCLK can drive an external load of 100 pF.
22
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
Notes: (continued)
6. Active VCLK edge depends on the CLKI bit in the Video Control Register.
7. LSYNC and PSYNC may be treated as synchronous signals by meeting setup and hold times. The synchrononization delay
still applies.
8. Not production tested but guaranteed by design or characterization.
9. T=1 MEMCLK period, as defined by the actual frequency on the MEMCLK pin.
DC CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29205 Microcontroller
Preliminary
Symbol
Parameter Description
Test Conditions
Notes
Min
Max
Unit
VIL
Input Low Voltage
1
–0.5
0.8
V
VIH
Input High Voltage
1
2.0
VCC +0.5
V
VILINCLK
INCLK Input Low Voltage
–0.5
0.8
V
VIHINCLK
INCLK Input High Voltage
2.4
VCC +0.5
V
0.45
V
VOL
Output Low Voltage for
All Outputs except MEMCLK
IOL = 3.2 mA
VOH
Output High Voltage for
All Outputs except MEMCLK
IOH = –400 µA
ILI
Input Leakage Current
0.45 V ≤ VIN ≤ VCC –0.45 V
ILO
Output Leakage Current
0.45 V ≤ VOUT ≤ VCC –0.45 V
ICCOP
Operating Power
Supply Current with respect to
MEMCLK
VCC = 5.25 V, Outputs Floating;
Holding RESET active
VOLC
MEMCLK Output Low Voltage
IOLC = 20 mA
VOHC
MEMCLK Output High Voltage
IOHC = –20 mA
2.4
2
V
±10 or
+10/–200
µA
±10
µA
234
175
mA
mA
0.6
V
3
4
VCC –0.6
V
Notes:
1. All inputs except INCLK.
2. The Low input leakage current is –200 µA for the following inputs: INTR3, INTR2, DREQ1, and WAIT/TRIST. These pins have
weak internal pull-up transistors.
3. ICC measured at 16.7 MHz, Vcc =5.25 V, Reset Condition.
4. ICC measured at 12.5 MHz, Vcc =5.25 V, Reset Condition.
CAPACITANCE—Am29205 Microcontroller
Preliminary
Symbol
CIN
CINCLK
CMEMCLK
Parameter Description
Max
Unit
Input Capacitance
15
pF
INCLK Input Capacitance
15
pF
20
pF
MEMCLK Capacitance
Test Conditions
fC = 10 MHz
Min
COUT
Output Capacitance
20
pF
CI/O
I/O Pin Capacitance
20
pF
Note:
Limits guaranteed by characterization.
Am29200 and Am29205 RISC Microcontrollers
23
PRELIMINARY
AMD
SWITCHING CHARACTERISTICS over COMMERCIAL and INDUSTRIAL Operating Ranges
Am29205 Microcontroller
Preliminary
16 MHz
No.
Test Conditions1
Parameter Description
12 MHz
Min
Max
Min
Max
Unit
1
INCLK Period (= 0.5T)
Note 2, 9
30
62.5
40
62.5
ns
2
INCLK High Time
Note 2
9
53.5
12
53.5
ns
3
INCLK Low Time
Note 2
9
53.5
12
53.5
ns
4
INCLK Rise Time
Note 2
4
4
ns
5
INCLK Fall Time
Note 2
4
4
ns
6
MEMCLK Delay from INCLK
ns
7
Synchronous Output Valid Delay
from MEMCLK Rising Edge
7a
Synchronous Output Valid Delay
from MEMCLK Rising Edge
7a′
Synchronous Output Valid Delay
from MEMCLK Rising Edge
0
10
0
10
Note 3a
1
11
1
15
Note 3b
1
12
1
15
1
12
1
15
Note 3c
ns
ns
ns
7b
Synchronous Output Valid Delay
from MEMCLK Falling Edge
Note 3d
1
10
1
15
8
Synchronous Output Disable Delay
from MEMCLK Rising Edge
Note 8
1
10
1
15
9
Synchronous Input Setup Time
8
12
ns
10
Synchronous Input Hold Time
0
0
ns
11
Asynchronous Pulse Width
Note 4a, 9
4T
4T
ns
11a
Asynchronous Pulse Width
Note 4b
Note 4b
Note 4b
12
MEMCLK High Time
Note 5
0.5T –3
0.5T +3
0.5T –3
0.5T +3
ns
13
MEMCLK Low Time
Note 5
0.5T –3
0.5T +3
0.5T –3
0.5T +3
ns
14
MEMCLK Rise Time
Note 5
0
4
0
5
ns
15
MEMCLK Fall Time
Note 5
0
4
0
5
ns
16
UCLK, VCLK Period
Note 2, 8
30
40
ns
17
UCLK, VCLK High Time
Note 2, 8
9
12
ns
18
UCLK, VCLK Low Time
Note 2
9
12
ns
19
UCLK, VCLK Rise time
Note 2
4
4
ns
20
UCLK, VCLK Fall Time
Note 2
4
4
ns
21
Synchronous Output Valid Delay from
VCLK Edge
Note 6
1
20
ns
22
Input Setup Time to VCLK Edge
Notes 6, 7
10
15
ns
23
Input Hold Time to VCLK Edge
Notes 6, 7
0
0
ns
15
1
ns
ns
Notes:
1. All outputs driving 80 pF, measured at VOL = 1.5 V and VOH = 1.5 V.
2. INCLK, VCLK, and UCLK can be driven with TTL inputs. If not used, UCLK must be tied High.
3. a. Parameter 7 applies to all outputs except PIO15–PIO8, PIACS1– PIACS0, DACK1, and A21–A0.
b. Parameter 7a applies to PIO15–PIO8, PIACS1– PIACS0, and DACK1.
c. Parameter 7a′ applies to A21–A0.
d. Parameter 7b applies only to the outputs RASx, CASx, A2–A0, RSWE, and ROMOE. Some of these signals can
also be asserted during the rising edge of MEMCLK, depending on the type of access being performed.
4. a. Parameter 11 applies to all asynchronous inputs except LSYNC and PSYNC.
b. LSYNC and PSYNC minimum width is two bit-times. A bit-time corresponds to one internal video clock period. The internal
video clock period is a function of the VCLK period and the programmed VCLK divisor.
5. MEMCLK can drive an external load of 100 pF.
6. Active VCLK edge depends on CLKI bit in Video Control Register.
7. LSYNC and PSYNC may be treated as synchronous signals by meeting setup and hold times. The synchronization delay still applies.
8. Not production tested but guaranteed by design or characterization.
9. T=1 MEMCLK period, as defined by the actual frequency on the MEMCLK pin.
24
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
SWITCHING WAVEFORMS—Am29200 and Am29205 Microcontrollers
1
2
3
4
5
2.4 V
1.5 V
0.8 V
INCLK
6
12
13
14
MEMCLK
15
VCC – 0.6 V
1.5 V
0.6 V
7b
Synchronous
Outputs
1.5 V
8
1.5 V
7
7a′
7a
9
Synchronous
Inputs
1.5 V
11
Asynchronous
Inputs
10
1.5 V
11a
1.5 V
1.5 V
16
17
18
19
UCLK, VCLK
20
2.0 V
1.5 V
0.8 V
21
VCLK-Relative
Outputs
Note: Video Timing may be relative
to VCLK falling edge if CLKI = 1.
1.5 V
22
VCLK-Relative
Inputs
1.5 V
23
1.5 V
Am29200 and Am29205 RISC Microcontrollers
25
PRELIMINARY
AMD
SWITCHING TEST CIRCUIT—Am29200 and Am29205 Microcontrollers
VL
Model of Dynamic Test Load
IOL max = 3.2 mA
CL
V
Am29200 or Am29205
Microcontroller
Pin Under Test
VREF = 1.5 V
IOH max = 400 µA
VH
Note:
CL is guaranteed to be a minimum 80-pF parasitic load. It represents the distributed load parasitic
attributed to the test hardware and instrumentation present during production testing.
THERMAL CHARACTERISTICS—Am29200 and Am29205 Microcontrollers
PQFP Package
The Am29200 and Am29205 microcontrollers are specified for operation with case temperature ranges for a
commercial or industrial temperature device. Case temperature is measured at the top center of the package as
shown in the figure below.
θJA
θCA
TC
θJC
ÉÉÉÉ
θJA = θJC + θCA
Thermal Resistance — °C/Watt
26
The various temperatures and thermal resistances can
be determined using the following equations along with
information given in Table 2.
θJA = θJC + θCA
P = ICCOP ⋅ VCC
TJ = TC + P ⋅ θJC
TJ = TA + P ⋅ θJA
TC = TJ – P ⋅ θJC
TC = TA + P ⋅ θCA
TA = TJ – P ⋅ θJA
TA = TC – P ⋅ θCA
Allowable ambient temperature curves for various airflows are given in Figures 1–3. These graphs assume a
maximum VCC and a maximum power supply current
equal to ICCOP . All calculations made using the above
information should guarantee that the operating case
temperature does not exceed the maximum case temperature. Since P is a function of operating frequency,
calculations can also be made to determine the ambient
temperature at various operating speeds.
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
Table 2. PQFP Thermal Characteristics (°C/Watt) Surface Mounted
Airflow—ft./min. (m/sec)
Am29200 Microcontroller
0 (0)
200 (1.01) 400 (2.03) 600 (3.04) 800 (4.06)
θJA
Junction-to-Ambient
36
32
29
27
—
θJC
Junction-to-Case
8
8
8
8
—
θCA
Case-to-Ambient
28
24
21
19
—
Am29205 Microcontroller
θJA
Junction-to-Ambient
41
35
30
27
25
θJC
Junction-to-Case
8
8
8
8
8
θCA
Case-to-Ambient
33
27
22
19
17
Maximum
Ambient
(°C)
20 MHz
90
80
70
60
50
40
30
20
10
0
TC at 85°C
0
200
16.67 MHz
90
80
70
60
50
40
30
20
10
0
400
600
Air Flow (ft./min.)
800
TC at 85°C
0
200
400
600
Air Flow (ft./min.)
800
Figure 1. Am29200 Microcontroller—Maximum Allowable Ambient Temperature
(Data Sheet Limit, ICCOPmax, VCC=+5.25 V, Average Thermal Impedance)
Maximum
Ambient
(°C)
16.67 MHz
90
80
70
60
50
40
30
20
10
0
TC at 85°C
0
200
400
600
Air Flow (ft./min.)
12.5 MHz
90
80
70
60
50
40
30
20
10
0
800
TC at 85°C
0
200
400
600
Air Flow (ft./min.)
800
Figure 2. Am29205 Microcontroller—Maximum Allowable Ambient Temperature
(Data Sheet Limit, ICCOPmax, VCC=+5.25 V, Average Thermal Impedance)
Am29200 Microcontroller
Am29205 Microcontroller
45
40
35
30
Thermal
25
Resistance
20
[θJA (°C/W)]
15
10
5
0
45
40
35
30
25
20
15
10
5
0
0
200
400
600
Air Flow (ft./min.)
800
0
200
400
600
Air Flow (ft./min.)
800
Figure 3. Thermal Impedance
Am29200 and Am29205 RISC Microcontrollers
27
PRELIMINARY
AMD
PHYSICAL DIMENSIONS
PQR 168—Am29200 Microcontroller
Plastic Quad Flat Pack; Molded Carrier Ring
(Inner device measured in inches; outer ring measured in millimeters)
45.87
46.13
45.50
41.37
45.90
41.63
37.87
38.13
35.15
35.25
32.15
27.80
32.25
28.10
Pin 42
Pin 84
45.50
37.87
32.15
45.90
38.13
32.25
41.37
35.15
27.80
41.63
35.25
28.10
45.87
Pin 126
Pin 1 I.D.
46.13
Top View
Pin 168
0.45 Typ.
0.650 Typ.
2.00 4.80
1.80
0.65 Pitch
Side View
Note:
Not to scale. For reference only.
28
Am29200 and Am29205 RISC Microcontrollers
20019A
CJ87
08/12/93 MH
PRELIMINARY
AMD
PQR 168—Am29200 Microcontroller
Plastic Quad Flat Pack; Trimmed and Formed
(All measurements are in millimeters)
31.00
27.90
Pin 84
26.65
REF
31.40
28.10
Pin 42
0.22
0.38
26.65
REF
27.90
28.10
31.00
31.40
Pin 1 I.D.
Pin 126
Pin 168
Pin 1
Top View
3.20
3.60
0.65
Basic
3.95
MAX
0.25
MIN
Side View
20028A
CL90
10/27/93 PM
Note:
Not to scale. For reference only.
Am29200 and Am29205 RISC Microcontrollers
29
PRELIMINARY
AMD
Solder Land Recommendations
168-Lead PQFP—Am29200 Microcontroller
Top View
32.22 mm
0.65 mm
32.22 mm
0.40 mm
1.98 mm
0.25 mm
08/13/93 MH
Note:
Not to scale. For reference only.
30
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
PQB 100—Am29205 Microcontroller
English Plastic Quad Flat Pack; Molded Carrier Ring
(Outer ring measured in millimeters)
45.87
46.13
45.50
41.37
45.90
41.63
37.87
38.13
35.15
35.25
Pin 50
32.15
0.897
0.903
32.25
0.744
0.752
Pin 25
45.50 37.87 32.15 0.744
45.90 38.13 32.25 0.752
45.87 41.37 35.15 0.897
46.13 41.63 35.25 0.903
Pin 1
256
Pin 100
Pin 75
Top View
2.00 4.80
1.80
Side View
20009A
CJ83
12/13/93 PLM
Note:
Not to scale. For reference only.
Am29200 and Am29205 RISC Microcontrollers
31
PRELIMINARY
AMD
PQB 100—Am29205 Microcontroller
English Plastic Quad Flat Pack; Trimmed and Formed
(All measurements are in inches)
Pin 50
0.747
0.753
0.875
0.885
0.897
0.903
Pin 25
0.747
0.753
0.008
0.012
0.875
0.885
0.897
0.903
Pin 1 ID
0.008
0.016
Pin 2
Pin 75
Pin 100
Top View
0.025 Basic
0.130
0.150
0.160
0.180
0.60
REF
0.020
0.040
Side View
20010A
CL85
10/27/93 PM
Note:
Not to scale. For reference only.
32
Am29200 and Am29205 RISC Microcontrollers
PRELIMINARY
AMD
Solder Land Recommendations
100-Lead PQFP—Am29205 Microcontroller
(All measurements are in inches)
0.920
0.016
0.895
0.025
0.078
Top View
10/27/93 PM
Note:
Not to scale. For reference only.
AMD and Am29000 are registered trademarks; Fusion29K is a service mark; and 29K, Am29005, Am29030, Am29035, Am29050, Am29200,
Am29205, Am29240, Am29243, Am29245, XRAY29K, and MiniMON29K are trademarks of Advanced Micro Devices, Inc.
High C is a registered trademark of MetaWare, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
 1994 Advanced Micro Devices, Inc.
Am29200 and Am29205 RISC Microcontrollers
33