INA3 INA3 26 INA326 INA327 27 SBOS222 – DECEMBER 2001 Precision, Rail-to-Rail I/O INSTRUMENTATION AMPLIFIER FEATURES DESCRIPTION ● PRECISION LOW OFFSET: 125µV (max) LOW OFFSET DRIFT: 1µV/°C (max) EXCELLENT LONG-TERM STABILITY VERY-LOW 1/f NOISE The INA326 is a high-performance, low-cost, precision instrumentation amplifier with rail-to-rail input and output. It is a true single-supply instrumentation amplifier with very-low DC errors and input common-mode range that extends beyond the positive and negative rails. These features make them suitable for applications ranging from general-purpose to high-accuracy. ● TRUE RAIL-TO-RAIL I/O INPUT COMMON-MODE RANGE: 20mV Beyond Rails WIDE OUTPUT SWING: Within 10mV of Rails SUPPLY RANGE: Single +2.7V to +5.5V ● SMALL SIZE microPACKAGE: MSOP-8 Excellent long-term stability and very low 1/f noise assure low offset voltage and drift throughout the life of the product. The INA326 is specified over the extended industrial temperature range, –40°C to +85°C, with operation from –40°C to +125°C. The INA327, with shutdown and synchronization, will be available Q1 2002. ● LOW COST INA326 AND INA327 RELATED PRODUCTS APPLICATIONS ● LOW-LEVEL TRANSDUCER AMPLIFIER FOR BRIDGES, LOAD CELLS, THERMOCOUPLES ● WIDE DYNAMIC RANGE SENSOR MEASUREMENTS ● HIGH-RESOLUTION TEST SYSTEMS ● WEIGH SCALES ● MULTI-CHANNEL DATA ACQUISITION SYSTEMS ● MEDICAL INSTRUMENTATION ● GENERAL-PURPOSE PRODUCT INA114 INA118 INA122 INA128 INA321 FEATURES 50µV VOS, 0.5nA IB, 115dB CMR, 3mA IQ, 0.25µV/°C drift 50µV VOS, 1nA IB, 120dB CMR, 385µA IQ, 0.5µV/°C drift 250µV VOS, –10nA IB, 85µA IQ, Rail-to-Rail Output, 3µV/°C drift 50µV VOS, 2nA IB, 125dB CMR, 750µA IQ, 0.5µV/°C drift 500µV VOS, 0.5pA IB, 94dB CMRR, 60µA IQ, Rail-to-Rail Output V+ VIN– 2 1 R1 VIN+ V– 7 4 6 INA326 8 3 5 R2 VO G = 2(R2/R1) C2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR(1) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER TRANSPORT MEDIA, QUANTITY MSOP-8 DGK –40°C to +85°C B26 " " " " INA326EA/250 INA326EA/2K5 Tape and Reel, 250 Tape and Reel, 2500 MSOP-8 DGK –40°C to +125°C B26 " " " " INA326IDGKT INA326IDGKR Tape and Reel, 250 Tape and Reel, 2500 MSOP-10 DGS –40°C to +85°C B27 " " " " INA327EA/250 INA327EA/2K5 Tape and Reel, 250 Tape and Reel, 2500 MSOP-10 DGS –40°C to +125°C B27 " " " " INA327IDGST INA327IDGSR Tape and Reel, 250 Tape and Reel, 2500 INA326 " "(2) " INA327(2) " "(2) " NOTES: (1) For the most current specifications and package information, refer to our web site at www.ti.com. (2) INA326I with 125°C range and INA327 available Q1 2002—specifications of 125°C parts may differ. ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage .................................................................................. +5.5V Signal Input Terminals: Voltage(2) ......................................... –0.5V to (V+) + 0.5V Current(2) ........................................................................ ±10mA Output Short-Circuit ................................................................. Continuous Operating Temperature Range ....................................... –40°C to +125°C Storage Temperature Range .......................................... –65°C to +150°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) Input terminals are diode clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PIN CONFIGURATION Top View INA327(1) INA326 R1 1 8 R1 VIN– 2 7 V+ VIN+ 3 6 VO V– 4 5 R2 R1 1 10 R1 VIN– 2 9 V+ VIN+ 3 8 VO V– 4 7 R2 Sync 5 6 Shutdown MSOP-8 MSOP-10 NOTE: (1) INA327 expected Q1 2002. 2 INA326, INA327 www.ti.com SBOS222 ELECTRICAL CHARACTERISTICS: VS = +2.7V TO +5.5V BOLDFACE limits apply over the specified temperature range, TA = –40°C TO 85°C At TA = +25°C, RL = 10kΩ, G = 100 (R1 = 2kΩ, R2 = 100kΩ), external gain set resistors, and IACOMMON = VS /2, with external 1kHz filters, unless otherwise noted. INA326EA PARAMETER CONDITION INPUT Offset Voltage, RTI VOS Over Temperature vs Temperature dVOS/dT vs Power Supply PSR Long-Term Stability Input Impedance, Differential Common-Mode Input Voltage Range Safe Input Voltage Common-Mode Rejection CMR Over Temperature INPUT BIAS CURRENT Bias Current vs Temperature Offset Current VS = 5V, VCM = –0.02V to (V+) + 0.02V VCM = VS /2 VS = 5V IOS VS = 5V ±20 –0.02 –0.5 100 94 TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance ±185 ±1 ±125 µV µV µV/°C µV/V (V+) + 0.02 (V+) + 0.5 Ω || pF Ω || pF V V dB dB ±0.15 ±4 See Note (1) 1010 || 2 1010 || 14 110 ±0.2 ±2 See Typical Characteristics ±0.2 ±2 nA nA 44 44 44 1 nV/√Hz nV/√Hz nV/√Hz µVp-p 120 97 97 4 nV/√Hz nV/√Hz nV/√Hz µVp-p 0.15 4.2 See Applications Information pA/√Hz pAp-p G = 2(R2/R1) < 0.1 ±0.25 ±10 ±0.01 G = 10, 100, VS = 5V, VO = 0.075V to 4.925V G = 10, 100, VS = 5V, VO = 0.075V to 4.925V G = 10, 100, VS = 5V, VO = 0.075V to 4.925V RL = 100kΩ RL = 10kΩ, VS = 5V 75 75 ISC INTERNAL OSCILLATOR Frequency of Auto-Correction Accuracy POWER SUPPLY Specified Voltage Range Quiescent Current Over Temperature UNITS RS = 0Ω, G = 10, R1 = 20kΩ, R2 = 100kΩ OUTPUT Voltage Output Swing from Rail FREQUENCY RESPONSE Bandwidth(4), –3dB Slew Rate(4) Settling Time(4), 0.1% 0.01% 0.1% 0.01% Overload Recovery(4) MAX RS = 0Ω, G = 100, R1 = 2kΩ, R2 = 100kΩ GAIN Gain Equation Range of Gain Gain Error(3) vs Temperature Nonlinearity Over Temperature Capacitive Load Drive Short-Circuit Current VS = +2.7V to +5.5V, VCM = VS /2 TYP ±30 VS = +5V, VCM = VS /2 IB NOISE Voltage Noise, RTI f = 10Hz f = 100Hz f = 1kHz f = 0.01Hz to 10Hz Voltage Noise, RTI f = 10Hz f = 100Hz f = 1kHz f = 0.01Hz to 10Hz Current Noise, RTI f = 1kHz f = 0.1Hz to 10Hz Output Ripple, VO Filtered(2) MIN BW G = 1 to 1k SR VS = 5V, All Gains, CL = 100pF tS 1kHz Filter, G = 1 to 1k, VO = 2V step, CL = 100pF 10kHz Filter, G = 1 to 1k, VO = 2V step, CL = 100pF 1kHz Filter, 50% Output Overload, G = 1 to 1k 10kHz Filter, 50% Output Overload, G = 1 to 1k 5 10 IO = 0, Diff VIN = 0V, VS = 5V 500 ±25 90 ±20 kHz % 1 Filter Limited 0.95 1.3 130 160 30 5 kHz 2.4 –40 –40 –65 θJA MSOP-8 Surface Mount V/V % ppm/°C % of FS mV mV mV pF mA +2.7 IQ > 10000 ±0.5 ±60 ±0.024 150 ms ms µs µs µs µs +5.5 3.4 3.7 V mA mA +85 +125 +150 °C °C °C °C/W NOTES: (1) 1000-hour life test at 150°C demonstrated randomly distributed variation in the range of measurement limits—approximately 10µV. (2) See Applications Information section, Figures 1 and 2. (3) Does not include error and TCR of external gain-setting resistors. (4) Dynamic response is limited by filtering. Higher bandwidths can be achieved by adjusting the filter. INA326, INA327 SBOS222 www.ti.com 3 TYPICAL CHARACTERISTICS At TA = 25°C, VS = +5V, Gain = 100, RL = 10kΩ with external 1kHz filters, unless otherwise noted. GAIN vs FREQUENCY 1kHz FILTER GAIN vs FREQUENCY 10kHz FILTER 80 80 60 60 G = 1k G = 1k 40 Gain (dB) Gain (dB) 40 G = 100 20 G = 10 0 G = 100 20 G = 10 0 G=1 G=1 –20 –20 –40 –40 10 100 1k 10k Frequency (Hz) 100k 1M 10 100 1k 10k Frequency (Hz) 100k 1M 100k 1M CMR vs FREQUENCY 10kHz FILTER CMR vs FREQUENCY 1kHz FILTER 160 160 G = 1k 140 140 G = 100 120 CMR (dB) 100 G = 10 80 G=1 G = 1k 100 80 G = 100 60 60 40 40 G=1 20 20 10 100 1k 10k Frequency (Hz) 100k 10 1M 120 G = 10 80 G=1 Input-Referred Voltage Noise (nV/√Hz) PSR (dB) G = 100, 1k 100 60 40 Filter Frequency 10kHz 1kHz 20 100 1k 10k Frequency (Hz) INPUT-REFERRED VOLTAGE NOISE AND INPUT BIAS CURRENT NOISE vs FREQUENCY 10kHz Filter POWER-SUPPLY REJECTION vs FREQUENCY 0 10k 1 Current Noise (all gains) 1k 0.1 G=1 G = 10 100 0.01 G = 100 G = 1000 10 10 4 G = 10 100 1k Frequency (Hz) 10k 100k 0.001 1 10 100 Frequency (Hz) 1k 10k INA326, INA327 www.ti.com Input Bias Current Noise (pA/√Hz) CMR (dB) 120 SBOS222 TYPICAL CHARACTERISTICS (Cont.) At TA = 25°C, VS = +5V, Gain = 100, RL = 10kΩ with external 1kHz filters, unless otherwise noted. Input Offset Voltage (20µV/div) INPUT OFFSET VOLTAGE vs WARM-UP TIME 10kHz FILTER, G = 100 Input Offset Voltage (20µV/div) INPUT OFFSET VOLTAGE vs WARM-UP TIME 1kHz FILTER, G = 100 0 1 Warm-Up Time (ms) 2 0 SMALL-SIGNAL RESPONSE G = 1, 10, AND 100 0.1 0.2 0.3 Warm-Up Time (ms) 0.4 SMALL-SIGNAL STEP RESPONSE G = 1000 50mV/div 1kHz Filter 50mV/div 1kHz Filter 10kHz Filter 500µs/div 500µs/div LARGE-SIGNAL RESPONSE G = 1 TO 1000 0.01Hz TO 10Hz VOLTAGE NOISE 2V/div 200nV/div 1kHz Filter 10kHz Filter 10s/div 500µs/div INA326, INA327 SBOS222 www.ti.com 5 TYPICAL CHARACTERISTICS (Cont.) At TA = 25°C, VS = +5V, Gain = 100, RL = 10kΩ with external 1kHz filters, unless otherwise noted. OFFSET VOLTAGE PRODUCTION DISTRIBUTION G=1 ±60 ±50 ±40 ±30 ±20 ±10 6250 5000 3750 2500 1250 0 –1250 –2500 –3750 –5000 –6250 Population Population OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION G=1 Offset Voltage Drift (µV/°C) Offset Voltage (µV) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION G = 10 ±7 ±6 ±5 ±4 Offset Voltage Drift (µV/°C) Offset Voltage (µV) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION G = 100, 1000 ±0.7 ±0.6 ±0.5 ±0.4 ±0.3 ±0.2 ±0.1 100.0 87.5 75.0 62.5 50.0 37.5 25.0 12.5 0 –12.5 –25.0 –37.5 Population Population OFFSET VOLTAGE PRODUCTION DISTRIBUTION G = 100, 1000 Offset Voltage Drift (µV/°C) Offset Voltage (µV) 6 ±3 ±2 ±1 875 750 625 500 375 250 125 0 –125 –250 –375 Population Population OFFSET VOLTAGE PRODUCTION DISTRIBUTION G = 10 INA326, INA327 www.ti.com SBOS222 TYPICAL CHARACTERISTICS (Cont.) At TA = 25°C, VS = +5V, Gain = 100, RL = 10kΩ with external 1kHz filters, unless otherwise noted. VOUT (dBV) Population –60 1000 –70 316 –80 100 –90 31.6 –100 10 –110 3.16 –120 1 –130 0.316 –500 –450 –400 –350 –300 –250 –200 –150 –100 –50 0 50 100 150 200 250 300 350 400 450 500 –140 0.1 0 200k 400k 600k Frequency (Hz) 800k 1M Gain Error (m%) QUIESCENT CURRENT vs TEMPERATURE INPUT BIAS CURRENT vs TEMPERATURE 3.0 2.0 VS = +5V 1.5 2.5 1.0 IB– 0.5 VS = +2.7V IB (nA) IQ (mA) 2.0 1.5 0 –0.5 1.0 –1.0 0.5 IB+ –1.5 0 –50 –25 0 25 50 Temperature (°C) 75 100 125 INA326, INA327 SBOS222 www.ti.com –2.0 –50 –25 0 25 50 Temperature (°C) 75 100 125 7 VOUT (µVRMS) OUTPUT RIPPLE SPECTRUM G = 100 GAIN ERROR PRODUCTION DISTRIBUTION APPLICATIONS INFORMATION SETTING THE GAIN The INA326 is a two-stage amplifier with each stage gain set by R1 and R2, respectively (see Figure 4, “inside the INA326", for details.) Overall gain is described by the equation: Figure 1 shows the basic connections required for operation of the INA326. A 0.1µF capacitor, placed close to and across the power supply pins is strongly recommended for highest accuracy. RoCo is an output filter that minimizes auto-correction circuitry noise. This output filter may also serve as an antialiasing filter ahead of an Analog-to-Digital (A/D) converter. It is also optional based on desired precision. G= 2R2 R1 (1) The stability and temperature drift of the external gain-setting resistors will affect gain by an amount that can be directly inferred from the gain equation (1). The output reference terminal is taken at the low side of R2 (IACOMMON). Resistor values for commonly used gains are shown in Figure 1. Gain-set resistor values for best performance are different for +5V single-supply and for ±2.5V dual-supply operation. Optimum value for R1 can be calculated by: The INA326 uses a unique internal topology to achieve excellent common-mode rejection (CMR). Unlike conventional instrumentation amplifiers, CMR is not affected by resistance in the reference connections or sockets. See “Inside the INA326” for further detail. To achieve best high-frequency CMR, minimize capacitance on pins 1 and 8. R1 = VIN, MAX/12.5µA (2) where R1 must be no less than 2kΩ. Dual-Supply Operation DESIRED GAIN R1 (Ω) 0.1 0.2 0.5 1 2 5 10 20 50 100 200 500 1000 2000 5000 10000 400k 400k 400k 200k 100k 40k 20k 10k 4k 2k 2k 2k 2k 2k 2k 2k R2 || C2 (Ω || nF) 20k || 40k || 100k || 100k || 100k || 100k || 100k || 100k || 100k || 100k || 200k || 500k || 1M || 2M || 5M || 10M || 5 2.5 1 1 1 1 1 1 1 1 0.5 0.2 0.1 0.05 0.02 0.01 –2.5V +2.5V 0.1µF VIN– R1 VIN+ 2 7 1 4 6 INA326 RO VO 470Ω VO Filtered CO(1) G = 2(R2/R1) 0.22µF 8 5 3 fO = 1kHz C2(1) R2 IACOMMON(2) NOTE: (1) C2 and CO combine to form a 2-pole response that is –3dB at 1kHz. Each individual pole is at 1.5kHz. (2) Output voltage is referenced to IACOMMON (see text). Single-Supply Operation DESIRED GAIN R1 (Ω) 0.1 0.2 0.5 1 2 5 10 20 50 100 200 500 1000 2000 5000 10000 400k 400k 400k 400k 200k 80k 40k 20k 8k 4k 2k 2k 2k 2k 2k 2k V+ R2 || C2 (Ω || nF) 20k || 40k || 100k || 200k || 200k || 200k || 200k || 200k || 200k || 200k || 200k || 500k || 1M || 2M || 5M || 10M || 5 2.5 1 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.2 0.1 0.05 0.02 0.01 V– 0.1µF VIN– 2 7 1 R1 4 6 INA326 RO VO 470Ω VIN+ VO Filtered CO(1) 8 5 3 G = 2(R2/R1) 0.22µF (3) R2 fO = 1kHz C2(1) IACOMMON(2) NOTE: (1) C2 and CO combine to form a 2-pole response that is –3dB at 1kHz. Each individual pole is at 1.5kHz. (2) Output voltage is referenced to IACOMMON (see text). (3) Output pedestal required for measurement near zero (see Figure 5). FIGURE 1. Basic Connections. 8 INA326, INA327 www.ti.com SBOS222 Following this design procedure for R1 produces the maximum possible input stage gain for best accuracy and lowest noise. Circuit layout and supply bypassing can affect performance. Minimize the stray capacitance on pins 1 and 8. Use recommended supply bypassing, including a capacitor directly from pin 7 to pin 4 (V+ to V–), even with dual (split) power supplies (see Figure 1). DYNAMIC PERFORMANCE The typical characteristic “Gain vs Frequency” shows that the INA326 has nearly constant bandwidth regardless of gain. This results from the bandwidth limiting from the recommended filters. NOISE PERFORMANCE Internal auto-correction circuitry eliminates virtually all 1/f noise (noise that increases at low frequency) in gains of 100 or greater. Noise performance is affected by gain-setting resistor values. Follow recommendations in the “Setting Gain” section for best performance. Total noise is a combination of input stage noise and output stage noise. When referred to the input, the total mid-band noise is: VN = 44nV / Hz + 800nV / Hz G Applications sensitive to the spectral characteristics of highfrequency noise may require consideration of the spurious frequencies generated by internal clocking circuitry. “Spurs” occur at approximately 90kHz and its harmonics (see typical characteristic “Output Spectrum”) which may be reduced by additional filtering below 1kHz. Insufficient filtering at pin 5 can cause nonlinearity with large output voltage swings (very near the supply rails). Noise must be sufficiently filtered at pin 5 so that noise peaks do not “hit the rail” and change the average value of the signal. Figure 2 shows guidelines for filter cutoff frequency. HIGH-FREQUENCY NOISE C2 and CO form filters to reduce internally generated autocorrection circuitry noise. Filter frequencies can be chosen to optimize the tradeoff between noise and frequency response of the application, as shown in Figure 2. The cutoff frequencies of the filters are generally set to the same frequency. Figure 2 shows the typical output noise for four gains as a function of the –3dB cutoff frequency of the combined twopole response. This is equal to the –1.5dB response frequency of each of the 1-pole filters. Small signals may exhibit the addition of internally generated auto-correction circuitry noise at the output. This noise, combined with broadband noise, becomes most evident in higher gains with filters of wider bandwidth. (3) The output noise has some 1/f components that affect performance in gains less than 10. See typical characteristic “Input-Referred Voltage Noise vs Frequency.” High-frequency noise is created by internal auto-correction circuitry and is highly dependent on the filter characteristics chosen. This may be the dominant source of noise visible when viewing the output on an oscilloscope. Low cutoff frequency filters will provide lowest noise. Figure 2 shows the typical noise performance as a function of cutoff frequency. INPUT BIAS CURRENT RETURN PATH The input impedance of the INA326 is extremely high— approximately 1010Ω. However, a path must be provided for the input bias current of both inputs. This input bias current is approximately ±0.2nA. High input impedance means that this input bias current changes very little with varying input voltage. Input circuitry must provide a path for this input bias current for proper operation. Figure 3 shows provision for an input bias current path in a thermocouple application. Without a bias current path, the inputs will float to an undefined potential and the output voltage may not be valid. TOTAL OUTPUT NOISE vs FILTER CUTOFF FREQUENCY Total Output Noise (µVRMS) 1k G = 1000 100 Thermocouple INA326 5 10 G = 100 G = 10 G=1 1 1 10 100 1k Required Filter Cutoff Frequency (Hz) 10k FIGURE 2. Total Output Noise vs Filter Cutoff Frequency. FIGURE 3. Providing Input Bias Current Return Path. INA326, INA327 SBOS222 www.ti.com 9 INPUT COMMON-MODE RANGE INPUT PROTECTION Common instrumentation amplifiers do not respond linearly with common-mode signals near the power-supply rails, even if “rail-to-rail” op amps are used. The INA326 uses a unique topology to achieve true rail-to-rail input behavior (see “Inside the INA326”). The linear input voltage range of each input terminal extends to 20mV beyond the rails. The inputs of the INA326 are protected with internal diodes connected to the power-supply rails. These diodes will clamp the applied signal to prevent it from damaging the input circuitry. If the input signal voltage can exceed the power supplies by more than 0.5V, the input signal current should be limited to less than 10mA to protect the internal clamp diodes. This can generally be done with a series input resistor. Some signal sources are inherently current-limited and do not require limiting resistors. INSIDE THE INA326 The INA326 uses a new, unique internal circuit topology that provides true rail-to-rail input. Unlike other instrumentation amplifiers, it can linearly process inputs up to 20mV beyond the power-supply rails. Conventional instrumentation amplifier circuits cannot deliver such performance, even if rail-to-rail op amps are used. The signal-generated current through R1 comes from A1 and A2’s output stages. A2 combines the current in R1 with a mirrored replica of the current from A1. The resulting current in A2’s output and associated current mirror is two times the current in R1. This current flows in (or out) of pin 5 into R2. The resulting gain equation is: The ability to reject common-mode signals is derived in most instrumentation amplifiers through a combination of amplifier CMR and accurately matched resistor ratios. The INA326 converts the input voltage to a current. Currentmode signal processing provides rejection of commonmode input voltage and power supply variation without accurately matched resistors. G= 2R2 R1 Amplifiers A1, A2 and their associated mirrors are powered from internal charge-pumps that provide voltage supplies that are beyond the positive and negative supply rails. As a result, the voltage developed on R2 can actually swing 20mV beyond the external power supply rails. A3 provides a buffered output of the voltage on R2. A3’s input stage is also operated from the charge-pumped power supplies for true rail-to-rail operation. A simplified diagram shows the basic circuit function. The differential input voltage, VIN+ – VIN– is applied across R1. V+ V– 0.1µF Current Mirror IR1 VIN– IR1 A1 Current Mirror IR1 R1 Current Mirror IR1 2IR1 2IR1 VIN+ A2 2IR1 A3 2IR1 Current Mirror VO 2IR1 R2 C2 IACOMMON FIGURE 4. Simplified Circuit Diagram. 10 INA326, INA327 www.ti.com SBOS222 FILTERING +5V Filtering can be adjusted through selection of R2C2 and ROCO for the desired tradeoff of noise and bandwidth. Adjustment of these components will result in more or less ripple due to auto-correction circuitry noise and will also affect broadband noise. Filtering limits slew rate, settling time, and output overload recovery time. RO R1 5 CO R2 It is generally desirable to keep the resistance of RO relatively low to avoid DC gain error created by the subsequent stage. This may result in relatively high values for CO to produce the desired filter response. The impedance of ROCO can be scaled higher to produce smaller capacitor values if the load impedance is very high. Certain capacitor types greater than 0.1µF may have dielectric absorption effects that can significantly increase settling time in high-accuracy applications (settling to 0.01%). Polypropylene, polystyrene, and polycarbonate types are generally good. Certain “high-K” ceramic types may produce slow settling “tails.” Settling time to 0.1% is not generally affected by high-K ceramic capacitors. Electrolytic types are not recommended for C2 and CO. INA326 IL C2 RS must be chosen so that the input voltage does not exceed 20mV beyond the rail. RS NOTE: Connection point of V– will include ( ) or exclude ( ) quiescent current in the measurement as desired. Output pedestal required for measurements near zero (see Figure 5). FIGURE 7. Low-Side Shunt Measurement of Current Load. VREF VREF R0 R1 RO INA326 5 VREF = 10V to 5V 2kΩ C0 5 R´2 R2 and R´2 are chosen to create a small pedestal voltage (e.g., 100mV). Gain is determined by the parallel combination of R2 and R´2. A/D Converter INA326 CO 200kΩ R2 C2 200kΩ G = 2(200kΩ || 200kΩ)/2kΩ = 100 C2 G = 2 (R2 || R´2)/R1 FIGURE 8. Output Referenced to VREF/2. FIGURE 5. Output Range Pedestal. +5V +5V RS must be chosen so that the input voltage does not exceed 20mV beyond the rail. RS +15V VD R1 NC(1) INA326 5 OPA277 IL RO R1 5 (2) VCM INA326 CO –15V R2 NOTE: Connection point of V+ will include ( ) or exclude ( ) quiescent current in the measurement as desired. Output pedestal required for measurements near zero (see Figure 5). R2 C2 NOTE: (1) NC denotes No Connection. (2) Typical swing capability –20mV to +5V + 20mV. FIGURE 6. High-Side Shunt Measurement of Current Load. FIGURE 9. Output from Pin 5 to Allow Swing Beyond the Rail. INA326, INA327 SBOS222 C2 www.ti.com 11 FIGURE 4. Single-Supply PID Temperature Control Loop. 12 www.ti.com INA326, INA327 SBOS222 R6 9.53kΩ R7 1kΩ POT R11 14.3kΩ IN– R9 2kΩ IN+ C6 10µF 2 1 8 3 VS 4 8 VBIAS R8 100kΩ 5 C2 470nF INA326 7 4 V+ V– 0.1µF REF1004-2.5 D1 R10 1kΩ Bias Generator Gain = 100V/V Set Temp RTHERM 10kΩ R12 15kΩ + R13 20Ω Error Amplifier VO R4 20kΩ R5 20kΩ C5 1nF 6 VS VS C1 1nF V– V+ 1/2 OPA2340 R14 10kΩ R15 200Ω VBIAS C7 22nF R16 Loop Gain 2kΩ Adjust POT Common +5V Input 1/4 OPA4340 R18 10kΩ + R20 5kΩ POT C4 10µF VS VBIAS RINT 10MΩ VBIAS R2 100kΩ R19 100kΩ CDIFF 1µF VBIAS R17 5kΩ POT 1/4 OPA4340 RDIFF 1MΩ Differentiator TC: 100ms to 1s 1/4 OPA4340 Proportional R1 100kΩ V– V+ 1/4 OPA4340 VS C3 1nF CINT 1µF Integrator TC: 1s to 10s R22 10kΩ R21 10kΩ R23 10kΩ VBIAS 1/2 OPA2340 R25 10kΩ C8 0.1µF Summing Amplifier Common Output to TEC Driver PACKAGE DRAWINGS MPDS028B – JUNE 1997 – REVISED SEPTEMBER 2001 DGK (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE 0,38 0,25 0,65 8 0,08 M 5 0,15 NOM 3,05 2,95 4,98 4,78 Gage Plane 0,25 1 0°– 6° 4 3,05 2,95 0,69 0,41 Seating Plane 1,07 MAX 0,15 0,05 0,10 4073329/C 08/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. Falls within JEDEC MO-187 INA326, INA327 SBOS222 www.ti.com 13 PACKAGE DRAWINGS (Cont.) MPDS035A – JANUARY 1998 – REVISED SEPTEMBER 2001 DGS (S-PDSO-G10) PLASTIC SMALL-OUTLINE PACKAGE 0,27 0,17 0,50 10 0,08 M 6 0,15 NOM 3,05 2,95 4,98 4,78 Gage Plane 0,25 1 0°– 6° 5 3,05 2,95 0,69 0,41 Seating Plane 1,07 MAX 0,15 0,05 0,10 4073272/B 08/01 NOTES: A. B. C. A. 14 All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. 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