INA ® INA114 114 INA 114 Precision INSTRUMENTATION AMPLIFIER FEATURES DESCRIPTION ● LOW OFFSET VOLTAGE: 50µV max The INA114 is a low cost, general purpose instrumentation amplifier offering excellent accuracy. Its versatile 3-op amp design and small size make it ideal for a wide range of applications. ● LOW DRIFT: 0.25µV/°C max ● LOW INPUT BIAS CURRENT: 2nA max ● HIGH COMMON-MODE REJECTION: 115dB min ● INPUT OVER-VOLTAGE PROTECTION: ±40V ● WIDE SUPPLY RANGE: ±2.25 to ±18V A single external resistor sets any gain from 1 to 10,000. Internal input protection can withstand up to ±40V without damage. The INA114 is laser trimmed for very low offset voltage (50µV), drift (0.25µV/°C) and high common-mode rejection (115dB at G = 1000). It operates with power supplies as low as ±2.25V, allowing use in battery operated and single 5V supply systems. Quiescent current is 3mA maximum. ● LOW QUIESCENT CURRENT: 3mA max ● 8-PIN PLASTIC AND SOL-16 APPLICATIONS The INA114 is available in 8-pin plastic and SOL-16 surface-mount packages. Both are specified for the –40°C to +85°C temperature range. ● BRIDGE AMPLIFIER ● THERMOCOUPLE AMPLIFIER ● RTD SENSOR AMPLIFIER ● MEDICAL INSTRUMENTATION ● DATA ACQUISITION V+ 7 (13) – VIN 2 (4) Over-Voltage Protection INA114 Feedback A1 25kΩ 1 A3 RG 8 VIN (5) DIP Connected Internally 6 (11) VO G=1+ 25kΩ (15) 3 (12) 25kΩ (2) + 25kΩ Over-Voltage Protection 5 A2 25kΩ 25kΩ (10) 50kΩ RG Ref 4 (7) DIP (SOIC) V– International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® ©1992 Burr-Brown Corporation SBOS014 PDS-1142D 1 INA114 Printed in U.S.A. March, 1998 SPECIFICATIONS ELECTRICAL At TA = +25°C, VS = ±15V, RL = 2kΩ, unless otherwise noted. INA114BP, BU PARAMETER CONDITIONS INPUT Offset Voltage, RTI Initial vs Temperature vs Power Supply Long-Term Stability Impedance, Differential Common-Mode Input Common-Mode Range Safe Input Voltage Common-Mode Rejection TYP MAX ±50 + 100/G ±0.25 + 5/G 3 + 10/G ±11 ±10 + 20/G ±0.1 + 0.5/G 0.5 + 2/G ±0.2 + 0.5/G 1010 || 6 1010 || 6 ±13.5 TA = +25°C TA = TMIN to TMAX VS = ±2.25V to ±18V VCM = ±10V, ∆RS = 1kΩ G=1 G = 10 G = 100 G = 1000 BIAS CURRENT vs Temperature 96 115 120 120 ±0.5 ±8 OFFSET CURRENT vs Temperature ±0.5 ±8 NOISE VOLTAGE, RTI f = 10Hz f = 100Hz f = 1kHz fB = 0.1Hz to 10Hz Noise Current f=10Hz f=1kHz fB = 0.1Hz to 10Hz 80 96 110 115 ±40 G=1 G = 10 G = 100 G = 1000 G=1 Gain vs Temperature 50kΩ Resistance(1) Nonlinearity G=1 G = 10 G = 100 G = 1000 IO = 5mA, TMIN to TMAX VS = ±11.4V, RL = 2kΩ VS = ±2.25V, RL = 2kΩ ±13.5 ±10 ±1 Load Capacitance Stability Short Circuit Current FREQUENCY RESPONSE Bandwidth, –3dB Overload Recovery G=1 G = 10 G = 100 G = 1000 VO = ±10V, G = 10 G=1 G = 10 G = 100 G = 1000 50% Overdrive POWER SUPPLY Voltage Range Current VIN = 0V 0.01% ✻ 75 90 106 106 ±2 ±2 0.3 ±2.25 TEMPERATURE RANGE Specification Operating θJA TYP MAX ±25 + 30/G ±125 + 500/G ±0.25 + 5/G ±1 + 10/G ✻ ✻ ✻ ✻ ✻ ✻ ✻ 90 106 110 110 ✻ ✻ ✻ ✻ ±5 ±5 UNITS µV µV/°C µV/V µV/mo Ω || pF Ω || pF V V dB dB dB dB nA pA/°C nA pA/°C 15 11 11 0.4 ✻ ✻ ✻ ✻ nV/√Hz nV/√Hz nV/√Hz µVp-p 0.4 0.2 18 ✻ ✻ ✻ pA/√Hz pA/√Hz pAp-p ✻ 1 + (50kΩ/RG) 1 OUTPUT Voltage MIN G = 1000, RS = 0Ω GAIN Gain Equation Range of Gain Gain Error Slew Rate Settling Time, INA114AP, AU MIN ±0.01 ±0.02 ±0.05 ±0.5 ±2 ±25 ±0.0001 ±0.0005 ±0.0005 ±0.002 10000 ±0.05 ±0.4 ±0.5 ±1 ±10 ±100 ±0.001 ±0.002 ±0.002 ±0.01 ±13.7 ±10.5 ±1.5 1000 +20/–15 –40 –40 80 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ 1 100 10 1 0.6 18 20 120 1100 20 ±15 ±2.2 ✻ ✻ ±18 ±3 ✻ 85 125 ✻ ✻ ✻ ✻ ±0.5 ±0.7 ±2 ±10 ✻ ±0.002 ±0.004 ±0.004 ±0.02 V/V V/V % % % % ppm/°C ppm/°C % of FSR % of FSR % of FSR % of FSR ✻ ✻ ✻ ✻ ✻ V V V pF mA ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ MHz kHz kHz kHz V/µs µs µs µs µs µs ✻ ✻ ✻ ✻ ✻ V mA ✻ ✻ °C °C °C/W ✻ Specification same as INA114BP/BU. NOTE: (1) Temperature coefficient of the “50kΩ” term in the gain equation. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® INA114 2 ELECTROSTATIC DISCHARGE SENSITIVITY PIN CONFIGURATIONS P Package 8-Pin DIP Top View RG 1 8 RG V–IN 2 7 V+ + IN 3 6 VO V– 4 5 Ref V U Package This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. SOL-16 Surface-Mount Top View NC 1 16 NC RG 2 15 RG NC 3 14 NC V–IN 4 13 V+ V+IN 5 12 Feedback NC 6 11 VO V– 7 10 Ref NC 8 9 PACKAGE/ORDERING INFORMATION PRODUCT PACKAGE PACKAGE DRAWING NUMBER(1) INA114AP INA114BP INA114AU INA114BU 8-Pin Plastic DIP 8-Pin Plastic DIP SOL-16 Surface-Mount SOL-16 Surface-Mount 006 006 211 211 TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. NC ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage .................................................................................. ±18V Input Voltage Range .......................................................................... ±40V Output Short-Circuit (to ground) .............................................. Continuous Operating Temperature ................................................. –40°C to +125°C Storage Temperature ..................................................... –40°C to +125°C Junction Temperature .................................................................... +150°C Lead Temperature (soldering, 10s) ............................................... +300°C NOTE: (1) Stresses above these ratings may cause permanent damage. ® 3 INA114 TYPICAL PERFORMANCE CURVES At TA = +25°C, VS = ±15V, unless otherwise noted. COMMON-MODE REJECTION vs FREQUENCY GAIN vs FREQUENCY 140 Common-Mode Rejection (dB) G = 100, 1k Gain (V/V) 1k 100 10 1 120 G = 10 100 G = 1k 80 G = 100 60 G = 10 40 G=1 20 0 10 100 10k 100k 0 – VO + – + VCM (Any Gain) A3 – Output Swing Limit Lim it – O ed by utpu A t Sw 2 ing –10 A3 + Output Swing Limit by A 1 g in ited Lim put Sw t u O – –5 0 5 10 120 100 G = 1000 80 G = 100 G = 10 60 G=1 40 20 0 15 10 100 1k 100k 10k Output Voltage (V) Frequency (Hz) NEGATIVE POWER SUPPLY REJECTION vs FREQUENCY INPUT-REFERRED NOISE VOLTAGE vs FREQUENCY G = 100 Input-Referred Noise Voltage (nV/√ Hz) 120 G = 1000 100 G = 10 G=1 80 1M 140 Limit + Ou ed by A tput Swin2 g 140 Power Supply Rejection (dB) 100k POSITIVE POWER SUPPLY REJECTION vs FREQUENCY VD/2 –15 –15 10k INPUT COMMON-MODE VOLTAGE RANGE vs OUTPUT VOLTAGE VD/2 –10 1k Frequency (Hz) 5 –5 100 Frequency (Hz) y A1 ed b Limit ut Swing p t u +O 10 10 1M Power Supply Rejection (dB) Common-Mode Voltage (V) 15 1k 60 40 20 0 1M 1k 100 G=1 G = 10 10 G = 100, 1000 G = 1000 BW Limit 1 10 100 1k 10k 100k 1M 1 Frequency (Hz) 100 Frequency (Hz) ® INA114 10 4 1k 10k TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, unless otherwise noted. SETTLING TIME vs GAIN OFFSET VOLTAGE WARM-UP vs TIME 1000 4 Offset Voltage Change (µV) 6 Settling Time (µs) 1200 800 600 0.01% 400 0.1% 200 0 0 –2 –4 –6 1 10 100 1000 0 30 45 60 75 90 Time from Power Supply Turn-on (s) INPUT BIAS AND INPUT OFFSET CURRENT vs TEMPERATURE INPUT BIAS CURRENT vs DIFFERENTIAL INPUT VOLTAGE 2 105 120 3 2 1 ±IB 0 IOS –1 1 0 –1 G=1 G = 10 –2 G = 100 –2 –40 –15 10 35 60 –3 –45 85 Temperature (°C) 0 15 30 45 MAXIMUM OUTPUT SWING vs FREQUENCY Both Inputs 2 Peak-to-Peak Amplitude (V) |Ib1| + |Ib2| One Input 1 Over-Voltage Protection Over-Voltage Protection Normal Operation –1 –2 –15 32 3 0 –30 G = 1000 Differential Overload Voltage (V) INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE Input Bias Current (mA) 15 Gain (V/V) Input Bias Current (mA) Input Bias and Input Offset Current (nA) G ≥ 100 2 One Input –3 –45 28 G = 1, 10 24 G = 100 20 16 G = 1000 12 8 4 Both Inputs –30 –15 0 0 15 30 10 45 100 1k 10k 100k 1M Frequency (Hz) Common-Mode Voltage (V) ® 5 INA114 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, unless otherwise noted. SLEW RATE vs TEMPERATURE OUTPUT CURRENT LIMIT vs TEMPERATURE 30 Slew Rate (V/µs) 0.8 0.6 0.4 0.2 0 –75 –50 –25 0 25 50 75 100 15 –|ICL| –15 60 85 QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT AND POWER DISSIPATION vs POWER SUPPLY VOLTAGE 2.4 2.2 2.0 2.6 120 2.5 100 80 2.4 Power Dissipation 60 2.3 Quiescent Current 2.2 40 2.1 20 2.0 –50 –25 0 25 50 75 100 0 125 ±3 ±6 ±9 ±12 ±15 0 ±18 Power Supply Voltage (V) Temperature (°C) POSITIVE SIGNAL SWING vs TEMPERATUE (RL = 2kΩ) NEGATIVE SIGNAL SWING vs TEMPERATUE (RL = 2kΩ) 16 –16 VS = ±15V 12 VS = ±15V –14 Output Voltage (V) 14 Output Voltage (V) 35 Temperature (°C) 2.6 VS = ±11.4V 10 8 6 4 –12 VS = ±11.4V –10 –8 –6 –4 VS = ±2.25V 2 0 –75 10 Temperature (°C) Quiescent Current (mA) Quiescent Current (mA) +|ICL| 20 10 –40 125 2.8 1.8 –75 25 –50 –25 0 25 50 75 100 0 –75 125 Temperature (°C) –50 –25 0 25 50 Temperature (°C) ® INA114 VS = ±2.25V –2 6 75 100 125 Power Dissipation (mW) Short Circuit Current (mA) 1.0 TYPICAL PERFORMANCE CURVES (CONT) At TA = +25°C, VS = ±15V, unless otherwise noted. LARGE SIGNAL RESPONSE, G = 1 SMALL SIGNAL RESPONSE, G = 1 +10V +100mV 0 0 –10V –200mV LARGE SIGNAL RESPONSE, G = 1000 SMALL SIGNAL RESPONSE, G = 1000 +10V +200mV 0 0 –10V –200mV INPUT-REFERRED NOISE, 0.1 to 10Hz 0.1µV/div 1 s/div ® 7 INA114 APPLICATION INFORMATION Figure 1 shows the basic connections required for operation of the INA114. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins as shown. ues. The accuracy and temperature coefficient of these resistors are included in the gain accuracy and drift specifications of the INA114. The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RG’s contribution to gain accuracy and drift can be directly inferred from the gain equation (1). Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance which will contribute additional gain error (possibly an unstable gain error) in gains of approximately 100 or greater. The output is referred to the output reference (Ref) terminal which is normally grounded. This must be a low-impedance connection to assure good common-mode rejection. A resistance of 5Ω in series with the Ref pin will cause a typical device to degrade to approximately 80dB CMR (G = 1). SETTING THE GAIN Gain of the INA114 is set by connecting a single external resistor, RG: G = 1 + 50 kΩ RG NOISE PERFORMANCE The INA114 provides very low noise in most applications. For differential source impedances less than 1kΩ, the INA103 may provide lower noise. For source impedances greater than 50kΩ, the INA111 FET-input instrumentation amplifier may provide lower noise. (1) Commonly used gains and resistor values are shown in Figure 1. Low frequency noise of the INA114 is approximately 0.4µVp-p measured from 0.1 to 10Hz. This is approximately one-tenth the noise of “low noise” chopper-stabilized amplifiers. The 50kΩ term in equation (1) comes from the sum of the two internal feedback resistors. These are on-chip metal film resistors which are laser trimmed to accurate absolute val- V+ 0.1µF Pin numbers are for DIP packages. – VIN 2 Over-Voltage Protection 7 INA114 A1 25kΩ 1 + – ) VO = G • (VIN – VIN 25kΩ 25kΩ G=1+ 6 A3 RG 50kΩ RG + 8 25kΩ Load VO – + VIN 3 Over-Voltage Protection 5 A2 25kΩ 4 DESIRED GAIN 1 2 5 10 20 50 100 200 500 1000 2000 5000 10000 RG (Ω) NEAREST 1% RG (Ω) No Connection 50.00k 12.50k 5.556k 2.632k 1.02k 505.1 251.3 100.2 50.05 25.01 10.00 5.001 No Connection 49.9k 12.4k 5.62k 2.61k 1.02k 511 249 100 49.9 24.9 10 4.99 0.1µF Also drawn in simplified form: V– V– IN RG V+ IN FIGURE 1. Basic Connections. ® INA114 25kΩ 8 INA114 Ref VO OFFSET TRIMMING The INA114 is laser trimmed for very low offset voltage and drift. Most applications require no external offset adjustment. Figure 2 shows an optional circuit for trimming the output offset voltage. The voltage applied to Ref terminal is summed at the output. Low impedance must be maintained at this node to assure good common-mode rejection. This is achieved by buffering trim voltage with an op amp as shown. VO RG VIN INA114 47kΩ 47kΩ Thermocouple – VIN + Microphone, Hydrophone etc. INA114 100µA 1/2 REF200 Ref OPA177 ±10mV Adjustment Range INA114 V+ 10kΩ 100Ω 10kΩ INA114 100Ω Center-tap provides bias current return. 100µA 1/2 REF200 FIGURE 3. Providing an Input Common-Mode Current Path. V– FIGURE 2. Optional Trimming of Output Offset Voltage. A combination of common-mode and differential input signals can cause the output of A1 or A2 to saturate. Figure 4 shows the output voltage swing of A1 and A2 expressed in terms of a common-mode and differential input voltages. Output swing capability of these internal amplifiers is the same as the output amplifier, A3. For applications where input common-mode range must be maximized, limit the output voltage swing by connecting the INA114 in a lower gain (see performance curve “Input Common-Mode Voltage Range vs Output Voltage”). If necessary, add gain after the INA114 to increase the voltage swing. INPUT BIAS CURRENT RETURN PATH The input impedance of the INA114 is extremely high— approximately 1010Ω. However, a path must be provided for the input bias current of both inputs. This input bias current is typically less than ±1nA (it can be either polarity due to cancellation circuitry). High input impedance means that this input bias current changes very little with varying input voltage. Input circuitry must provide a path for this input bias current if the INA114 is to operate properly. Figure 3 shows various provisions for an input bias current path. Without a bias current return path, the inputs will float to a potential which exceeds the common-mode range of the INA114 and the input amplifiers will saturate. If the differential source resistance is low, bias current return path can be connected to one input (see thermocouple example in Figure 3). With higher source impedance, using two resistors provides a balanced input with possible advantages of lower input offset voltage due to bias current and better common-mode rejection. Input-overload often produces an output voltage that appears normal. For example, an input voltage of +20V on one input and +40V on the other input will obviously exceed the linear common-mode range of both input amplifiers. Since both input amplifiers are saturated to nearly the same output voltage limit, the difference voltage measured by the output amplifier will be near zero. The output of the INA114 will be near 0V even though both inputs are overloaded. INPUT PROTECTION The inputs of the INA114 are individually protected for voltages up to ±40V. For example, a condition of –40V on one input and +40V on the other input will not cause damage. Internal circuitry on each input provides low series impedance under normal signal conditions. To provide equivalent protection, series input resistors would contribute excessive noise. If the input is overloaded, the protection circuitry limits the input current to a safe value (approximately 1.5mA). The typical performance curve “Input Bias Current vs Common-Mode Input Voltage” shows this input INPUT COMMON-MODE RANGE The linear common-mode range of the input op amps of the INA114 is approximately ±13.75V (or 1.25V from the power supplies). As the output voltage increases, however, the linear input range will be limited by the output voltage swing of the input amplifiers, A1 and A2. The commonmode range is related to the output voltage of the complete amplifier—see performance curve “Input Common-Mode Range vs Output Voltage.” ® 9 INA114 current limit behavior. The inputs are protected even if no power supply voltage is present. The output sense connection can be used to sense the output voltage directly at the load for best accuracy. Figure 5 shows how to drive a load through series interconnection resistance. Remotely located feedback paths may cause instability. This can be generally be eliminated with a high frequency feedback path through C1. Heavy loads or long lines can be driven by connecting a buffer inside the feedback path (Figure 6). OUTPUT VOLTAGE SENSE (SOL-16 package only) The surface-mount version of the INA114 has a separate output sense feedback connection (pin 12). Pin 12 must be connected to the output terminal (pin 11) for proper operation. (This connection is made internally on the DIP version of the INA114.) VCM – V+ G • VD 2 INA114 Over-Voltage Protection A1 25kΩ VD 2 25kΩ G=1+ 25kΩ A3 RG 50kΩ RG VO = G • VD 25kΩ VD 2 A2 Over-Voltage Protection VCM 25kΩ VCM + 25kΩ G • VD 2 V– FIGURE 4. Voltage Swing of A1 and A2. Surface-mount package version only. Output Sense – VIN RG Surface-mount package version only. – VIN C1 1000pF INA114 RG Ref + VIN Output Sense Load OPA633 IL: ±100mA INA114 180Ω Ref + VIN RL Equal resistance here preserves good common-mode rejection. FIGURE 5. Remote Load and Ground Sensing. FIGURE 6. Buffered Output for Heavy Loads. – VIN 22.1kΩ 22.1kΩ + VIN 511Ω INA114 Ref Shield is driven at the common-mode potential. 100Ω OPA602 FIGURE 7. Shield Driver Circuit. ® INA114 10 For G = 100 RG = 511Ω // 2(22.1kΩ) effective RG = 505Ω VO V+ Equal line resistance here creates a small common-mode voltage which is rejected by INA114. 1 V+ REF200 100µA RTD RG VO INA114 2 Ref RZ 3 VO = 0V at RRTD = RZ Resistance in this line causes a small common-mode voltage which is rejected by INA114. FIGURE 8. RTD Temperature Measurement Circuit. V+ 2 10.0V 6 REF102 R1 27k Ω 1N4148 (1) Cu R2 5.23k Ω R4 80.6k Ω 4 (2) R7 1MΩ INA114 K Cu VO Ref R5 50Ω R3 100Ω R6 100Ω Zero Adj ISA TYPE MATERIAL SEEBECK COEFFICIENT (µV/°C) R2 (R3 = 100Ω) R4 (R5 + R6 = 100Ω) E Chromel Constantan 58.5 3.48kΩ 56.2kΩ J Iron Constantan 50.2 4.12kΩ 64.9kΩ K Chromel Alumel 39.4 5.23kΩ 80.6kΩ T Copper Constantan 38.0 5.49kΩ 84.5kΩ NOTES: (1) –2.1mV/°C at 200µA. (2) R7 provides down-scale burn-out indication. FIGURE 9. Thermocouple Amplifier With Cold Junction Compensation. ® 11 INA114 2.8kΩ LA RA RG/2 INA114 VO Ref 2.8kΩ G = 10 390kΩ 1/2 OPA2604 1/2 OPA2604 RL 10kΩ 390kΩ FIGURE 10. ECG Amplifier With Right-Leg Drive. – +10V VIN + RG Ref G = 500 Bridge RG 100Ω VO INA114 C1 0.1µF R1 1MΩ VO INA114 Ref OPA602 f–3dB = 1 2πR1C1 = 1.59Hz FIGURE 11. Bridge Transducer Amplifier. – VIN R1 RG FIGURE 12. AC-Coupled Instrumentation Amplifier. IO = VIN •G R INA114 + Ref IB A1 IO Load A1 IB Error OPA177 OPA602 OPA128 ±1.5nA 1pA 75fA FIGURE 13. Differential Voltage-to-Current Converter. ® INA114 12 PACKAGE OPTION ADDENDUM www.ti.com 8-Nov-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) INA114AP ACTIVE PDIP P 8 50 TBD Call TI INA114AU ACTIVE SOIC DW 16 48 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA Level-3-260C-168 HR INA114AU/1K ACTIVE SOIC DW 16 1000 Pb-Free (RoHS) CU NIPDAU Level-3-260C-168 HR INA114AU/1KE4 ACTIVE SOIC DW 16 1000 Pb-Free (RoHS) CU NIPDAU Level-3-260C-168 HR INA114AUE4 ACTIVE SOIC DW 16 48 Pb-Free (RoHS) CU NIPDAU Level-3-260C-168 HR INA114BP ACTIVE PDIP P 8 50 TBD Call TI INA114BU ACTIVE SOIC DW 16 48 Pb-Free (RoHS) CU NIPDAU Level-NA-NA-NA Level-3-260C-168 HR INA114BU/1K ACTIVE SOIC DW 16 1000 Pb-Free (RoHS) CU NIPDAU Level-3-260C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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