ETC PI74ALVCH16646V

PI74ALVCH16646
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16-Bit Bus Transceiver and Register
with 3-State Outputs
Product Features
Product Description
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Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced using the Company’s advanced 0.5 micron CMOS
technology, achieving industry leading speed.
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PI74ALVCH16646 is designed for low voltage operation
VCC = 2.3V to 3.6V
Hysteresis on all inputs
Typical VOLP (Output Ground Bounce)
< 0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
< 2.0V at VCC = 3.3V, TA = 25°C
Bus Hold retains last active bus state during 3-State,
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
The PI74ALVCH16646 is a 16-bit bus transceiver and register
designed for 2.3V to 3.6V VCC operation. It can be used as two
8-bit transceivers or one 16-bit transceiver. Data on the A or B bus
is clocked into the registers on the low-to-high transition of the
appropriate Clock (CLKAB or CLKBA) input. Four fundamental
bus-management functions can be performed.
Output Enable (OE) and Direction Control (DIR) inputs are provided
to control the transceiver functions. In the transceiver mode, data
present at the high-impedance port may be stored in either register
or in both. The Select Control (SAB and SBA) inputs can multiplex
stored and real-time (transparent mode) data. Circuitry used for
Select Control eliminates the typical decoding glitch that occurs in
a multiplexer during the transition between stored and real-time
data. DIR determines which bus receives data when OE is LOW.
In the isolation mode (OE HIGH), A data may be stored in one
register and/or B data may be stored in the other register.
When an output function is disabled, the input function is still
enabled and may be used to store and transmit data. Only one of the
two buses, A or B, can be driven at a time.
To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
Logic Block Diagram
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PS8102A 10/07/98
PI74ALVCH16646
16-Bit Bus Transceiver and Register
with 3-State Outputs
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Product Pin Configuration
Product Pin Description
Pin Name
1DIR
1
56
1OE
1CLKAB
2
3
55
54
1CLKBA
4
5
6
7
8
9
53
52
51
56-PIN
V56 50
A56 49
48
1SAB
GND
1A1
1A2
VCC
1A3
1A4
1A5
10
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCC
2A7
2A8
GND
2SAB
2CLKAB
2DIR
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1SBA
GND
1B1
1B2
D e s cription
xO E
O utput Enable Inputs (Active LO W)
xDIR
Direction Control
xCLK AB, xCLK BA Clock Pulse Inputs
VCC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
VCC
2B7
2B8
GND
xSAB, xSBA
Select Control Inputs
xAx
Data Register A Inputs
Data Register B O utputs
xBx
Data Register B Inputs
Data Register A O utputs
GND
Ground
VCC
Power
2SBA
2CLKBA
2OE
Truth Table(2)
Inputs
Function
Store A, B Unspecified (1)
Store B, A Unspecified (1)
Isolation
Store A and B Data
Real Time A Data to B Bus
Stored A Data to B Bus
Real Time B Data to A Bus
Stored B Data to A Bus
xOE
X
X
H
H
L
L
L
L
xDIR
X
X
X
X
H
H
L
L
xCLKAB
↑
X
H or L
↑
X
H or L
X
X
xCLKBA
X
↑
H or L
↑
X
X
X
H or L
Data I/O
xSAB
X
X
X
X
L
H
X
X
xSBA
X
X
X
X
X
X
L
H
xAx
Input
Unspecified (1)
Input Disable
Input
Input
Input
Output
Output
xBx
Unspecified (1)
Input
Input Disable
Input
Output
Output
Input
Input
Note:
1. The data output functions may be enabled or disabled by various signals at the xOE or xDIR inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.
2. H = High Voltage Level
X = Don't Care
L = Low Voltage Level
↑ = LOW-to-HIGH Transition
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PS8102A 10/07/98
PI74ALVCH16646
16-Bit Bus Transceiver and Register
with 3-State Outputs
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REAL-TIME TRANSFER
BUS B TO A
xDIR
L
REAL-TIME TRANSFER
BUS A TO B
BUS
BUS
BUS
BUS
A
B
A
B
xOE xCLKAB xCLKBA
L
X
X
xSAB
X
xSBA
L
xDIR
H
STORAGE FROM
A AND/OR B
xDIR
X
X
X
xOE xCLKAB xCLKBA
L
X
X
xSAB
L
TRANSFER STORES
DATA TO A AND/OR B
BUS
BUS
BUS
BUS
A
B
A
B
xOE xCLKAB xCLKBA
X
↑
X
X
X
↑
H
↑
↑
xSBA
X
xSAB
X
X
X
xSBA
X
X
X
xDIR(1) xOE xCLKAB xCLKBA
L
L
X
H or L
H
L
H or L
X
xSAB
X
H
xSBA
H
X
Note:
1. Cannot transfer data to A bus and B bus simultaneously.
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PS8102A 10/07/98
PI74ALVCH16646
16-Bit Bus Transceiver and Register
with 3-State Outputs
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Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ............................................................ –65°C to +150°C
Ambient Temperature with Power Applied .......................... –40°C to +85°C
Input Voltage Range, VIN .................................................... –0.5V to VCC +4.6V
Output Voltage Range, VOUT ............................................. –0.5V to VCC +0.5V
DC Input Voltage ................................................................... –0.5V to +5.0V
DC Output Current ................................................................................ 50 mA
Power Dissipation ................................................................................... 1.0W
Note:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.3V ±10%)
Te s t Conditions (1)
D e s cription
VCC
Supply Voltage
VIH(3)
Input HIGH Voltage
VIL(3)
Input LO W Voltage
VIN(3)
Input Voltage
0
VCC
VOUT(3)
O utput Voltage
0
VCC
VOH
VOL
IOH(3)
IOL(3)
O utput
HIGH
Voltage
O utput
LO W
Voltage
O utput
HIGH
Current
O utput
LO W
Current
M in.
Typ.(2)
Parame te rs
2.3
VCC = 2.3V to 2.7V
1.7
VCC = 2.7V to 3.6V
2.0
M ax.
3.6
VCC = 2.3V to 2.7V
0.7
VCC = 2.7V to 3.6V
0.8
IOH = - 100mA, VCC = Min. to Max.
VCC - 0.2
VIH = 1.7V, IOH = - 6mA, VCC = 2.3V
2.0
VIH = 1.7V, IOH = - 12mA, VCC = 2.3V
1.7
VIH = 2.0V, IOH = - 12mA, VCC = 2.7V
2.2
VIH = 2.0V, IOH = - 12mA, VCC = 3.0V
2.4
VIH = 2.0V, IOH = - 24mA, VCC = 3.0V
2.0
V
IOL = 100mA, VIL = Min. to Max.
0.2
VIL = 0.7V, IOL = 6mA, VCC = 2.3V
0.4
VIL = 0.7V, IOL = 12mA, VCC = 2.3V
0.7
VIL = 0.8V, IOL = 12mA, VCC = 2.7V
0.4
VIL = 0.8V, IOL = 24mA, VCC = 3.0V
0.55
VCC = 2.3V
- 12
VCC = 2.7V
- 12
VCC = 3.0V
- 24
VCC = 2.3V
12
VCC = 2.7V
12
VCC = 3.0V
24
4
Units
mA
PS8102A 10/07/98
PI74ALVCH16646
16-Bit Bus Transceiver and Register
with 3-State Outputs
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DC Electrical Characteristics-Continued (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.3V ±10%)
Te s t Conditions (1)
Parame te rs De s cription
IIN
Input Current
Input
Hold
Current
IIN (HOLD)
Typ.(2)
M in.
M ax.
VIN = VCC or GND, VCC = 3.6V
±5
VIN = 0.7V, VCC = 2.3V
45
VIN = 1.7V, VCC = 2.3V
- 45
VIN = 0.8V, VCC = 3.0V
75
VIN = 2.0V, VCC = 3.0V
- 75
VIN = 0 to 3.6V, VCC = 3.6V
±500
IOZ
Output Current (3- STATE Outputs)
VOUT = VCC or GND, VCC = 3.6V
±10
ICC
Supply Current
VCC = 3.6V, IOUT = 0mA,
VIN = GND or VCC
40
DICC
Supply Current per Input
@ TTL HIGH
VCC = 3.0V to 3.6V
One Input at VCC - 0.6V
Other Inputs at VCC or GND
750
CI
Control Inputs
Data Inputs
Outputs
CO
Units
mA
3
VIN = VCC or GND, VCC = 3.3V
6
VO = VCC or GND, VCC = 3.3V
pF
7
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading.
3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
Timing Requirements
Parame te rs
De s cription
FCLOCK
Clock Frequency
CLKAB or CLKBA
HIGH or LOW
tW
Pulse Duration
tSU
Setup Time
A Before CLKAB↑ or
B Before CLKBA↑
tH
Hold Time
A After CLKAB↑ or
B After CLKBA↑
Conditions (1)
CL = 50pF
RL = 500Ω
5
VCC = 2.5V ±0.2V
M in.(2)
0
VCC = 2.7V
VCC = 3.3V ±0.3V
M ax.
M in.(2)
M ax.
M in.(2)
M ax.
150
0
150
0
150
3.3
3.3
3.3
1.6
1.7
1.4
0.6
0.4
0.7
Units
MHz
ns
PS8102A 10/07/98
PI74ALVCH16646
16-Bit Bus Transceiver and Register
with 3-State Outputs
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Switching Characteristics over Operating Range(1)
Parame te rs
From
(INPUT)
To
Conditions (1)
(OUTPUT)
VCC = 2.5V ±0.2V
M in.(2)
fMAX
M ax.
150
tPD
A or B
B or A
tPD
CLK AB or CLK BA
tPD
SAB or SBA
tEN
OE
tDIS
OE
tEN
tDIS
VCC = 2.7V
M in.(2)
VCC = 3.3V ±0.3V
M ax.
150
M in.(2)
M ax.
150
MHz
4.8
4.5
5.6
5.2
6.8
6.4
6.5
6.2
1.8
5.7
5.0
1.4
4.7
DIR
1.0
7.8
6.2
1.0
5.1
DIR
1.7
6.5
6.0
1.1
5.3
0
10
10
0
10
1.0
A or B
CL = 50pF
RL = 500W
Units
3.9
1.0
4.5
5.3
ns
5.1
D e s cription
Dt/Dv(3)
Input Transition Rise or Fall
0
ns/V
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Recommended operating condition.
Operating Characteristics, TA = 25ºC
Parame te r
CPD Power Dissipation
Capacitance
Te s t Conditions
Outputs Enabled
Outputs Disabled
CL = 50pF, f = 10 MHz
VCC = 2.5V ±0.2V
VCC = 3.3V ±0.3V
Typ.
39
43
10
12
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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PS8102A 10/07/98