PI74LCX646 PI74LCX652 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Fast CMOS 3.3V 8-Bit Registered Transceiver Product Features Product Description • Functionally compatible with FCT3, LVT, and 74 series 646 and 652 families of products • Tri-State outputs • 5V Tolerant inputs and outputs • 2.0V-3.6V VCC supply operation • Balanced sink and source output drives (24 mA) • Low ground bounce outputs • Supports live insertion • ESD Protection exceeds 2000V, Human Body Model 200V, Machine Model • Packages available: – 24-pin 209-mil wide plastic SSOP (H) – 24-pin 173-mil wide plastic TSSOP (L) – 24-pin 150-mil wide plastic QSOP (Q) – 24-pin 300-mil wide plastic SOIC (S) Pericom Semiconductor’s PI74LCX series of logic circuits are produced in the Company’s advanced 0.6 micron CMOS technology, achieving industry leading speed grades. The PI74LCX646 and PI74LCX652 are designed with a bus transceiver with 3-state D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. The PI74LCX652 utilizes GAB and GBA signals to control the transceiver functions. The PI74LCX646 uses the enable control (G) and direction pins (DIR) to control the transceiver functions. SAB and SBA control pins are used to select either real-time or stored data transfer. The circuitry used for select control will eliminate the typical decoding glitch that occurs in a multiplexer during the transition between real-time and stored data. A low input level selects real-time data and a high selects stored data. The PI74LCX646 and PI74LCX652 can be driven from either 3.3V or 5.0V devices allowing this device to be used as a translator in a mixed 3.3/5.0V system. Logic Block Diagram PI74LPT652 ONLY GBA GAB PI74LPT646 ONLY G DIR CPBA SBA CPAB SAB B REG 1 OR 8 CHANNELS 0D C0 B0 A REG A0 0D C0 TO 7 OTHER CHANNELS 1 PS2104A 02/07/97 PI74LCX646 PI74LCX652 3.3V 8-BIT REGISTERED TRANSCEIVER 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PI74LCX646 Product Pin Configuration CPAB SAB DIR A0 A1 A2 A3 A4 A5 A6 A7 GND 1 24 2 23 3 22 4 24-PIN 21 H24 20 5 L24 6 19 Q24 18 7 S24 8 17 9 16 10 15 11 14 12 13 PI74LCX652 Product Pin Configuration Product Pin Description CPAB VCC CPBA SAB SBA GAB G A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 GND 1 24 2 23 3 22 4 24-PIN 21 H24 20 5 L24 6 19 Q24 18 7 S24 8 17 9 16 10 15 11 14 12 13 Pin Name A0-A7 VCC CPBA SBA B0-B7 GBA B0 CPAB, CPBA SAB, SBA DIR, G GAB, GBA GND VCC B1 B2 B3 B4 B5 B6 B7 Description Data Register A Inputs Data Register B Outputs Data Register B Inputs Data Register A Outputs Clock Pulse Inputs Output Data Source SelectInputs Output Enable Inputs (LCX646) Output Enable Inputs (LCX652) Ground Power PI74LCX646 Truth Table DATA I/O(2) Inputs Function/Operation Isolation Store A and B Data Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus G H H L L L L DIR X X L L H H CPAB H or L ↑ X X X H or L CPBA H or L ↑ X H or L X X SAB X X X X L H SBA X X L H X X A0-A7 Input B0-B7 Input Output Input Input Output PI74LCX652 Truth Table DATA I/O(2) Inputs Function/Operation Isolation Store A and B Data Store A, Hold B Store A in Both Registers Hold A, Store B Store B in Both Registers Real Time B Data to A Bus Stored B Data to A Bus Real Time A Data to B Bus Stored A Data to B Bus Stored A Data to B Bus and Stored B Data to A Bus GAB L L X H L L L L H H H GBA H H H H X L L L H H L CPAB H or L ↑ ↑ ↑ H or L ↑ X X X H or L H or L CPBA H or L ↑ H or L ↑ ↑ ↑ X H or L X X H or L SAB X X X X(2) X X X X L H H SBA X X X X X X(2) L H X X H A0-A7 Input B0-B7 Input Input Input Unspecified(1) Output Output Unspecified(1) Output Input Input Input Input Output Output Output Notes: 1. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs. 2. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers. H = High Voltage Level; L = Low Voltage Level; X = Don't Care; ↑ = LOW-to-HIGH transition 2 PS2104A 02/07/97 PI74LCX646 PI74LCX652 3.3V 8-BIT REGISTERED TRANSCEIVER 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................. –65°C to +150°C Ambient Temperature with Power Applied ............................ –40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) ...... –0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) .. –0.5V to +7.0V DC Input Voltage .................................................................... –0.5V to +7.0V DC Output Current .............................................................................. 120 mA Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Power Dissipation .................................................................................... 1.0W Recommended Operating Conditions Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage IOH/IOL TA ∆t/∆V Output Current Min. Max. Operating 2.0 3.6 Data Retention 1.5 3.6 0 5.5 HIGH or LOW State 0 VCC TRI-State 0 5.5 VCC = 3.0V-3.6V ±24 VCC = 2.7V ±12 −40 +85 °C 0 10 ns/V Free-Air Operating Temperature Input Edge Rate V = 0.8V-2.0V, VCC = 3.0V 3 Units V mA PS2104A 02/07/97 PI74LCX646 PI74LCX652 3.3V 8-BIT REGISTERED TRANSCEIVER 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics (Over the Operating Range, TA = −40°C to +85°C, VCC = 2.7V to 3.6V) Parameters Description Test Conditions(1) Min. Typ(2) Max. VIH Input HIGH Voltage Guaranteed Logic HIGH Level 2.0 — — VIL Input LOW Voltage Guaranteed Logic LOW Level — — 0.8 VOH Output HIGH Voltage VCC = 2.7-3.6 IOH = –0.1mA VCC-0.2 — — VCC = 2.7 IOH = –12mA 2.2 — — VCC = 3.0 IOH = –18mA 2.4 — — IOH = –24mA 2.2 — — VCC = 2.7-3.6 IOL = 0.1mA — — 0.2 VCC = 2.7 IOL = 12mA — — 0.4 VCC = 3.0 IOL = 16mA — — 0.4 IOL = 24mA — — 0.55 — −0.7 −1.2 VOL Output LOW Voltage Units V VIK Clamp Diode Voltage VCC = Min., IIN = –18mA II Input Leakage Current 0 ≤ VI ≤ 5.5V Vcc = 2.7-3.6 — — ±5 IOZ Tri-State Output Leakage 0 ≤ VO ≤ 5.5V VI = VIH or VIL VCC = 2.7-3.6 — — ±5 IOFF Power Down Disable VCC = 0V, VIN or VOUT ≤ 5.5V — — 10 ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC 0.1 10 ∆ICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = VCC – 0.6V(3) 500 µA Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 3.3V, +25°C ambient. 3. Per TTL driven input; all other inputs at VCC or GND. Capacitance Parameters Description CIN Test Conditions Typ. Input Capacitance VCC = Open, VI = 0V or VCC 7 COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8 CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, F = 10 MHz 25 4 Units pF PS2104A 02/07/97 PI74LCX646 PI74LCX652 3.3V 8-BIT REGISTERED TRANSCEIVER 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics over Operating Range VCC = 3.3V ± 0.3V VCC = 2.7V Description Conditions Min. Max. Min. Max. Units fMAX Maximum Clock Frequency CL = 50pF RL = 500Ω 150 MHz tPHL tPLH Propagation Delay Bus to Bus 1.5 7.0 1.5 8.0 tPHL tPLH Propagation Delay Clock to Bus 1.5 8.5 1.5 9.5 tPHL tPLH Propagation Delay Select to Bus 1.5 8.5 1.5 9.5 tPZL tPZH Output Enable Time 1.5 8.5 1.5 9.5 tPLZ tPHZ Output Disable Time 1.5 8.5 1.5 9.5 TS Setup Time 2.5 2.5 TH Hold Time 1.5 1.5 TW Pulse Width 3.3 3.3 Output to Output Skew(1) 1.0 Parameters tSK(0) ns Note: 1. Skew between any two outputs, of the same package, switching in the same direction. Dynamic Switching Characteristics (TA = +25°C) Parameters VOLP VOLV Description Dynamic LOW Peak Voltage Dynamic LOW Valley Voltage Test Conditions(1) VCC = 3.3V, CL = 50pF VIH = 3.3V, VIL = 0V VCC = 3.3V, CL = 50pF VIH = 3.3V, VIL = 0V Typical 0.8 Units V 0.8 V Note: 1. Measured with n–1 outputs switching from High-to-Low or Low-to-High. The remaining output is measured in the LOW state. Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 5 PS2104A 02/07/97