VB125ASP ® HIGH VOLTAGE IGNITION COIL DRIVER POWER I.C. TYPE VB125ASP Vcl 340V Icl 11.1A ICC 200mA PRIMARY COIL VOLTAGE INTERNALLY SET COIL CURRENT LIMIT INTERNALLY SET ■ LOGIC LEVEL COMPATIBLE INPUT ■ BATTERY OPERATION ■ SINGLE FLAG-ON COIL CURRENT ■ TEMPERATURE COMPENSATED HIGH VOLTAGE CLAMP ■ ■ DESCRIPTION The VB125ASP is a high voltage power integrated circuit made using the STMicroelectronics VIPower™ M1-2 technology, with vertical current flow power darlington and logic level compatible driving circuit. The VB125ASP can be directly biased by using the 12V battery voltage, thus avoiding to use a low voltage regulator. It has 10 1 PowerSO-10™ built-in protection circuit for coil current limiting and collector voltage clamping. It is suitable as smart, high voltage, high current interface in advanced electronic ignition system. BLOCK DIAGRAM VCC CS HVC INPUT DRIVER FLAG FLAG VOLTAGE REFERENCE THERMAL PROTECTION RSENSE * GND PWR GND (*) Pins 1...5 December 2000 1/9 1 VB125ASP ABSOLUTE MAXIMUM RATING Symbol HVc IC VCC ICC IS VIN Ptot VESD VESD Tj Tstg Parameter Collector voltage (Internally limited) Collector current (Internally limited) Driving stage supply voltage Driving circuitry supply current Logic circuitry supply current Input voltage Power dissipation at TC≤25 °C ESD Voltage (HVC pin) ESD Voltage (other pin) Junction operating temperature Storage temperature Range Value -0.3 to Vcl 11.1 -0.2 to 40 400 100 -0.3 to 6 100 -4 to 4 -2 to 2 -40 to 150 -55 to 150 Unit V A V mA mA V W KV KV °C °C Value 1.2 62.5 Unit °C/W °C/W THERMAL DATA Symbol Rthj-case Rthj-amb Parameter Thermal resistance junction-case Thermal resistance junction-ambient (MAX) (MAX) CONNECTION DIAGRAM (TOP VIEW) 5 4 3 6 7 8 9 10 VCC GND Cs INPUT FLAG 2 1 PWR GND PWR GND PWR GND PWR GND PWR GND TAB HVC PIN FUNCTION No 1÷5 6 7 8 9 10 TAB Name PWR GND VCC GND Cs INPUT FLAG HVC (*) Pin 7 must be connected to pins 1÷5 externally. 2/9 1 Function Emitter power ground Logic supply voltage Control ground (*) Logic level supply voltage filter capacitor Logic input channel Diagnostic output signal Primary coil output driver VB125ASP ELECTRICAL CHARACTERISTICS (VCC=6 to 24V; -40ºC<Tj<125ºC; Rcoil=400 to 700mΩ; Lcoil=2 to 6mH unless otherwise specified; see note 1) Symbol Vcl Parameter High voltage clamp Vcg(sat) Power stage saturation voltage ICC(off) Power-off supply current ICC(on) Power-on supply current Icl VINH VINL Collector current limit High level input voltage Low level input voltage Hysteresis input voltage High level input current Low level input current High level diagnostic output voltage Low level diagnostic output voltage VIN(hyst) IINH IINL VdiagH VdiagL IC(diag) IC(diag) Threshold level collector current Threshold level collector current Test Conditions IC=7A; (See note 2) Min 340 IC=2A; (Switching off from 7A) IC=6A; VCC=14V; VIN=4V 300 Max 400 Unit V 400 2 V V IC=7A; VCC=14V; VIN=4V (See note 3) VIN=0.4V; VCC=14V 3 20 V mA VIN=0.4V; VCC=24V (See note 4;5) VIN=4V; VCC<14V; IC=4A 80 200 mA mA 300 11.1 VIN=4V; VCC=24V; IC=4A (See note 4; 5) VIN=4V; 10V<VCC<19V (See note 6; 7) Typ 370 VIN=4V VIN=0.8V 0.4 10 0 150 30 mA A V V V µA µA REXT=22KΩ; CEXT=1nF (See note 8) 3.5 5.5 V 0.5 V 8.8 4 0.8 REXT=22KΩ; CEXT=1nF (See note 8) Tj=-40°C; 10V<VCC<19V 5.45 6.8 A Tj=25°C; 10V<VCC<19V 5.55 6.35 A Tj=125°C; 10V<VCC<19V 5.5 6.35 A (See note 7; 9 and fig. 5) Tj=-40°C; VCC=7V 5.9 6.6 A Tj=25°C; VCC=7V 5.7 6.3 A Tj=125°C; VCC=7V 5.5 6.3 A (See note 7; 9 and fig. 5) Idiag Idiag(leak) Vf Es/b Tj td(on) td(off) High level flag output current Leakage current on flag output Diode forward voltage Single pulse avalanche energy Thermal output current control Turn-on delay time of output current Turn-off delay time of output current IC>IC(diag) (See note 7) 0.5 mA VIN=LOW 10 µA If=10A 3.5 V IN=ON (See note 10) 300 mJ 150 °C (See note 11) (See note 12) µs 1 7 60 µs 3/9 1 VB125ASP NOTE 1: Only functionality is guaranteed with 6V<VCC<10V and VCC>24V and not parameter values. NOTE 2: In the high voltage clamping structure of this device a temperature compensation has been implemented. The circuit schematic is shown in fig. 1. The KVbe cell takes care of the temperature compensation. The whole electrical characteristic of the new circuit is shown in fig. 2. Up to VCE=nVZ no current will flow into the collector (just the leakage current of the power stage); for nVZ < VCE < Vcl a current begins to flow across the resistances of the KVbe compensation circuit (typical slope ≅20 KΩ) as soon as the Vcl reached the dinamic resistance drop to ~4Ω to protect the device against overvoltage (See figure 3). NOTE 3: The saturation voltage of the Power stage includes the drop on the sensing resistor. NOTE 4: Considering the different ways of operation of the device (with or without spark, etc...) there are some short periods of time in which the output terminal (HVC) is pulled below ground by a negative current due to leakage inductances and stray capacitances of the ignition coil. With VIPower devices, if no corrective action is taken, these negative currents can cause parasitic glitches on the diagnostic output. To kill this potential problem, a circuit that avoids the possibility for the HVC to be pulled underground, by sending the required negative current from the battery is implemented in the VB125ASP. For this reason there are some short periods in which a current exceeding 220 mA flows in the VCC pin. NOTE 5: A zener protection of 16V (typical) is placed on the supply pin (VCC) of the chip to protect the internal circuitry. For this reason, when the battery voltage exceeds that value, the current flowing into VCC pin can be greater than the maximum current specified at VCC=14V (both in power on and power off conditions): it will be limited by an internal resistor. NOTE 6: The primary coil current value Icl must be measured 1 ms after desaturation of the power stage. NOTE 7: These limits apply with regard to the minimum battery voltage and resistive drop on the coil and cables that permit to reach the limitation or diagnostic level. NOTE 8: No internal Pull-Down. NOTE 9: When IC gets over I C(diag), the diagnostic output voltage rises to the high level and so it remains until the end of the input signal. NOTE 10: Tjmin=150°C means that the behavior of the device will not be affected for junction temperature lower than 150°C. For higher temperature, the thermal protection circuit will begin its action reducing the Icl limit according with the power dissipation. Chip temperature is a function of the Rth of the whole system in which the device will be operating (See Fig.4). NOTE 11: Turn on delay time measured from 90% of input voltage rising edge to 10% of output voltage falling edge. NOTE 12: Turn off delay time is defined as the time between the 90% of input pulse falling edge and the point where the HVC reaches 200V. FIGURE 1: Temperature compensated high voltage clamp HVC FIGURE 2: Electrical characteristic of the circuit shown in Figure 1. IC [mA] nV Z 40 R i1 30 KVbe R ii 20 10 slope ∝ ∑Ri R sense PWR GND 4/9 1 100 200 300 nVZ 400 VCL VCE [V] VB125ASP FIGURE 3: Vcl with load L≅4mH FIGURE 4: Output Current Waveform after Thermal Protection Activation. 5/9 1 VB125ASP FIGURE 5: Waveforms FIGURE 6: Threshold Collector Current Vs Temperature IC(diag) (A) INPUT 7A 7.0 6A IC 6.0 5.0 HVC 4.0 0 -50 50 100 FLAG Tcase (°C) FIGURE 7: Application Circuit VCC 100µF 100nF VCC HVC INPUT µP 6/9 1 FLAG 1nF 22K CEXT REXT VB125ASP 100nF CS GND PWR GND VB125ASP PowerSO-10™ MECHANICAL DATA mm. DIM. MIN. A A (*) A1 B B (*) C C (*) D D1 E E2 E2 (*) E4 E4 (*) e F F (*) H H (*) h L L (*) α α (*) inch TYP 3.35 3.4 0.00 0.40 0.37 0.35 0.23 9.40 7.40 9.30 7.20 7.30 5.90 5.90 MAX. MIN. 3.65 3.6 0.10 0.60 0.53 0.55 0.32 9.60 7.60 9.50 7.60 7.50 6.10 6.30 0.132 0.134 0.000 0.016 0.014 0.013 0.009 0.370 0.291 0.366 0.283 0.287 0.232 0.232 1.35 1.40 14.40 14.35 0.049 0.047 0.543 0.545 1.80 1.10 8º 8º 0.047 0.031 0º 2º 1.27 TYP. MAX. 0.144 0.142 0.004 0.024 0.021 0.022 0.0126 0.378 0.300 0.374 300 0.295 0.240 0.248 0.050 1.25 1.20 13.80 13.85 0.50 0.053 0.055 0.567 0.565 0.002 1.20 0.80 0º 2º 0.070 0.043 8º 8º (*) Muar only POA P013P B 0.10 A B 10 H E E E2 1 SEATING PLANE e B DETAIL "A" A C 0.25 h E4 D = D1 = = = SEATING PLANE A F A1 A1 L DETAIL "A" α P095A 7/9 1 VB125ASP PowerSO-10™ SUGGESTED PAD LAYOUT TUBE SHIPMENT (no suffix) 14.6 - 14.9 CASABLANCA B 10.8- 11 MUAR C 6.30 C A A 0.67 - 0.73 10 9 1 9.5 2 3 B 0.54 - 0.6 All dimensions are in mm. 8 7 4 5 1.27 Base Q.ty Bulk Q.ty Tube length (± 0.5) 6 Casablanca Muar 50 50 1000 1000 532 532 A B C (± 0.1) 10.4 16.4 4.9 17.2 0.8 0.8 TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 24 4 24 1.5 1.5 11.5 6.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 8/9 1 1 VB125ASP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2000 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 9/9