REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R154-97. 96-12-13 Monica L. Poelking B Add vendor CAGE F8859. Add device class V criteria. Changes to table I. Editorial changes throughout. -gap 00-01-25 Raymond Monnin C Add case outline X. Add delta limits for class V devices. Editorial changes throughout - gap. 00-07-31 Raymond Monnin D Change the delta limit for the VOH parameter in table III. Update boilerplate to latest MIL-PRF-38535 requirements. - CFS 01-01-17 Thomas M. Hess E Add case outline Z. - jak 01-07-23 Thomas M. Hess THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED REV SHEET REV D C D SHEET 15 16 17 REV STATUS OF SHEETS PMIC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A REV E C E D D C C C C C C E C C SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PREPARED BY Jeffery Tunstall DEFENSE SUPPLY CENTER COLUMBUS CHECKED BY D. A. DiCenzo COLUMBUS, OHIO 43216 http://www.dscc.dla.mil APPROVED BY Michael A. Frye DRAWING APPROVAL DATE 88-07-27 REVISION LEVEL E MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL BIDIRECTIONAL TRANSCEIVER WITH THREE-STATE INPUTS/OUTPUTS, MONOLITHIC SILICON SIZE A CAGE CODE 5962-87758 67268 SHEET 1 OF DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. 17 5962-E502-01 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - Federal stock class designator \ 87758 RHA designator (see 1.2.1) 01 R X Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) 01 V X X Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number For device class V: 5962 - Federal stock class designator \ RHA designator (see 1.2.1) 87758 Device type (see 1.2.2) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 Generic number Circuit function 54AC245 Octal bidirectional transceiver with three-state inputs/outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class M Q or V Device requirements documentation Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Certification and qualification to MIL-PRF-38535 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 2 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter R S X 2 Z Descriptive designator GDIP1-T20 or CDIP2-T20 GDFP2-F20 or CDFP3-F20 see figure 1 CQCC1-N20 GDFP1-G20 Terminals Package style 20 20 20 20 20 Dual-in-line Flat pack Flat pack Square leadless chip carrier Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/, 2/, 3/ Supply voltage range (VCC).............................................................................. DC input voltage range (VIN)............................................................................ DC output voltage range (VOUT) ....................................................................... Clamp diode current (IIK, IOK) ........................................................................... DC output current (per output pin) .................................................................. DC VCC or GND current (per output pin) ......................................................... Maximum power dissipation (PD).................................................................... Storage temperature range (TSTG).................................................................... Lead temperature (soldering, 10 seconds)....................................................... Thermal resistance, junction-to-case (θJC) ....................................................... Junction temperature (TJ)................................................................................ -0.5 V dc to +7.0 V dc -0.5 V dc to VCC + 0.5 V dc -0.5 V dc to VCC + 0.5 V dc ±20 mA ±50 mA ±50 mA 4/ 500 mW -65°C to +150°C +245°C See MIL-STD-1835 +175°C 5/ 1.4 Recommended operating conditions. 2/, 3/, 6/ Supply voltage range (VCC).............................................................................. Input voltage range (VIN) ................................................................................. Output voltage range (VOUT) ............................................................................ Case operating temperature range (TC) ........................................................... Input rise or fall times (tr, tf): VCC = 3.6 V to 5.5 V .................................................................................... 1/ 2/ 3/ 4/ 5/ 6/ +2.0 V dc to +6.0 V dc +0.0 V dc to VCC +0.0 V dc to VCC -55°C to +125°C 0 to 8 ns/V Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Unless otherwise noted, all voltages are referenced to GND. The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of -55°C to +125°C. For devices with multiple VCC or GND pins, this value represents the total VCC or GND current. Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention and battery back-up systems. Data retention implies no input transition and no stored data loss with the following conditions: VIH ≥ 70% VCC, VIL ≤ 30% VCC, VOH ≥ 70% VCC @ -20µA, VOL ≤ 30% VCC @ 20 µA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL E SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DOD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard No. 20 - Standardized for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed CMOS Devices. (Applications for copies should be addressed to the Electronics Industries Alliance, 2001 Eye Street, NW, Washington, DC 20006.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL D SHEET 4 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein, or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL D SHEET 5 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535, appendix A). 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) TA = +125°C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 6 Table I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Positive input clamp voltage 3022 Negative input clamp voltage 3022 High level output voltage 3006 Symbol Device class VCC Group A subgroups VIC+ Test conditions 2/ -55°C ≤ TC ≤ +125°C +3.0 V ≤ VCC ≤ +5.5 V unless otherwise specified For input under test, IIN = 1.0 mA V 0.0 V 1 Min 0.4 Max 1.5 V VIC- For input under test, IIN = -1.0 mA V Open 1 -0.4 -1.5 V VOH 4/ VIN = VIH minimum or VIL maximum IOH = -50 µA All 3.0 V 1, 2, 3 2.9 All 4.5 V 1, 2, 3 4.4 All 5.5 V 1, 2, 3 5.4 All 3.0 V All 4.5 V All 5.5 V All 5.5 V 1 2, 3 1 2, 3 1 2, 3 1, 2, 3 2.56 2.40 3.86 3.70 4.86 4.70 3.85 All 3.0 V 1, 2, 3 0.1 All 4.5 V 1, 2, 3 0.1 All 5.5 V 1, 2, 3 0.1 VIN = VIH minimum or VIL maximum IOL = 12 mA All 3.0 V 1 0.36 VIN = VIH minimum or VIL maximum IOL = 24 mA All 4.5 V All 5.5 V All 5.5 V 2, 3 1 2, 3 1 2, 3 1, 2, 3 0.50 0.36 0.50 0.36 0.50 1.65 VIH All 3.0 V 1, 2, 3 2.1 5/ All 4.5 V 1, 2, 3 3.15 All 5.5 V 1, 2, 3 3.85 VIN = VIH minimum or VIL maximum IOH = -12 mA VIN = VIH minimum or VIL maximum IOH = -24 mA Low level output voltage 3007 VOL 4/ VIN = VIH minimum or VIL maximum IOH = -50 mA VIN = VIH minimum or VIL maximum IOL = 50 µA VIN = VIH minimum or VIL maximum IOL = 50 mA High level input voltage Limits 3/ Unit V V V See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 7 Table I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Low level input voltage Symbol Test conditions 2/ -55°C ≤ TC ≤ +125°C +3.0 V ≤ VCC ≤ +5.5 V unless otherwise specified Device class VCC Group A subgroups All 3.0 V 1, 2, 3 Max 0.9 All 4.5 V 1, 2, 3 1.35 All 5.5 V 1, 2, 3 1.65 Min VIL 5/ Input leakage current low 3009 Input leakage current high 3010 Quiescent supply current, output high 3005 Quiescent supply current, output low 3005 Quiescent supply current, outputs three state 3005 Three state output leakage current high 3021 Three state output leakage current low 3020 Input capacitance 3012 Power dissipation capacitance Functional tests 3014 Limits 3/ Unit V IIL VIN = 0.0 V All 5.5 V 1 -0.1 µA IIH VIN = 5.5 V All 5.5 V 2, 3 1 -1.0 0.1 µA ICCH VIN = VCC or GND All 5.5 V 2, 3 1 1.0 4 µA 2, 3 80 1 4 2, 3 80 1 4 2, 3 80 ICCL ICCZ IOZH VIN = VCC or GND All VIN = VCC or GND All VIN = VIH min or VIL max, VOUT = VCC, IOZL CIN CPD 6/ 7/ See 4.4.1c TC = +25°C See 4.4.1c TC = +25°C, f = 1 MHz See 4.4.1b VIN = VIH or VIL Verify output VOUT 5.5 V 5.5 V µA µA All 5.5 V 1, 2, 3 +10 µA All 5.5 V 1, 2, 3 -10 µA 4 12 pF 55 pF All All 5.0 V 4 All 3.0 V 7, 8 L H 5.5 V 7, 8 L H See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 8 Table I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Propagation delay time, A to B or B to A 3003 Symbol tPHL 8/ Test conditions 2/ -55°C ≤ TC ≤ +125°C +3.0 V ≤ VCC ≤ +5.5 V unless otherwise specified CL = 50 pF minimum RL = 500Ω See figure 5 Device class All VCC 3.0 V 4.5 V tPLH 8/ 3.0 V 4.5 V Output disable time, OE to A or B 3003 tPHZ 8/ CL = 50 pF minimum RL = 500Ω See figure 5 All 3.0 V 4.5 V tPLZ 8/ 3.0 V 4.5 V Output enable time, OE to A or B 3003 tPZH 8/ CL = 50 pF RL = 500Ω See figure 5 All 3.0 V 4.5 V tPZL 8/ 3.0 V 4.5 V Group A subgroups 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 9 10, 11 Limits 3/ Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Unit Max 8.5 10.0 6.0 7.5 8.5 11.5 6.5 8.5 12.0 13.5 9.0 10.5 11.5 14.0 9.0 10.5 11.5 13.5 8.5 10.0 12.0 14.5 9.0 10.5 ns ns ns 1/ For tests not listed in the referenced MIL-STD-883, [e.g. VIH, VIL], utilize the general test procedure under the conditions listed herein. 2/ Each input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table I herein. Output terminals not designated shall be high level logic, low level logic, or open, except as follows: a. VIC (pos) tests, the GND terminal can be open. TC = +25°C. b. VIC (neg) tests, the VCC terminal shall be open. TC = +25°C. c. All ICC tests, the output terminal shall be open. When performing these tests, the current meter shall be placed in the circuit such that all current flows through the meter. Additional detailed information on qualified devices (i.e. pin for pin conditions and testing sequence) is available from the qualifying activity (DSCC-VQC) upon request. 3/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. All devices shall meet or exceed the limits specified in table I, as applicable, at 3.0 V ≤ VCC ≤ 3.6 V and 4.5 V ≤ VCC ≤ 5.5 V. 4/ The VOH and VOL tests shall be tested at VCC = 3.0 V and 4.5 V. The VOH and VOL tests are guaranteed, if not tested, for other values of VCC. Limits shown apply to operation at VCC = 3.3 V ±0.3 V and VCC = 5.0 V ±0.5 V. Tests with input current at +50 mA or -50 mA are performed on only one input at a time with duration not to exceed 10 ms. Transmission driving tests may be performed using VIN = VCC or GND. When VIN = VCC or GND is used, the test is guaranteed for VIN = VIH minimum and VIL maximum. Values for subgroup 1 shall be guaranteed, if not tested, to the limits specified in table I, herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 9 Table I. Electrical performance characteristics - Continued. 5/ The VIH and VIL tests are not required if applied as forcing functions for VOH and VOL tests. 6/ Power dissipation capacitance (CPD) determines both the power consumption (PD) and dynamic current consumption (IS). Where: PD = (CPD + CL) (VCC x VCC)f + (ICC x VCC) IS = (CPD + CL) VCCf + ICC f is the frequency of the input signal and CL is the external output load capacitance. 7/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 3 herein. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. For VOUT measurements, L ≤ 0.3VCC and H ≥ 0.7VCC. 8/ For propagation delay tests, all paths must be tested. AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. AC limits at VCC = 3.6 V are equal to limits at VCC = 3.0 V and guaranteed by testing at VCC = 3.0 V. Minimum ac limits for VCC = 5.5 V are 1.0 ns and guaranteed by guardbanding the VCC = 4.5 V minimum limits to 1.5 ns. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 10 Case X Dimensions Symbol Inches Millimeters Min Max Min Max A .045 .085 1.14 2.16 b .015 .019 0.38 0.48 c .003 .006 0.076 0.152 D .505 .515 12.83 13.08 E .275 .285 6.99 7.24 e .045 .055 1.14 1.40 L .250 .370 6.35 9.39 Q .010 --- 0.25 N 20 --20 FIGURE 1. Case outlines. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 11 Case outlines R, S, X, Z, and 2 Pin number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Terminal connections T/R A0 A1 A2 A3 A4 A5 A6 A7 GND B7 B6 B5 B4 B3 B2 B1 B0 OE VCC FIGURE 2. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL E SHEET 12 Inputs Outputs OE T/R L L H L H X Data B to Bus A Data A to Bus B Z state H = High voltage level L = Low voltage level X = Immaterial Z = High impedance FIGURE 3. Truth table. FIGURE 4. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 13 NOTES: 1. 2. 3. 4. VTEST = open for tPLH, tPHL, tPHZ, and tPZH. VTEST = 2 x VCC for tPLZ and tPZL. CL = 50 pF or equivalent, (includes probe and jig capacitance). RL = 500Ω or equivalent. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. 5. Input signal from pulse generator: VIN = 0.0 V to VCC; PRR ≤ 1 MHz; ZO = 50Ω; tr ≤ 3.0 ns; tf ≤ 3.0 ns; tr and tf shall be measured from 10% of VCC to 90% of VCC and from 90% of VCC to 10% of VCC, respectively; duty cycle = 50 percent. 6. Timing parameters shall be tested at a minimum input frequency of 1MHz. 7. The outputs are measured one at a time with one transition per measurement. FIGURE 5. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 14 4.3.1 Electrostatic discharge sensitivity qualification inspection . Electrostatic discharge sensitivity (ESDS) testing shall be performed in accordance with MIL-STD-883, method 3015. ESDS testing shall be measured only for initial qualification and after process or design changes which may affect ESDS classification. 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). TABLE II. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Subgroups (in accordance with MIL-PRF-38535, table III) Device class M Device class Q Device class V Interim electrical parameters (see 4.2) --- --- 1 Final electrical parameters (see 4.2) 1/ 1, 2, 3, 7, 8, 9 1/ 1, 2, 3, 7, 8, 9 2/, 3/ 1, 2, 3, 7, 8, 9, 10, 11 Group A test requirements (see 4.4) 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 1, 2, 3, 4, 7, 8, 9, 10, 11 Group C end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 3/ 1, 2, 3, 7,8, 9, 10, 11 Group D end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 1, 2, 3 Group E end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 1/ PDA applies to subgroup 1. 2/ PDA applies to subgroups 1 and 7, and deltas. 3/ Delta limits as specified in table III shall be required where specified, and the delta limits shall be completed with reference to the zero hour electrical parameters. Table III. Burn-in and operating life test delta parameters (+25°C). Parameter Supply current Symbol ICC Delta Limits Input current low level IIL ±20 nA Input current high level IIH ±20 nA Output voltage low level VCC = 5.5 V IOL = 24 mA VOL ±0.04 V Output voltage high level VCC = 5.5 V IOH = -24 mA VOH ±0.20 V STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 ±300 nA SIZE 5962-87758 A REVISION LEVEL D SHEET 15 4.4.1 Group A inspection a. Tests shall be as specified in table II herein. b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 3 herein. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 3, herein. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. c. CIN and CPD shall be measured only for initial qualification and after process or design changes which may affect capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. CPD shall be tested in accordance with the latest revision of JEDEC Standard No. 20 and table I herein. For CIN and CPD, test all applicable pins on five devices with zero failures. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. b. TA = +125°C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MILPRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MILSTD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein. c. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenced terminal. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL C SHEET 16 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-87758 A REVISION LEVEL D SHEET 17 STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN DATE: 01-07-23 Approved sources of supply for SMD 5962-87758 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-8775801RA 27014 01295 27014 01295 F8859 F8859 27014 3/ F8859 F8859 27014 01295 54AC245DMQB SNJ54AC245J 54AC245FMQB SNJ54AC245W 54AC245K02Q 54AC245K01Q 54AC245WG-QML 5962-8775801SA 5962-8775801XA 5962-8775801XC 5962-8775801ZA 5962-8775801VSA 5962-8775801VXA 5962-8775801VXC 5962-87758012A 54AC245K02V 54AC245K01V 54AC245LMQB SNJ54AC245FK 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ No longer available from an approved source of supply. Vendor CAGE number Vendor name and address 27014 National Semiconductor 2900 Semiconductor Drive P. O. Box 58090 Santa Clara, CA 95052-8090 Point of contact: 5 Foden Road South Portland, ME 04106 F8859 ST Microelectronics 3 rue de Suisse BP4199 35041 RENNES cedex2 - France 01295 Texas Instruments 8505 Forest Ln. P. O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P. O. Box 84 M/S 853 Sherman, TX 75090-9493 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.