AD AD7817SR

a
Single- and 4-Channel, 9 ␮s, 10-Bit ADCs
with On-Chip Temperature Sensor
AD7816/AD7817/AD7818
FEATURES
10-Bit ADC with 9 ␮s Conversion Time
One (AD7818) and Four (AD7817) Single-Ended Analog
Input Channels
The AD7816 Is a Temperature Measurement Only Device
On-Chip Temperature Sensor
Resolution of 0.25ⴗC
ⴞ2ⴗC Error from –40ⴗC to +85ⴗC
–55ⴗC to +125ⴗC Operating Range
Wide Operating Supply Range
+2.7 V to +5.5 V
Inherent Track-and-Hold Functionality
On-Chip Reference (2.5 V ⴞ 1%)
Over-Temperature Indicator
Automatic Power-Down at the End of a Conversion
Low Power Operation
4 ␮W at a Throughput Rate of 10 SPS
40 ␮W at a Throughput Rate of 1 kSPS
400 ␮W at a Throughput Rate of 10 kSPS
Flexible Serial Interface
APPLICATIONS
Ambient Temperature Monitoring (AD7816)
Thermostat and Fan Control
High Speed Microprocessor
Temperature Measurement and Control
Data Acquisition Systems with Ambient Temperature
Monitoring (AD7817 and AD7818)
Industrial Process Control
Automotive
Battery Charging Applications
GENERAL DESCRIPTION
The AD7818 and AD7817 are 10-bit, single- and 4-channel
A/D converters with on-chip temperature sensor that can operate from a single 2.7 V to 5.5 V power supply. Each part contains a 9 µs successive-approximation converter based around
a capacitor DAC, an on-chip temperature sensor with an accuracy of ± 2°C, an on-chip clock oscillator, inherent track-andhold functionality and an on-chip reference (2.5 V). The
AD7816 is a temperature monitoring only device in a SOIC/
µSOIC package.
The on-chip temperature sensor of the AD7817 and AD7818
can be accessed via Channel 0. When Channel 0 is selected and
a conversion is initiated, the resulting ADC code at the end of
the conversion gives a measurement of the ambient temperature
with a resolution of ± 0.25°C. See Measuring Temperature section
of the data sheet.
FUNCTIONAL BLOCK DIAGRAM
VDD
REFIN
AD7817
OVER-TEMP
REG
TEMP
SENSOR
VIN3
VIN4
A>B
OTI
A
REF
2.5V
VIN1
VIN2
B
MUX
SAMPLING
CAPACITOR
CHARGE
REDISTRIBUTION
DAC
CONTROL
LOGIC
DATA
OUT
CONTROL
REG
DOUT
DIN
SCLK
RD/WR
CLOCK
VBALANCE
AGND
DGND
BUSY
CS
CONVST
The AD7816, AD7817 and AD7818 have a flexible serial interface that allows easy interfacing to most microcontrollers.
The interface is compatible with the Intel 8051, Motorola
SPI™ and QSPI™ protocols and National Semiconductors
MICROWIRE™ protocol. For more information refer to the
Serial Interface section of this data sheet.
The AD7817 is available in a narrow body 0.15" 16-lead Small
Outline IC (SOIC), in a 16-lead, Thin Shrink Small Outline
Package (TSSOP), while the AD7816/AD7818 come in an
8-lead Small Outline IC (SOIC) and an 8-lead microsmall
Outline IC (µSOIC).
PRODUCT HIGHLIGHTS
1. The devices have an on-chip temperature sensor that allows an
accurate measurement of the ambient temperature to be
made. The measurable temperature range is –55°C to +125°C.
2. An over-temperature indicator is implemented by carrying
out a digital comparison of the ADC code for Channel 0
(temperature sensor) with the contents of the on-chip overtemperature register. The over-temperature indicator pin goes
logic low when a predetermined temperature is exceeded.
3. The automatic power-down feature enables the AD7816,
AD7817 and AD7818 to achieve superior power performance at slower throughput rates, e.g., 40 µW at 1 kSPS
throughput rate.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD7816/AD7817/AD7818
AD7817–SPECIFICATIONS1 (V
Parameter
DD
= +2.7 V to +5.5 V, GND = 0␣ V, REFIN = +2.5␣ V unless otherwise noted)
A Version *B Version
*S Version Units
DYNAMIC PERFORMANCE
Signal to (Noise + Distortion) Ratio2
Total Harmonic Distortion2
Peak Harmonic or Spurious Noise2
Intermodulation Distortion2
Second Order Terms
Third Order Terms
Channel-to-Channel Isolation2
DC ACCURACY
Resolution
Minimum Resolution for Which
No Missing Codes Are Guaranteed
Relative Accuracy2
Differential Nonlinearity2
Gain Error2
Gain Error Match2
Offset Error2
Offset Error Match
TEMPERATURE SENSOR1
Measurement Error
Ambient Temperature +25°C
TMIN to TMAX
Measurement Error
Ambient Temperature +25°C
TMIN to TMAX
Temperature Resolution
REFERENCE INPUT3, 4
REFIN Input Voltage Range3
Input Impedance
Input Capacitance
ON-CHIP REFERENCE5
Temperature Coefficient3
CONVERSION RATE
Track/Hold Acquisition Time4
Conversion Time
Temperature Sensor
Channels 1 to 4
POWER REQUIREMENTS
VDD
IDD
Normal Operation
Using External Reference
Power-Down
Auto Power-Down Mode
10 SPS Throughput Rate
1 kSPS Throughput Rate
10 kSPS Throughput Rate
Power-Down
Test Conditions/Comments
Sample Rate = 100 kSPS, Any
Channel, fIN = 20 kHz
58
–65
–65
58
–65
–65
58
–65
–65
dB min
dB max
dB max
–67
–67
–80
–67
–67
–80
–67
–67
–80
dB typ
dB typ
dB typ
10
10
10
Bits
10
±1
±1
±2
±10
±1/2
±2
±1/2
10
±1
±1
±2
±10
±1/2
±2
±1/2
10
±1
±1
±2
+20/–10
± 1/2
±2
± 1/2
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
±2
±3
±1
±2
±2
±3
°C max
°C max
±2.25
±3
1/4
±2.25
±3
1/4
± 2.25
±6
1/4
°C max
°C max
°C/LSB
2.625
2.375
40
10
2.625
2.375
40
10
2.625
2.375
40
10
V max
V min
kΩ min
pF max
80
80
150
ppm/°C typ
400
400
400
ns max
27
9
27
9
27
9
µs max
µs max
+5.5
+2.7
+5.5
+2.7
+5.5
+2.7
V max
V min
2
1.75
1
2
1.75
1
2
1.75
2
mA max
mA max
µA max
6
60
600
3
6
60
600
3
6
60
600
6
µW typ
µW typ
µW typ
µW max
–75 dB typ
–75 dB typ
fa =19.9␣ kHz, fb = 20.1␣ kHz
fIN = 20 kHz
Any Channel
External Reference
Internal Reference
External Reference VREF = 2.5 V
On-Chip Reference
2.5 V + 5%
2.5 V – 5%
Nominal 2.5 V
–2–
Source Impedance < 10 Ω
For Specified Performance
Logic Inputs = 0 V or VDD
1.6 mA typ
2.5 V External Reference Connected
50 nA typ
VDD = 3 V
See Power vs. Throughput Section
for Description of Power Dissipation
in Auto Power-Down Mode
Typically 0.15 µW
REV. A
AD7816/AD7817/AD7818
6
1
AD7816/AD7818 –SPECIFICATIONS
Parameter
A Version
(VDD = +2.7 V to +5.5 V, GND = 0 V, REFIN = +2.5 V unless
otherwise noted)
Units
DYNAMIC PERFORMANCE (AD7818 Only)
Signal to (Noise + Distortion) Ratio2
Total Harmonic Distortion2
Peak Harmonic or Spurious Noise2
Intermodulation Distortion2
Second Order Terms
Third Order Terms
Channel-to-Channel Isolation2
DC ACCURACY (AD7818 Only)
Resolution
Minimum Resolution for Which
No Missing Codes Are Guaranteed
Relative Accuracy2
Differential Nonlinearity2
Gain Error2
Offset Error2
TEMPERATURE SENSOR1
Measurement Error
Ambient Temperature +25°C
TMIN to TMAX
Measurement Error
Ambient Temperature +25°C
TMIN to TMAX
Temperature Resolution
REFERENCE INPUT3, 4 (AD7816 Only)
REFIN Input Voltage Range3
Input Impedance
Input Capacitance
ON-CHIP REFERENCE5
Temperature Coefficient3
CONVERSION RATE
Track/Hold Acquisition Time4
Conversion Time
Temperature Sensor
Channel 1
POWER REQUIREMENTS
VDD
IDD
Normal Operation
Using External Reference
Power-Down
Auto Power-Down Mode
10 SPS Throughput Rate
1 kSPS Throughput Rate
10 kSPS Throughput Rate
Power-Down
REV. A
Test Conditions/Comments
Sample Rate = 100 kSPS, Any
Channel, fIN = 20 kHz
57
–65
–67
dB min
dB max
dB typ
–67
–67
–80
dB typ
dB typ
dB typ
10
Bits
10
±1
±1
± 10
±4
Bits
LSB max
LSB max
LSB max
LSB max
±2
±3
°C max
°C max
±2
±3
1/4
°C max
°C max
°C/LSB
2.625
2.375
50
10
V max
V min
kΩ min
pF max
30
ppm/°C typ
400
ns max
Source Impedance < 10 Ω
27
9
µs max
µs max
(AD7818 Only)
+5.5
+2.7
V max
V min
2
1.75
2
mA max
mA max
µA max
4
40
400
3
µW typ
µW typ
µW typ
µW max
–75 dB typ
–75 dB typ
fa = 19.9␣ kHz, fb = 20.1␣ kHz
fIN = 20 kHz
Any Channel
External Reference VREF = 2.5 V
On-Chip Reference
2.5 V + 5%
2.5 V – 5%
Nominal 2.5 V
–3–
For Specified Performance
Logic Inputs = 0 V or VDD
1.3 mA typ
2.5 V External Reference Connected
500 nA typ
VDD = 3 V
See Power vs. Throughput Section for
Description of Power Dissipation in
Auto Power-Down Mode
Typically 0.15 µW
AD7816/AD7817/AD7818–SPECIFICATIONS1
Parameter
A Version
*B Version
*S Version
Units
VREF
0
±1
10
VREF
0
±1
10
VREF
0
±1
10
V max
V min
µA min
pF max
2.4
0.8
2
0.4
±3
10
2.4
0.8
2
0.4
±3
10
2.4
0.8
2
0.4
±3
10
V min
V max
V min
V max
µA max
pF max
4
2.4
4
2.4
4
2.4
V min
V min
0.4
0.2
±1
15
0.4
0.2
±1
15
0.4
0.2
±1
15
V max
V max
µA max
pF max
7
ANALOG INPUTS
Input Voltage Range
Test Conditions/Comments
(AD7817 and AD7818)
Input Leakage
Input Capacitance
LOGIC INPUTS4
Input High Voltage, VINH
Input Low Voltage, VINL
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
LOGIC OUTPUTS4
Output High Voltage, VOH
Output Low Voltage, VOL
High Impedance Leakage Current
High Impedance Capacitance
VDD = 5 V ± 10%
VDD = 5 V ± 10%
VDD = 3 V ± 10%
VDD = 3 V ± 10%
Typically 10 nA, VIN = 0 V to VDD
ISOURCE = 200␣ µA
VDD = 5 V ± 10%
VDD = 3 V ± 10%
ISINK = 200 µA
VDD = 5 V ± 10%
VDD = 3 V ± 10%
NOTES
*B and S Versions apply to AD7817 only. For operating temperature ranges, see Ordering Guide.
1
AD7816 and AD7817 temperature sensors specified with external +2.5 V reference, AD7818 specified with on-chip reference. All other specifications with external
and on-chip reference (+2.5 V). For V DD = +2.7 V, TA = +85°C max and temperature sensor measurement error = ± 3°C.
2
See Terminology.
3
The accuracy of the temperature sensor is affected by reference tolerance. The relationship between the two is explained in the section titled Temperature Measurement Error Due to Reference Error.
4
Sample tested during initial release and after any redesign or process change that may affect this parameter.
5
On-chip reference shuts down when external reference is applied.
6
All specifications are typical for AD7818 at temperatures above +85°C and with V DD greater than +3.6 V.
7
Refers to the input current when the part is not converting. Primarily due to reverse leakage current in the ESD protection diodes.
Specifications subject to change without notice.
REFIN
AD7816
OVER-TEMP
REG
TEMP
SENSOR
VDD
VDD
B
A>B
AD7818
OTI
TEMP
SENSOR
A
REF
2.5V
CHARGE
REDISTRIBUTION
DAC
DATA
OUT
DIN/OUT
MUX
SAMPLING
CAPACITOR
CONTROL
LOGIC
CLOCK
VBALANCE
AGND
CONTROL
REG
VIN1
REF
2.5V
RD/WR
AGND
Figure 1. AD7816 Functional Block Diagram
A
CHARGE
REDISTRIBUTION
DAC
DATA
OUT
DIN/OUT
VBALANCE
CONVST
OTI
A>B
B
MUX
SAMPLING
CAPACITOR
SCLK
OVER-TEMP
REG
CONTROL
LOGIC
CONTROL
REG
SCLK
RD/WR
CLOCK
GENERATOR
CONVST
Figure 2. AD7818 Functional Block Diagram
–4–
REV. A
AD7816/AD7817/AD7818
TIMING CHARACTERISTICS1, 2
(VDD = +2.7 V to +5.5 V, GND = 0␣ V, REFIN = +2.5␣ V. All specifications TMIN to TMAX unless
otherwise noted)
Parameter
A, B Versions
Units
Test Conditions/Comments
tPOWER-UP
t1a
t1b
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t123
t133
t14a3, 4
t14b3, 4
t15
t16
t17
2
9
27
20
50
0
0
10
10
40
40
0
0
20
20
30
30
150
40
400
µs max
µs max
µs max
ns min
ns max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns max
ns max
ns max
ns max
ns min
ns min
Power-Up Time from Rising Edge of CONVST
Conversion Time Channels 1 to 4
Conversion Time Temperature Sensor
CONVST Pulsewidth
CONVST Falling Edge to BUSY Rising Edge
CS Falling Edge to RD/WR Falling Edge Setup Time
RD/WR Falling Edge to SCLK Falling Edge Setup
DIN Setup Time before SCLK Rising Edge
DIN Hold Time after SCLK Rising Edge
SCLK Low Pulsewidth
SCLK High Pulsewidth
CS Falling Edge to RD/WR Rising Edge Setup Time
RD/WR Rising Edge to SCLK Falling Edge Setup Time
DOUT Access Time after RD/WR Rising Edge
DOUT Access Time after SCLK Falling Edge
DOUT Bus Relinquish Time after Falling Edge of RD/WR
DOUT Bus Relinquish Time after Rising Edge of CS
BUSY Falling Edge to OTI Falling Edge
RD/WR Rising Edge to OTI Rising Edge
SCLK Rising Edge to CONVST Falling Edge (Acquisition Time of T/H)
NOTES
1
Sample tested during initial release and after any redesign or process change that may affect this parameter. All input signals are measured with tr = tf = 1␣ ns (10% to
90% of +5 V) and timed from a voltage level of +1.6␣ V.
2
See Figures 16, 17, 20 and 21.
3
These figures are measured with the load circuit of Figure 3. They are defined as the time required for D OUT to cross 0.8 V or 2.4 V for V DD = 5 V ± 10% and 0.4 V
or 2 V for VDD = 3 V ± 10%, as quoted on the specifications page of this data sheet.
4 These times are derived from the measured time taken by the data outputs to change 0.5␣ V when loaded with the circuit of Figure 3. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus
relinquish times of the part and as such are independent of external bus loading capacitances.
Specifications subject to change without notice.
200mA
TO
OUTPUT
PIN
IOL
1.6V
CL
50pF
200mA
IOL
Figure 3. Load Circuit for Access Time and Bus Relinquish Time
REV. A
–5–
AD7816/AD7817/AD7818
ABSOLUTE MAXIMUM RATINGS 1
µSOIC Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
(TA = +25°C unless otherwise noted)
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3␣ V to +7␣ V
VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3␣ V to +7␣ V
Analog Input Voltage to AGND
VIN1 to VIN4 . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Reference Input Voltage to AGND2 . . . –0.3 V to VDD + 0.3␣ V
Digital Input Voltage to DGND . . . . . . –0.3 V to V DD + 0.3 V
Digital Output Voltage to DGND . . . . . –0.3 V to V DD + 0.3 V
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
TSSOP, Power Dissipation . . . . . . . . . . . . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 120°C/W
Lead Temperature, Soldering . . . . . . . . . . . . . . . . . +260°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
16-Lead SOIC Package, Power Dissipation . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 100°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
8-Lead SOIC Package, Power Dissipation . . . . . . . . . 450 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 157°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2
If the Reference Input Voltage is likely to exceed V DD by more than 0.3 V (e.g.,
during power-up) and the reference is capable of supplying 30 mA or more, it is
recommended to use a clamping diode between the REF IN pin and VDD pin. The
diagram below shows how the diode should be connected.
VDD
REFIN
BAT81
AD7816/AD7817
ORDERING GUIDE
Model
Temperature
Range
Temperature
Error @ +25°C
Package
Description
Branding
Information
Package
Options
AD7816AR
AD7816ARM
–55°C to +125°C
–55°C to +125°C
± 2°C
± 2°C
8-Lead Narrow Body (SOIC)
8-Lead µSOIC
C4A
SO-8
RM-8
AD7817AR
AD7817BR
AD7817ARU
AD7817BRU
AD7817SR
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
± 2°C
± 1°C
± 2°C
± 1°C
± 2°C
16-Lead Narrow Body (SOIC)
16-Lead Narrow Body (SOIC)
16-Lead (TSSOP)
16-Lead (TSSOP)
16-Lead Narrow Body (SOIC)
AD7818AR
AD7818ARM
–55°C to +125°C
–55°C to +125°C
± 2°C
± 2°C
8-Lead Narrow Body (SOIC)
8-Lead µSOIC
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7816/AD7817/AD7818 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
–6–
R-16A
R-16A
RU-16
RU-16
R-16A
SO-8
RM-8
C3A
WARNING!
ESD SENSITIVE DEVICE
REV. A
AD7816/AD7817/AD7818
AD7817 PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Description
1
CONVST
2
BUSY
3
OTI
4
CS
5
6
AGND
REFIN
7–10
VIN1 to VIN4
11
12
13
VDD
DGND
DOUT
14
15
DIN
SCLK
16
RD/WR
Logic Input Signal. The convert start signal. A 10-bit analog-to-digital conversion is initiated on the
falling edge of this signal. The falling edge of this signal places the track/hold in hold mode. The track/
hold goes into track mode again at the end of the conversion. The state of the CONVST signal is checked
at the end of a conversion. If it is logic low, the AD7817 will power-down—see Operating Mode section
of the data sheet.
Logic Output. The busy signal is logic high during a temperature or voltage A/D conversion. The signal
can be used to interrupt a microcontroller when a conversion has finished.
Logic Output. The Over-Temperature Indicator (OTI) is set logic low if the result of a conversion on
Channel 0 (Temperature Sensor) is greater that an eight bit word in the Over-Temperature Register
(OTR). The signal is reset at the end of a serial read operation, i.e., a rising RD/WR edge when CS is low.
Logic Input Signal. The chip select signal is used to enable the serial port of the AD7817. This is necessary if the AD7817 is sharing the serial bus with more than one device.
Analog Ground. Ground reference for track/hold, comparator and capacitor DAC.
Analog Input. An external 2.5 V reference can be connected to the AD7817 at this pin. To enable the onchip reference the REFIN pin should be tied to AGND. If an external reference is connected to the
AD7817, the internal reference will shut down.
Analog Input Channels. The AD7817 has four analog input channels. The input channels are singleended with respect to AGND (analog ground). The input channels can convert voltage signals in the
range 0 V to VREF. A channel is selected by writing to the Address Register of the AD7817—see Control
Byte section.
Positive Supply Voltage, +2.7 V to +5.5 V.
Digital Ground. Ground reference for digital circuitry.
Logic Output With a High Impedance State. Data is clocked out of the AD7817 serial port at this pin.
This output goes into a high impedance state on the falling edge of RD/WR or on the rising edge of the
CS signal, whichever occurs first.
Logic Input. Data is clocked into the AD7817 at this pin.
Clock Input For the Serial Port. The serial clock is used to clock data into and out of the AD7817. Data
is clocked out on the falling edge and clocked in on the rising edge.
Logic Input Signal. The read/write signal is used to indicate to the AD7817 whether the data transfer
operation is a read or a write. The RD/WR should be set logic high for a read operation and logic low for
a write operation.
PIN CONFIGURATION
SOIC/TSSOP
CONVST 1
16 RD/WR
15 SCLK
BUSY 2
OTI 3
CS 4
14 DIN
AD7817
13 DOUT
TOP VIEW
AGND 5 (Not to Scale) 12 DGND
REFIN 6
11 VDD
REV. A
VIN1 7
10 VIN4
VIN2 8
9 VIN3
–7–
AD7816/AD7817/AD7818
AD7816 AND AD7818 PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Description
1
CONVST
2
OTI
3
4 (AD7818)
GND
VIN
4 (AD7816)
REFIN
5
6
7
VDD
DIN/OUT
SCLK
8
RD/WR
Logic Input Signal. The convert start signal initiates a 10-bit analog-to-digital conversion on the
falling edge of the this signal. The falling edge of this signal places the track/hold in hold mode.
The track/hold goes into track mode again at the end of the conversion. The state of the
CONVST signal is checked at the end of a conversion. If it is logic low, the AD7816 and
AD7818 will power down—see Operating Mode section of the data sheet.
Logic Output. The Over-Temperature Indicator (OTI) is set logic low if the result of a conversion on Channel 0 (Temperature Sensor) is greater that an 8-bit word in the Over-Temperature Register (OTR). The signal is reset at the end of a serial read operation, i.e., a rising
RD/WR edge.
Analog and Digital Ground.
Analog Input Channel. The input channel is single-ended with respect to GND. The input
channel can convert voltage signals in the range 0 V to 2.5 V. The input channel is selected by
writing to the Address Register of the AD7818—see Control Byte section.
Reference Input. An external 2.5 V reference can be connected to the AD7816 at this pin. To
enable the on-chip reference the REFIN pin should be tied to AGND. If an external reference is
connected to the AD7816, the internal reference will shut down.
Positive supply voltage, +2.7 V to +5.5 V.
Logic Input and Output. Serial data is clocked in and out of the AD7816/AD7818 at this pin.
Clock Input For the Serial Port. The serial clock is used to clock data into and out of the
AD7816/AD7818. Data is clocked out on the falling edge and clocked in on the rising edge.
Logic Input. The read/write signal is used to indicate to the AD7816 and AD7818 whether
the next data transfer operation is a read or a write. The RD/WR should be set logic high for a
read operation and logic low for a write.
PIN CONFIGURATIONS
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7891 it is defined as:
SOIC/␮SOIC (AD7816)
CONVST 1
8 RD/WR
THD (dB) = 20 log
AD7816
7 SCLK
OTI 2
TOP VIEW
AGND 3 (Not to Scale) 6 DIN/OUT
REFIN 4
Peak Harmonic or Spurious Noise
SOIC/␮SOIC (AD7818)
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to fS/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is determined by the largest harmonic in the spectrum, but for parts
where the harmonics are buried in the noise floor, it will be a
noise peak.
8 RD/WR
AD7818
7 SCLK
TOP VIEW
AGND 3 (Not to Scale) 6 DIN/OUT
OTI 2
VIN 4
V1
where V1 is the rms amplitude of the fundamental and V2, V3,
V4, V5 and V6 are the rms amplitudes of the second through the
sixth harmonics.
5 VDD
CONVST 1
V22 +V32 +V42 +V52 +V62
5 VDD
Intermodulation Distortion
TERMINOLOGY
Signal to (Noise + Distortion) Ratio
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa ± nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation terms are those for which
neither m nor n are equal to zero. For example, the second
order terms include (fa + fb) and (fa – fb), while the third order
terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).
This is the measured ratio of signal to (Noise + Distortion) at
the output of the A/D converter. The signal is the rms amplitude
of the fundamental. Noise is the rms sum of all nonfundamental signals up to half the sampling frequency (fS/2), excluding dc.
The ratio is dependent upon the number of quantization levels
in the digitization process; the more levels, the smaller the
quantization noise. The theoretical Signal to (Noise + Distortion)
Ratio for an ideal N-bit converter with a sine wave input is
given by:
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
Thus for a 10-bit converter, this is 62␣ dB.
–8–
REV. A
AD7816/AD7817/AD7818
The AD7816, AD7817 and AD7818 are tested using the CCIF
standard where two input frequencies near the top end of the
input bandwidth are used. In this case, the second and third
order terms are of different significance. The second order terms
are usually distanced in frequency from the original sine waves
while the third order terms are usually at a frequency close to
the input frequencies. As a result, the second and third order
terms are specified separately. The calculation of the intermodulation distortion is as per the THD specification where it is the
ratio of the rms sum of the individual distortion products to the
rms amplitude of the fundamental expressed in dBs.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of
crosstalk between channels. It is measured by applying a fullscale 20␣ kHz sine wave signal to one input channel and determining how much that signal is attenuated in each of the other
channels. The figure given is the worst case across all four
channels.
Address Register
If the five MSBs of the control byte are logic zero, the three
LSBs of the control byte are transferred to the Address Register—see Figure 4. The Address Register is a 3-bit-wide register
used to select the analog input channel on which to carry out a
conversion. It is also used to select the temperature sensor,
which has the address 000. Table I shows the selection. The
Internal Reference selection connects the input of the ADC to a
band gap reference. When this selection is made and a conversion is initiated, the ADC output should be approximately midscale. After power-up the default channel selection is DB2 = DB1
= DB0 = 0 (Temperature Sensor).
Table I. Channel Selection
Relative Accuracy
Relative accuracy or endpoint nonlinearity is the maximum
deviation from a straight line passing through the endpoints of
the ADC transfer function.
DB2
DB1
DB0
Channel Selection
Device
0
0
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Temperature Sensor
Channel 1
Channel 2
Channel 3
Channel 4
Internal Ref (1.23 V)
All
AD7817/18
AD7817
AD7817
AD7817
All
Over-Temperature Register
Differential Nonlinearity
If any of the five MSBs of the control byte are logic one then the
entire eight bits of the control byte are transferred to the OverTemperature Register—see Figure 4. At the end of a temperature conversion a digital comparison is carried out between the
This is the difference between the measured and the ideal
1␣ LSB change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (0000 . . . 000)
to (0000 . . . 001) from the ideal, i.e., AGND + 1 LSB.
DB2
DB1
DB0
ADDRESS REGISTER
Offset Error Match
IF DB7 TO DB3 ARE LOGIC '0'
THEN DB2 TO DB0 ARE WRITTEN
TO THE ADDRESS REGISTER
This is the difference in Offset Error between any two channels.
Gain Error
This is the deviation of the last code transition (1111 . . . 110) to
(1111 . . . 111) from the ideal, i.e., VREF – 1 LSB, after the
offset error has been adjusted out.
LSB
MSB
DB7
Gain Error Match
DB6
DB5
DB4
DB3
DB2
DB1
DB0
CONTROL BYTE
DB0
OVER-TEMPERATURE
REGISTER (OTR)
IF ANY BIT DB7 TO DB3 IS SET TO
A LOGIC '1' THEN THE FULL 8 BITS
OF THE CONTROL WORD ARE WRITTEN
TO THE OVER-TEMPERATURE REGISTER
This is the difference in Gain Error between any two channels.
Track/Hold Acquisition Time
Track/hold acquisition time is the time required for the output
of the track/hold amplifier to reach its final value, within
± 1/2 LSB, after the end of conversion (the point at which the
track/hold returns to track mode). It also applies to situations
where a change in the selected input channel takes place or
where there is a step input change on the input voltage applied
to the selected VIN input of the AD7817 or AD7818. It means
that the user must wait for the duration of the track/hold acquisition time after the end of conversion or after a channel change/
step input change to VIN before starting another conversion, to
ensure that the part operates to specification.
CONTROL BYTE
The AD7816, AD7817 and AD7818 contain two on-chip registers, the Address Register and the Over-Temperature Register.
These registers can be accessed by carrying out an 8-bit serial
write operation to the devices. The 8-bit word or control byte
written to the AD7816, AD7817 and AD7818 is transferred to
one of the two on-chip registers as follows.
REV. A
DB7
DB6
DB5
DB4
DB3
DB2
DB1
Figure 4. Address and Over-Temperature Register Selection
8 MSBs of the temperature conversion result (10 bits) and the
contents of the Over-Temperature Register (8 bits). If the result
of the temperature conversion is greater that the contents of the
Over-Temperature Register (OTR), then the Over-Temperature
Indicator (OTI) goes logic low. The resolution of the OTR is
1°C. The lowest temperature that can be written to the OTR is
–95°C and the highest is +152°C—see Figure 5. However, the
usable temperature range of the temperature sensor is –55°C to
+125°C. Figure 5 shows the OTR and how to set TALARM (the
temperature at which the OTI goes low).
OTR (Dec) = TALARM (°C) + 103° C
For example, to set TALARM to 50°C, OTR = 50 + 103 = 153
Dec or 10011001 Bin. If the result of a temperature conversion
exceeds 50°C then OTI will go logic low. The OTI logic output
is reset high at the end of a serial read operation or if a new
temperature measurement is lower than TALARM. The default
power on TALARM is 50°C.
–9–
AD7816/AD7817/AD7818
OVER-TEMPERATURE REGISTER
LSB
MSB
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
1
0
1
0
1
0
1
1
1
0
1
0
1
0
1
MINIMUM TEMPERATURE = –95°C
MAXIMUM TEMPERATURE = +152°C
OVER-TEMPERATURE REGISTER (DEC) = TALARM + 1038C
TALARM RESOLUTION = 18/ LSB
Figure 5. The Over-Temperature Register (OTR)
CIRCUIT INFORMATION
The AD7817 and AD7818 are single- and four-channel, 9 µs
conversion time, 10-bit A/D converters with on-chip temperature sensor, reference and serial interface logic functions on a
single chip. The AD7816 has no analog input channel and is
intended for temperature measurement only. The A/D converter
section consists of a conventional successive-approximation
converter based around a capacitor DAC. The AD7816,
AD7817 and AD7818 are capable of running on a +2.7 V to
+5.5 V power supply and the AD7817 and AD7818 accept an
analog input range of 0 V to +VREF. The on-chip temperature
sensor allows an accurate measurement of the ambient device
temperature to be made. The working measurement range of
the Temperature Sensor is –55°C to +125°C. The part requires
a +2.5 V reference, which can be provided from the part’s own
internal reference or from an external reference source. The onchip reference is selected by connecting the REFIN pin to analog
ground.
TYPICAL CONNECTION DIAGRAM
Figure 6 shows a typical connection diagram for the AD7817.
The AGND and DGND are connected together at the device
for good noise suppression. The BUSY line is used to interrupt
the microcontroller at the end of the conversion process and the
serial interface is implemented using three wires—see Serial
Interface section for more details. An external 2.5 V reference
can be connected at the REFIN pin. If an external reference is
used, a 10 µF capacitor should be connected between REFIN
and AGND. For applications where power consumption is of
concern, the automatic power-down at the end of a conversion
should be used to improve power performance. See PowerDown section of the data sheet.
SUPPLY
+2.7V TO
+5.5V
0V TO 2.5V
INPUT
Conversion is initiated by pulsing the CONVST input. The
conversion clock for the part is internally generated so no external clock is required except when reading from and writing to
the serial port. The on-chip track/hold goes from track-to-hold
mode and the conversion sequence is started on the falling edge
of the CONVST signal. At this point the BUSY signal goes high
and low again 9 µs or 27 µs later (depending on whether an
analog input or the temperature sensor is selected) to indicate
the end of the conversion process. This signal can be used by a
microcontroller to determine when the result of the conversion
should be read. The track/hold acquisition time of the AD7817
and AD7818 is 400 ns.
A temperature measurement is made by selecting the Channel 0
of the on-chip MUX and carrying out a conversion on this
channel. A conversion on Channel 0 takes 27 µs to complete.
Temperature measurement is explained in the Temperature
Measurement section of this data sheet.
The on-chip reference is not available to the user, but REFIN
can be overdriven by an external reference source (+2.5 V only).
The effect of reference tolerances on temperature measurements
is discussed in the section titled Temperature Measurement
Error Due to Reference Error.
THREE-WIRE
SERIAL
INTERFACE
0.1mF
VDD
CONVERTER DETAILS
All unused analog inputs should be tied to a voltage within the
nominal analog input range to avoid noise pickup. For minimum power consumption, the unused analog inputs should be
tied to AGND.
10mF
SCLK
RD/WR
DOUT
AIN1
AIN2
AIN3
AIN4
DIN
mC/mP
AD7817
AGND
DGND
CONVST
BUSY
OTI
REFIN
OPTIONAL
EXTERNAL
REFERENCE
AD780/
REF-192
CS
10mF
EXTERNAL
REFERENCE
Figure 6. Typical Connection Diagram
ANALOG INPUTS
Analog Input
Figure 7 shows an equivalent circuit of the analog input structure of the AD7817 and AD7818. The two diodes D1 and D2
provide ESD protection for the analog inputs. Care must be
taken to ensure that the analog input signal never exceeds the
supply rails by more than 200 mV. This will cause these diodes
to become forward biased and start conducting current into the
substrate. The maximum current these diodes can conduct
without causing irreversibly damage to the part is 20 mA. The
capacitor C2 in Figure 7 is typically about 4 pF and can mostly
be attributed to pin capacitance. The resistor R1 is a lumped
component made up of the on resistance of a multiplexer and a
switch. This resistor is typically about 1 kΩ. The capacitor C1 is
the ADC sampling capacitor and has a capacitance of 3 pF.
–10–
REV. A
AD7816/AD7817/AD7818
REFIN
VDD
D1
R1
1kV
C1
3pF
EXTERNAL
REFERENCE
DETECT
1.2V
AIN
VBALANCE
C2
4pF
SW1
D2
1.2V
CONVERT PHASE - SWITCH OPEN
TRACK PHASE - SWITCH CLOSED
26k
BUFFER
2.5V
Figure 7. Equivalent Analog Input Circuit
24k
DC Acquisition Time
The ADC starts a new acquisition phase at the end of a conversion and ends on the falling edge of the CONVST signal. At the
end of a conversion a settling time is associated with the sampling circuit. This settling time lasts approximately 100 ns. The
analog signal on VIN + is also being acquired during this settling
time. Therefore, the minimum acquisition time needed is approximately 100 ns.
Figure 8 shows the equivalent charging circuit for the sampling
capacitor when the ADC is in its acquisition phase. R2 represents the source impedance of a buffer amplifier or resistive
network, R1 is an internal multiplexer resistance and C1 is the
sampling capacitor.
Figure 9. On-Chip Reference
ADC TRANSFER FUNCTION
The output coding of the AD7816, AD7817 and AD7818 is
straight binary . The designed code transitions occur at successive integer LSB values (i.e., 1 LSB, 2 LSBs, etc.). The LSB
size is = +2.5 V/1024 = 2.44 mV. The ideal transfer characteristic shown in Figure 10 below.
111...111
111...110
VIN
R1
1k
ADC CODE
R2
C1
3pF
Figure 8. Equivalent Sampling Circuit
111...000
1LSB=2.5/1024
2.44mV
011...111
000...010
000...001
During the acquisition phase the sampling capacitor must be
charged to within a 1/2 LSB of its final value. The time it takes
to charge the sampling capacitor (TCHARGE) is given by the
following formula:
000...000
1LSB
0V
+2.5V•1LSB
ANALOG INPUT
Figure 10. ADC Transfer Function
TCHARGE = 7.6 × (R2 + 1 kΩ) × 3 pF
TEMPERATURE MEASUREMENT
For small values of source impedance, the settling time associated with the sampling circuit (100 ns) is, in effect, the acquisition time of the ADC. For example with a source impedance
(R2) of 10 Ω the charge time for the sampling capacitor is approximately 23 ns. The charge time becomes significant for
source impedances of 1 kΩ and greater.
The on-chip temperature sensor can be accessed via multiplexer
Channel 0, i.e., by writing 0 0 0 to the Channel Address Register. The temperature is also the power on default selection. The
transfer characteristic of the temperature sensor is shown in
Figure 11 below. The result of the 10-bit conversion on Channel 0 can be converted to degrees centigrade by using the following equation.
In ac applications it is recommended to always buffer analog
input signals. The source impedance of the drive circuitry must
be kept as low as possible to minimize the acquisition time of
the ADC. Large values of source impedance will cause the THD
to degrade at high throughput rates.
ON-CHIP REFERENCE
The AD7816, AD7817 and AD7818 have an on-chip +1.2 V
bandgap reference that is gained up to give an output of +2.5 V.
The on-chip reference is selected by connecting the REFIN pin
to analog ground. This causes SW1 (see Figure 9) to open and
the reference amplifier to power up during a conversion. Therefore the on-chip reference is not available externally. An external +2.5 V reference can be connected to the REFIN pin.
This has the effect of shutting down the on-chip reference circuitry and reducing IDD by about 0.25 mA.
REV. A
–11–
TAMB = –103°C + (ADC Code/4)
125°C
TEMPERATURE
AC Acquisition Time
–55°C
192Dec
ADC CODE
912Dec
Figure 11. Temperature Sensor Transfer Characteristic
AD7816/AD7817/AD7818
For example, if the result of a conversion on Channel 0 was
1000000000 (512 Dec), the ambient temperature is equal to
–103°C + (512/4) = +25°C.
after 30 sec. The PCB has little influence on the self-heating
over the first few seconds after the heater is turned on. This can
be more clearly seen in Figure 13 where the heater is switched
off after 2 seconds. Figure 14 shows the relative effects of selfheating in air, fluid and in thermal contact with a large heat
sink.
Table II below shows some ADC codes for various temperatures.
Table II. Temperature Sensor Output
ADC Code
Temperature
00 1100 0000
01 0011 1000
01 1001 1100
10 0000 0000
10 0111 1000
11 1001 0000
–55°C
–25°C
0°C
+25°C
+55°C
+125°C
These diagrams represent the worst case effects of self-heating.
The heater delivered 6 mW to the interior of the package in all
cases. This power level is equivalent to the ADC continuously
converting at 100 kSPS. The effects of the self-heating can be
reduced at lower ADC throughput rates by operating on Mode
2—see Operating Modes section. When operating in this mode,
the on-chip power dissipation reduces dramatically and, as a
consequence, the self-heating effects.
0.50
TEMPERATURE MEASUREMENT ERROR DUE TO
REFERENCE ERROR
2-LAYER PCB
0.45
CODE (Dec) = ([113.3285 × K × T]/[q × VREF] – 0.6646) × 1024
where K = Boltzmann’s Constant, 1.38 × 10–23
q = Charge on an electron, 1.6 × 10–19
T = Temperature (K)
0.40
0.35
TEMPERATURE – 8C
The AD7816, AD7817 and AD7818 are trimmed using a precision +2.5 V reference to give the transfer function described
previously. To show the effect of the reference tolerance on a
temperature reading, the temperature sensor transfer function
can be rewritten as a function of the reference voltage and the
temperature.
0.30
0.25
0.20
4-LAYER PCB
0.15
0.10
0.05
0.00
–0.05
0
10
20
30
40
TIME – secs
So, for example, to calculate the ADC code at 25°C
CODE = ([113.3285 × 298 × 1.38 × 10–23 ]/[1.6 × 10–19 × 2.5]
– 0.6646) × 1024
50
60
Figure 12. Self-Heating Effect Two-Layer and
Four-Layer PCB
= 511.5 (200 Hex)
0.25
As can be seen from the expression, a reference error will produce a gain error. This means that the temperature measurement error due to reference error will be greater at higher
temperatures. For example, with a reference error of –1%, the
measurement error at –55°C would be +2.2 LSBs (0.5°C) and
+16 LSBs (4°C) at +125°C.
SELF-HEATING CONSIDERATIONS
The AD7817 and AD7818 have an analog-to-digital conversion
function capable of a throughput rate of 100 kSPS. At this
throughput rate the AD7817 and AD7818 will consume between 4 mW and 6.5 mW of power. Because a thermal impedance is associated with the IC package, the temperature of the
die will rise as a result of this power dissipation. The graphs
below show the self-heating effect in a 16-lead SOIC package.
Figures 12 and 13 show the self-heating effect on a two-layer
and four-layer PCB. The plots were generated by assembling a
heater (resistor) and temperature sensor (diode) in the package
being evaluated. In Figure 12, the heater (6 mW) is turned off
–12–
TEMPERATURE – 8C
0.20
0.15
0.10
2-LAYER PCB
4-LAYER PCB
0.05
0.00
–0.05
0
1
2
3
TIME – secs
4
5
Figure 13. Self-Heating Effect Two-Layer and
Four-Layer PCB
REV. A
AD7816/AD7817/AD7818
OPERATING MODES
0.8
The AD7816, AD7817 and AD7818 have two possible modes
of operation depending on the state of the CONVST pulse at
the end of a conversion.
0.7
TEMPERATURE – 8C
0.6
AIR
0.5
Mode 1
In this mode of operation the CONVST pulse is brought high
before the end of a conversion, i.e., before the BUSY goes low
(see Figure 16). When operating in this mode a new conversion
should not be initiated until 100 ns after the end of a serial read
operation. This quiet time is to allow the track/hold to accurately acquire the input signal after a serial read.
0.4
FLUID
0.3
0.2
HEATSINK
0.1
0.0
–0.01
0
2
4
6
10
8
TIME – secs
14
12
Mode 2
16
When the AD7816, AD7817 and AD7818 are operated in Mode 2
(see Figure 17), they automatically power down at the end of a
conversion. The CONVST is brought low to initiate a conversion and is left logic low until after the end of the conversion.
At this point, i.e., when BUSY goes low, the devices will powerdown. The devices are powered up again on the rising edge of
the CONVST signal. Superior power performance can be
achieved in this mode of operation by powering up the AD7816,
AD7817 and AD7818 only to carry out a conversion (see Power
vs. Throughput section).
Figure 14. Self-Heating Effect in Air, Fluid and in Thermal
Contact with a Heatsink
0.25
0.20
FLUID
TEMPERATURE – 8C
AIR
0.15
HEATSINK
0.10
0.05
0.00
–0.05
0.0
0.5
1.0
TIME – secs
1.5
2.0
Figure 15. Self-Heating Effect in Air, Fluid and in Thermal
Contact with a Heatsink
t1
t2
CONVST
t3
BUSY
t17
CS
t15
t16
OTI
RD/ WR
SCLK
DIN
DB0 – DB7
DB0 - DB7(DB9)
DOUT
Figure 16. Mode 1 Operation
REV. A
–13–
AD7816/AD7817/AD7818
t POWER-UP
t1
CONVST
t3
BUSY
CS
t15
OTI
t16
RD/ WR
SCLK
DIN
DB0 – DB7
DB0 – DB7(DB9)
DOUT
Figure 17. Mode 2 Operation
POWER VS. THROUGHPUT
10
Superior power performance can be achieved by using the Automatic Power-Down (Mode 2) at the end of a conversion—see
Operating Modes section of the data sheet.
POWER – mW
1
t POWER-UP t CONVERT
2ms
8ms
CONVST
0.1
BUSY
t CYCLE
100ms @ 10kSPS
0.01
0
Figure 18. Automatic Power-Down
Figure 18 shows how the Automatic Power-Down is implemented to achieve the optimum power performance from the
AD7816, AD7817 and AD7818. The devices are operated in
Mode 2 and the duration of CONVST pulse is set to be equal to
the power-up time (2 µs). As the throughput rate of the device is
reduced the device remains in its power-down state longer, and
the average power consumption over time drops accordingly.
For example, if the AD7817 is operated in a continuous sampling mode with a throughput rate of 10 kSPS, the power consumption is calculated as follows. The power dissipation during
normal operation is 6 mW, VDD = 3 V. If the power up time is
2 µs and the conversion time is 9 µs, the AD7817 can be said to
dissipate 6 mW typically for 11 µs (worst case) during each
conversion cycle. If the throughput rate is 10 kSPS, the cycle
time is 100 µs and the power dissipated during each cycle is
(11/100) × (6 mW) = 600 µW typ.
10
20
30
40
50
THROUGHPUT – kHz
60
70
80
Figure 19. Power vs. Throughput Rate
AD7817 SERIAL INTERFACE
The serial interface on the AD7817 is a five-wire interface with
read and write capabilities, with data being read from the output
register via the DOUT line and data being written to the control
register via the DIN line. The part operates in a slave mode and
requires an externally applied serial clock to the SCLK input to
access data from the data register or write to the control byte.
The RD/WR line is used to determine whether data is being
written to or read from the AD7817. When data is being written
to the AD7817, the RD/WR line is set logic low and when data
is being read from the part the line is set logic high—see Figure
20. The serial interface on the AD7817 is designed to allow the
part to be interfaced to systems that provide a serial clock that is
synchronized to the serial data, such as the 80C51, 87C51,
68HC11, 68HC05 and PIC16Cxx microcontrollers.
–14–
REV. A
AD7816/AD7817/AD7818
CS
t4
t10
RD/WR
t5
SCLK
t11
t8
1
2
3
7
t6
8
1
2
3
9
10
t9
t7
DIN
DB8
DB7
DB6
DB1
DB0
t12
CONTROL BYTE
DOUT
t14b
t13
DB9
DB8
t14a
DB7
DB1
DB0
Figure 20. AD7817 Serial Interface Timing Diagram
Read Operation
Figure 20 shows the timing diagram for a serial read from the
AD7817. CS is brought low to enable the serial interface and
RD/WR is set logic high to indicate that the data transfer is a
serial read from the AD7817. The rising edge of RD/WR clocks
out the first data bit (DB9), subsequent bits are clocked out on
the falling edge of SCLK and are valid on the rising edge. Ten
bits of data are transferred during a read operation. However,
the user has the choice of clocking only eight bits if the full ten
bits of the conversion result are not required. The serial data can
be accessed in a number of bytes if ten bits of data are being
read. However, RD/WR must remain high for the duration of
the data transfer operation. Before starting a new data read
operation the RD/WR signal must brought low and high again.
At the end of the read operation, the DOUT line enters a high
impedance state on the rising edge of the CS or the falling edge
of RD/WR, whichever occurs first.
Write Operation
Figure 20 also shows a control byte write operation to the
AD7817. The RD/WR input goes low to indicate to the part
that a serial write is about to occur. The AD7817 control byte
is loaded on the rising edge of the first eight clock cycles of the
serial clock with data on all subsequent clock cycles being ignored. To carry out a second successive write operation, the
RD/WR signal must be brought high and low again.
Simplifying the Serial Interface
To minimize the number of interconnect lines to the AD7817,
the user can connect the CS line to DGND. This is possible if
the AD7817 is not sharing the serial bus with another device. It
is also possible to tie the DIN and D OUT lines together. This
arrangement is compatible with the 8051 microcontroller. The
68HC11, 68HC05 and PIC16Cxx can be configured to operate
with a single serial data line. In this way the number of lines
required to operate the serial interface can be reduced to three,
i.e., RD/WR, SCLK and DIN/OUT —see Figure 6.
AD7816 AND AD7818 SERIAL INTERFACE MODE
The serial interface on the AD7816 and AD7818 is a three-wire
interface with read and write capabilities. Data is read from the
output register and the control byte is written to the AD7816
REV. A
and AD7818 via the DIN/OUT line. The part operates in a slave
mode and requires an externally applied serial clock to the
SCLK input to access data from the data register or write the
control byte. The RD/WR line is used to determine whether
data is being written to or read from the AD7816 and AD7818.
When data is being written to the devices the RD/WR line is set
logic low and when data is being read from the part the line is
set logic high—see Figure 21. The serial interface on the
AD7816 and AD7818 are designed to allow the part to be interfaced to systems that provide a serial clock that is synchronized
to the serial data, such as the 80C51, 87C51, 68HC11, 68HC05
and PIC16Cxx microcontrollers.
Read Operation
Figure 21 shows the timing diagram for a serial read from the
AD7816 and AD7818. The RD/WR is set logic high to indicate
that the data transfer is a serial read from the devices. When
RD/WR is logic high the D IN/OUT pin becomes a logic output
and the first data bit (DB9) appears on the pin. Subsequent bits
are clocked out on the falling edge of SCLK, starting with the
second SCLK falling edge after RD/WR goes high and are valid
on the rising edge of SCLK. Ten bits of data are transferred
during a read operation. However the user has the choice of
clocking only eight bits if the full ten bits of the conversion
result are not required. The serial data can be accessed in a
number of bytes if ten bits of data are being read; however,
RD/WR must remain high for the duration of the data transfer
operation. To carry out a successive read operation the RD/WR
pin must be brought logic low and high again. At the end of the
read operation, the DIN/OUT pin becomes a logic input on the
falling edge of RD/WR.
Write Operation
A control byte write operation to the AD7816 and AD7818 is
also shown in Figure 21. The RD/WR input goes low to indicate
to the part that a serial write is about to occur. The AD7816
and AD7818 control bytes are loaded on the rising edge of the
first eight clock cycles of the serial clock with data on all subsequent clock cycles being ignored. To carry out a successive write
to the AD7816 or AD7818 the RD/WR pin must be brought
logic high and low again.
–15–
AD7816/AD7817/AD7818
RD/WR
1
SCLK
t11
t8
2
3
7
t6
8
t9
DB8
DB1
DB6
DB7
2
3
t12
t7
DIN/DOUT
1
DB0
9
10
t14a
t13
DB9
DB8
DB7
DB1
C3149–0–2/00 (rev. A)
t5
DB0
CONTROL BYTE
Figure 21. AD7816/AD7818 Serial Interface Timing Diagram
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Narrow Body (SOIC)
(R-16A)
16-Lead Thin Shrink Small Outline Package
(TSSOP) (RU-16)
0.201 (5.10)
0.193 (4.90)
0.3937 (10.00)
0.3859 (9.80)
9
1
8
0.2440 (6.20)
0.2284 (5.80)
0.256 (6.50)
0.246 (6.25)
16
9
0.177 (4.50)
0.169 (4.30)
1
0.0688 (1.75)
0.0532 (1.35)
PIN 1
0.0098 (0.25)
0.0040 (0.10)
0.0500
SEATING (1.27)
PLANE BSC
0.0192 (0.49)
0.0138 (0.35)
0.0196 (0.50)
x 45°
0.0099 (0.25)
0.0099 (0.25)
0.0075 (0.19)
8°
0°
8
PIN 1
0.006 (0.15)
0.002 (0.05)
0.0500 (1.27)
0.0160 (0.41)
SEATING
PLANE
0.0433
(1.10)
MAX
0.0256
(0.65)
BSC
0.1968 (5.00)
0.1890 (4.80)
8
5
1
4
8°
0°
0.028 (0.70)
0.020 (0.50)
0.122 (3.10)
0.114 (2.90)
0.2440 (6.20)
0.2284 (5.80)
8
0.0688 (1.75)
0.0532 (1.35)
5
0.199 (5.05)
0.187 (4.75)
0.122 (3.10)
0.114 (2.90)
1
PIN 1
0.0098 (0.25)
0.0040 (0.10)
0.0079 (0.20)
0.0035 (0.090)
8-Lead ␮SOIC Package
(RM-8)
8-Lead Narrow Body (SOIC)
(SO-8)
0.1574 (4.00)
0.1497 (3.80)
0.0118 (0.30)
0.0075 (0.19)
0.0196 (0.50)
x 45°
0.0099 (0.25)
PRINTED IN U.S.A.
0.1574 (4.00)
0.1497 (3.80)
16
4
PIN 1
0.0256 (0.65) BSC
0.0500 0.0192 (0.49)
SEATING (1.27)
0.0098 (0.25)
PLANE BSC 0.0138 (0.35) 0.0075 (0.19)
0.120 (3.05)
0.112 (2.84)
8°
0° 0.0500 (1.27)
0.0160 (0.41)
0.043 (1.09)
0.037 (0.94)
0.006 (0.15)
0.002 (0.05)
SEATING
PLANE
–16–
0.120 (3.05)
0.112 (2.84)
0.018 (0.46)
0.008 (0.20)
0.011 (0.28)
0.003 (0.08)
33°
27°
0.028 (0.71)
0.016 (0.41)
REV. A