PI6C2405A 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero-Delay Clock Buffer Product Features Functional Description • • • • The PI6C2405A is a PLL based, zero-delay buffer, with the ability to distribute five outputs of up to 133MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. Maximum rated frequency: 133 MHz Low cycle-to-cycle jitter Input to output delay, less than 300ps Internal feedback allows outputs to be synchronized to the clock input • 5V tolerant input* • Operates at 3.3V VDD • Packages (Pb-free and Green available): 150-mil SOIC (W) 173-mil TSSOP (L) An internal feedback on OUT0 is used to synchronize the outputs to the input; the relationship between loading of this signal and the outputs determines the input-output delay. PI6C2405A is characterized for both commercial and industrial operation. PI6c2405A-1H is a high-drive version of PI6C2405A-1 * CLKIN must reference the same voltage thresholds for the PLL to deliver zero delay skewing Block Diagram: PI6C2405A CLKIN Pin Configuration: PI6C2405A PLL OUT0 CLKIN 1 OUT1 OUT2 2 OUT1 3 GND 4 OUT2 8-Pin W, L 8 OUT0 7 OUT4 6 VDD 5 OUT3 OUT3 PI6C2405A(–1, –1H) OUT4 Pin Description for PI6C2405A Pin Signal D e s cription 1 C LK IN Input clock reference frequency (weak pull- down) O UT[1- 4] C lock outputs 4 GN D Ground 6 VDD 3.3V supply 8 O UT0 C lock output, internal PLL feedback (weak pull- down) 2, 3, 5, 7 1 PS8592B 10/27/03 PI6C2405A 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay and Skew Control CLKIN Input to OUTx Delay vs. Difference in Loading between OUT0 pin and OUTx pins CLKIN - Input to OUTx Delay (ps) 800 600 400 200 0 -25 -20 -15 -10 0 -5 5 10 15 20 25 -200 -400 PI6C2405A-1H -600 -800 PI6C2405A-1 -900 -1000 Output Load Difference: OUT0 Load - OUTx Load (pF) The relationship between loading of the OUT0 signal and other outputs determines the input-output delay. Zero delay is achieved when all outputs, including feedback, are loaded equally. Maximum Ratings Supply Voltage to Ground Potential ............................................................................................................................. –0.5V to +7.0V DC Input Voltage (Except CLKIN) ........................................................................................................................ –0.5V to VDD +0.5V DC Input Voltage CLKIN ...................................................................................................................................................... –0.5 to 7V Storage Temperature ................................................................................................................................................... –65ºC to +150ºC Maximum Soldering Temperature (10 seconds) ........................................................................................................................... 260ºC Junction Temperature .................................................................................................................................................................. 150ºC Static Discharge Voltage (per MIL-STD-883, Method 3015) .................................................................................................... >2000V Operating Conditions (VCC = 3.3V ±0.3V) Parame te r VDD TA CL CIN De s cription M in. M a x. Units 3.0 3.6 V 0 70 Industrial Operating Temperature –40 85 Load Capacitance, below 100 MHz 30 Load Capacitance, from 100 MHz to 133 MHz 15 Input Capacitance 7 Supply Voltage Commerical Operating Temperature 2 ºC pF PS8592B 10/27/03 PI6C2405A Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics for Industrial Temperature Devices Parame te r De s cription Te s t Conditions M in. M a x. VIL Input LOW Voltage 0.8 VIH Input HIGH Voltage IIL Input LOW Current VIN = 0V 50 IIH Input HIGH Current VIN = VDD 125 VO L Output LOW Voltage IO L = 8mA (–1); IO L = 12mA (–1H) 0.4 VO H Output HIGH Voltage IO H = –8mA (–1); IO H = –12mA (–1H) IDD Supply Current Unloaded outputs 100 MHz, Select inputs at VDD or GND 54 Unloaded outputs 66 MHz, CLKIN 39 Units V 2.0 µA V 2.4 mA AC Electrical Characteristics for Industrial Temperature Devices Parame te rs N ame FO O utput Frequency tDC Duty C ycle(1 ) (–1 ) Duty C ycle(1 ) (–1H) tR Te s t Conditions 30pF load M in. Typ. 100 10 15pF load, M ax. Units 133 Measured at VDD/2, FO UT <66.67MHz 30pF load 40 Measured at VDD/2, FO UT <45MHz 15pF load 45 Measured at VDD/2, FO UT <100MHz 15pF load 40 60 Measured at VDD/2V, FO UT <45MHz 30pF load 45 55 60 50 55 Measured between 0.8V and 2.0V, 30pF load 2.2 Measured between 0.8V and 2.0V, 15pF load 1.5 Rise Time(1 ) (–1H) Measured between 0.8V and 2.0V, 30pF load 1.5 Fall Time(1 ) (–1) Measured between 0.8V and 2.0V, 30pF load 2.2 Measured between 0.8V and 2.0V, 15pF load 1.5 Measured between 0.8V and 2.0V, 30pF load 1.5 O utput to O utput Skew (–1,–1H)(1 ) All outputs equally loaded 200 t0 Delay, C LK IN Rising Edge to O UT0 Rising Edge(1 ) Measured at VDD/2 tS K (D) Device- to- Device Skew(1 ) Measured at VDD/2 on O UT0 pins of devices tF Rise Time(1 ) (–1) Fall tS K (O ) tS LEW tJIT tLO C K Time(1 ) (–1H) O utput Slew Rate(1 ) C ycle- to- C ycle Jitter(1 ) (–1,–1H) PLL Lock Time(1 ) Measured between 0.8V & 2.0V on –1H device using Test C rt #2 MHz 0 ± 300 0 600 1 % ns ps V/ns Measured at 66.67 MHz, loaded 30pF load 200 Measured at 133 MHz, loaded 15pF load 100 Stable power supply, valid clocks presented on C LK IN pin 1.0 ps ms Notes: 1.See Switching Waveforms on page 5. 3 PS8592B 10/27/03 PI6C2405A 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics for Commercial Temperature Devices Parame te r De s cription Te s t Conditions M in. M a x. VIL Input LOW Voltage 0.8 VIH Input HIGH Voltage 2.0 IIL Input LOW Current VIN = 0V 50 IIH Input HIGH Current VIN = VDD 125 VO L Output LOW Voltage IO L = 8mA (–1); IO L = 12mA (–1H) 0.4 VO H Output HIGH Voltage IO H = –8mA (–1); IO H = –12mA (–1H) 2.4 IDD Supply Current Unloaded outputs 100 MHz Select Inputs @ VDD or GND 54 IDD Supply Current Unloaded outputs, 66.67 MHz, Select inputs at VDD or GND 39 Units V µA V mA AC Electrical Characteristics for Commercial Temperature Device Parame te rs FO tDC tR tF tS K (O ) t0 tS K (D) tS LEW tJIT tLO C K N ame O utput Frequency Duty C ycle (–1) Duty C ycle(1) (–1H) Te s t Conditions 30pF load M in. Typ. 10 100 15pF load, 133 Measured at VDD/2, FO < 66MHz, 30pF 40 50 60 Measured at VDD/2, FO< 66MHz, 30pF 45 50 55 Rise Time(1 ) @30pF Rise Time(1 ) @ 15pF Rise Time(1 ) @30pF (–1H) Fall Time(1 ) @ 30pF M ax. Units 1.5 1.5 Measured between 0.8V and 2.0V 2.2 1.5 Fall Time(1 ) 1.5 @30pF (–1H) O utput to O utput (–1,–1H) All outputs equally loaded, VDD/2 Measured at VDD/2 0 ± 300 Device to Device Skew(1 ) Measured at VDD/2 on O UT0 pins of devices 0 600 O utput Slew C ycle- to- C ycle Jitter (–1,–1H) PLL Lock Time Measured between 0.8V and 2.0V on –1H device using Test C ircuit #2 ns 200 Input to O utput Delay, C LK IN Rising Edge to O UT0 Rising Edge(1 ) Rate(1 ) % 2.2 Fall Time(1 ) @15pF Skew(1 ) MHz 1 ps V/ns Measured at 66.67 MHz, loaded 30pF outputs 200 Measured at 133 MHz, loaded 15pF outputs 100 Stable power supply, valid clocks presented on C LK IN pins 1.0 ps ms Notes: 1. See Switching Waveforms on page 5 4 PS8592B 10/27/03 PI6C2405A Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Waveforms thigh Duty Cycle Timing VDD/2 tlow VDD/2 tDC = thigh thigh+tlow VDD/2 All Outputs Rise/Fall Time OUTPUT Output-Output Skew OUTPUT 2.0V 0.8V tR 3.3V 2.0V 0.8V tF 0V VDD/2 VDD/2 OUTPUT tSK(O) Device-Device Skew OUTPUT Device 1 VDD/2 VDD/2 OUTPUT Device 2 tSK(D) Input-Output Propagation Delay INPUT VDD/2 VDD/2 OUTPUT t0 Test Circuit 1 0.1µF Test Circuit 2 0.1µF VDD OUTPUTS CLK out VDD 1kΩ CLOAD 0.1µF VDD GND CLK out OUTPUTS 0.1µF GND GND 1kΩ VDD 10pF GND Test Circuit for tSLEW ,Output slew rate on –1H device Test Circuit for all parameters except tSLEW 5 PS8592B 10/27/03 PI6C2405A 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Packaging Mechanical: 8-Pin SOIC (W) 8 .149 .157 3.78 3.99 .0099 .0196 1 .189 .196 .016 .026 0.406 0.660 0.25 x 45˚ 0.50 .0075 .0098 0-8˚ 4.80 5.00 0.19 0.25 0.40 .016 1.27 .050 .053 .068 1.35 1.75 SEATING PLANE REF .050 BSC 1.27 .2284 .2440 5.80 6.20 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Packaging Mechanical: 8-Pin TSSOP (L) 6 PS8592B 10/27/03 PI6C2405A Zero Delay Clock Buffer 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Ordering Information PI6C2405 Orde ring Code Package ing Code Package Type PI6C2405A- 1W W 8- pin 150- mil SOIC PI6C2405A- 1HW W 8- pin 150- mil SOIC PI6C2405A- 1L L 8- pin 173- mil TSSOP PI6C2405A- 1HL L 8- pin 173- mil TTSSOP PI6C2405A- 1WE W Pb- free and Green, 8- pin 150- mil SOIC PI6C2405A- 1HWE W Pb- free and Green, 8- pin 150- mil SOIC PI6C2405A- 1LE L Pb- free and Green, 8- pin 173- mil TSSOP PI6C2405A- 1HLE L Pb- free and Green, 8- pin 173- mil TSSOP PI6C2405A- 1WI W 8- pin 150- mil SOIC PI6C2405A- 1HWI W 8- pin 150- mil SOIC PI6C2405A- 1LI L 8- pin 173- mil TTSSOP PI6C2405A- 1HLI L 8- pin 173- mil TTSSOP PI6C2405A- 1WIE W Pb- free and Green, 8- pin 150- mil SOIC PI6C2405A- 1HWIE W Pb- free and Green, 8- pin 150- mil SOIC PI6C2405A- 1LIE L Pb- free and Green, 8- pin 173- mil TTSSOP PI6C2405A- 1HLIE L Pb- free and Green, 8- pin 173- mil TTSSOP Ope rating Range Commercial Industrial Notes: 1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/ 2. X = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • http://www.pericom.com 7 PS8592B 10/27/03