PI6C2405A Zero-Delay Clock Buffer Features Description • Maximum rated frequency: 133 MHz • Low cycle-to-cycle jitter • Input to output delay, less than 300ps • Internal feedback allows outputs to be synchronized to the clock input • 5V tolerant input* • Spread spectrum clock ready • Operates at 3.3V VDD • Packaging (Pb-free & Green available): -8-pin, 150-mil SOIC (W) -8-pin, 173-mil TSSOP (L) The PI6C2405A is a PLL based, zero-delay buffer, with the ability to distribute five outputs of up to 133MHz at 3.3V. All the outputs are distributed from a single clock input CLKIN and output OUT0 performs zero delay by connecting a feedback to PLL. An internal feedback on OUT0 is used to synchronize the outputs to the input; the relationship between loading of this signal and the outputs determines the input-output delay. PI6C2405A is able to track spread spectrum clocking for EMI reduction. PI6C2405A is characterized for both commercial and industrial operation. PI6C2405A-1H is a high-drive version of PI6C2405A-1 * CLKIN must reference the same voltage thresholds for the PLL to deliver zero delay skewing Block Diagram Pin Configuration PLL CLKIN OUT0 CLKIN 1 8 OUT0 OUT1 OUT2 2 7 OUT4 OUT1 3 6 VDD GND 4 5 OUT3 OUT2 OUT3 PI6C2405A(–1, –1H) OUT4 Pin Description Pin Signal Description 1 CLKIN Input clock reference frequency (weak pull-down) 2, 3, 5, 7 OUT[1-4] Clock Outputs 4 GND Ground 6 VDD 3.3V Supply 8 OUT0 Clockoutput, internal PLL feedback (weak pull-down) 11-0001 1 PS8592I 04/29/10 PI6C2405A Zero Delay Clock Buffer Zero Delay and Skew Control CLKIN Input to OUTx Delay vs. Difference in Loading between OUT0 pin and OUTx pins CLKIN - Input to OUTx Delay (ps) 800 600 400 200 0 -200 -25 -20 -15 -10 0 -5 5 10 15 -400 20 25 PI6C2405A-1H -600 -800 PI6C2405A-1 -900 -1000 Output Load Difference: OUT0 Load - OUTx Load (pF) The relationship between loading of the OUT0 signal and other outputs determines the input-output delay. Zero delay is achieved when all outputs, including feedback, are loaded equally. Maximum Ratings Supply Voltage to Ground Potential.............................................................................................................................. –0.5V to +7.0V DC Input Voltage (Except CLKIN).......................................................................................................................–0.5V to VDD +0.5V DC Input Voltage CLKIN..................................................................................................................................................... –0.5 to 7V Storage Temperature................................................................................................................................................... –65ºC to +150ºC Maximum Soldering Temperature (10 seconds).......................................................................................................................... 260ºC Junction Temperature................................................................................................................................................................... 150ºC Static Discharge Voltage (per MIL-STD-883, Method 3015)................................................................................................... >2000V Operating Conditions (VCC = 3.3V ±0.3V) Parameter VDD TA CL CIN 11-0001 Description Supply Voltage Commerical Operating Temperature Industrial Operating Temperature Min. Max. Units 3.0 3.6 V 0 70 -40 85 Load Capacitance, below 100 MHz 30 Load Capacitance, from 100 MHz to 133 15 Input Capacitance 7 2 °C pF PS8592I 04/29/10 PI6C2405A Zero Delay Clock Buffer DC Electrical Characteristics for Industrial Temperature Devices Parameter Description Test Conditions Min. Max. VIL Input LOW Voltage VIH Input HIGH Voltage IIL Input LOW Current VIN = 0V 50 IIH Input HIGH Current VIN = VDD 125 VOL Output LOW Voltage IOL = -8mA(-1); IOL = 12mA(-1H) 0.4 VOH Output HIGH Voltage IOH = -8mA(-1); IOH = -12mA(-1H) IDD Supply Current 0.8 2.0 2.4 Unloaded outputs 100 MHz, Select inputs at VDD or GND 54 Unloaded outputs 66 MHz, CLKIN 39 Units V µA V mA AC Electrical Characteristics for Industrial Temperature Devices Parameter FO Description Output Frequency Duty Cycle(1) (-1) tDC Duty Cycle(1) (-1H) Rise Time(1)(-1) tR Rise Time(1)(-1H) Fall Time(1)(-1) Test Conditions Min. Typ. Max. 30pF load 10 100 15pF load 10 133 Measured at VDD/2, FOUT < 66.67MHz, 30pF load 40 60 Measured at VDD/2, FOUT < 45MHz 15pF load 45 Measured at VDD/2, FOUT < 100MHz 15pF load 40 Measured at VDD/2, FOUT < 45MHz 30pF load 45 50 55 60 Units MHz % 55 Measured between 0.8V and 2.0V, 30pF load 2.2 Measured between 0.8V and 2.0V, 15pF load 1.5 Measured between 0.8V and 2.0V, 30pF load 1.7 Measured between 0.8V and 2.0V, 30pF load 2.2 ns Measured between 0.8V and 2.0V, 15pF load 1.5 Fall Time(1)(-1H) Measured between 0.8V and 2.0V, 30pF load 1.5 Output to Output skew (-1, -1H)(1) All outputs equally loaded 200 Delay, CLKIN Rising Edge to OUT0 Rising Edge(1) Measured at VDD/2 0 ±300 tSK(D) Device-to-device skew(1) Measured at VDD/2 on OUT0 pins of device 0 600 tSLEW Output slew rate (1) Measured between 0.8V and 2.0V on -1H device using Test Circuit #2 Cycle-to-Cycle Jitter (-1, -1H) Measured at 66.67 MHz, loaded 30pF load 200 ps PLL Lock time (1) Stable power supply, valid clocks presented on CLKIN pin 1.0 ms tF tsk(o) t0 tJIT tLOCK 1 ps V/ns Notes: 1. See Switching Waveforms on page 5. 11-0001 3 PS8592I 04/29/10 PI6C2405A Zero Delay Clock Buffer DC Electrical Characteristics for Commercial Temperature Devices Parameter Description Test Conditions Min. Max. VIL Input LOW Voltage VIH Input HIGH Voltage IIL Input LOW Current VIN = 0V 50 IIH Input HIGH Current VIN = VDD 125 VOL Output LOW Voltage IOL = -8mA(-1); IOL = 12mA(-1H) 0.4 VOH Output HIGH Voltage IOH = -8mA(-1); IOH = -12mA(-1H) IDD Supply Current 0.8 2.0 2.4 Unloaded outputs 100 MHz, Select inputs at VDD or GND 54 Unloaded outputs 66.67 MHz, select inputs at VDD or GND 39 Units V µA V mA AC Electrical Characteristics for Commercial Temperature Devices Parameter FO tDC Description Output Frequency Duty Cycle(1) (-1) Duty Cycle(1) (-1H) Rise Time(1) @ 30pF tR t0 tSK(D) tSLEW tJIT tLOCK Typ. Max. 30pF load 10 100 15pF load 10 133 Measured at VDD/2, FO < 66 MHz, 30pF load 40 50 60 Measured at VDD/2, FO < 66 MHz, 30pF load 45 50 55 Units MHz % 2.2 15pF Rise Time(1) @ 30pF (-1H) 1.5 Fall Time(1) @ 30pF 2.2 Fall Time(1) @ tsk(o) Min. Rise Time(1) @ Fall Time(1) @ 15pF tF Test Conditions Measured between 0.8V and 2.0V 1.5 Measured between 0.8V and 2.0V ns 1.5 30pF (-1H) 1.5 Output to Output skew (-1, -1H)(1) All outputs equally loaded Input to output delay, CLKIN Rising Edge to OUT0 Rising Edge(1) Measured at VDD/2 0 ±300 Device-to-device skew(1) Measured at VDD/2 on OUT0 pins of device 0 600 Output slew rate (1) Measured between 0.8V and 2.0V on -1H device using Test Circuit #2 Cycle-to-Cycle Jitter (-1, -1H) Measured at 66.67 MHz, loaded 30pF load 200 ps PLL Lock time (1) Stable power supply, valid clocks presented on CLKIN pin 1.0 ms 200 1 ps V/ns Notes: 1. See Switching Waveforms on page 5. 11-0001 4 PS8592I 04/29/10 PI6C2405A Zero Delay Clock Buffer Switching Waveforms thigh Duty Cycle Timing VDD/2 tlow VDD/2 All Outputs Rise/Fall Time Output-Output Skew OUTPUT 2.0V 0.8V tR OUTPUT VDD/2 thigh tDC = VDD/2 thigh+tlow 3.3V 2.0V 0.8V tF 0V VDD/2 OUTPUT tSK(O) Device-Device Skew VDD/2 OUTPUT Device 1 VDD/2 OUTPUT Device 2 tSK(D) Input-Output Propagation Delay INPUT VDD/2 VDD/2 OUTPUT t0 Test Circuit 1 0.1µF 0.1µF VDD OUTPUTS 0.1µF Test Circuit 2 0.1µF 1kΩ CLK out 1kΩ VDD GND GND 10pF GND Test Circuit for tSLEW ,Output slew rate on –1H device Test Circuit for all parameters except tSLEW 11-0001 VDD OUTPUTS CLOAD VDD GND CLK out 5 PS8592I 04/29/10 PI6C2405A Zero Delay Clock Buffer Packaging Mechanical: 8-Pin SOIC (W) DOCUMENT CONTROL NO. 8 PD - 1001 REVISION: F .149 .157 DATE: 03/09/05 3.78 3.99 .0099 .0196 0.25 x 45˚ 0.50 1 .189 .196 4.80 5.00 .0075 .0098 0-8˚ 0.19 0.25 0.40 .016 1.27 .050 1 .016 .026 0.406 0.660 .2284 .2440 5.80 6.20 1.35 1.75 .053 .068 SEATING PLANE REF .050 BSC 1.27 .0040 0.10 .0098 0.25 .013 0.330 .020 0.508 Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 • www.pericom.com X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Notes: 1) Controlling dimensions in millimeters. 2) Ref: JEDEC MS-012D/AA 11-0001 DESCRIPTION: 8-Pin, 150-Mil Wide, SOIC PACKAGE CODE: W 6 PS8592I 04/29/10 PI6C2405A Zero Delay Clock Buffer Packaging Mechanical: 8-Pin TSSOP (L) DOCUMENT CONTROL NO. PD - 1308 REVISION: E DATE: 11/15/05 1 Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 • www.pericom.com Note: 1. Package Outline Exclusive of Mold Flash and Metal Burr 2. Controlling dimentions in millimeters 3. Ref: JEDEC MO-153F/AA DESCRIPTION: 8-Pin, 173-Mil Wide, TSSOP PACKAGE CODE: L 11-0001 7 PS8592I 04/29/10 PI6C2405A Zero Delay Clock Buffer Ordering Information for Commercial Operating Ranges Ordering Code Package Code Package Description PI6C2405A-1HWE W Pb-free & Green, 8-pin 150-mil SOIC PI6C2405A-1LE L Pb-free & Green, 8-pin 173-mil TSSOP PI6C2405A-1HLE L Pb-free & Green, 8-pin 173-mil TSSOP Ordering Information for Industrial Operating Ranges Ordering Code Package Code Package Description PI6C2405A-1HWIE W Pb-free & Green, 8-pin 150-mil SOIC PI6C2405A-1LIE L Pb-free & Green, 8-pin 173-mil TSSOP PI6C2405A-1HLIE L Pb-free & Green, 8-pin 173-mil TSSOP Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. X = Tape/Reel 3. E = Pb-free & Green Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 11-0001 8 PS8592I 04/29/10