UC1572 UC2572 UC3572 Negative Output Flyback Pulse Width Modulator FEATURES DESCRIPTION • Simple Single Inductor Flyback PWM for Negative Voltage Generation • Drives External PMOS Switch • Contains UVLO Circuit • Includes Pulse-by-Pulse Current Limit • Low 50µA Sleep Mode Current The UC3572 is a negative output flyback pulse width modulator which converts a positive input voltage to a regulated negative output voltage. The chip is optimized for use in a single inductor negative flyback switching converter employing an external PMOS switch. The block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with latching logic, and a 0.5A peak gate driver. The UC3572 includes an undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current limit. Output current can be sensed and limited to a user determined maximum value. The UVLO circuit turns the chip off when the input voltage is below the UVLO threshold.In addition, a sleep comparator interfaces to the UVLO circuit to turn the chip off. This reduces the supply current to only 50µA, making the UC3572 ideal for battery powered applications. BLOCK DIAGRAM UDG-94094-2 9/96 UC1572 UC2572 UC3572 ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35V EAINV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.6V to VCC IEAOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25mA RAMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.3V to 4V CS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.3V to VCC IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−0.7A to 0.7A I3VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .−15mA Storage Temperature . . . . . . . . . . . . . . . . . . . .−65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . .−65°C to +150°C Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . .+300°C Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. DIL-8, SOIC-8 (TOP VIEW) J or N, D Packages ELECTRICAL CHARACTERISTICS Unless otherwise stated, these parameters apply for TA = – 55°C to +125°C for the UC1572, – 40°C to +85°C for the UC2572, and 0°C to +70°C for the UC3572, VCC = 5V, CT = 680pF, TA = TJ. PARAMETER Reference Section 3VREF Line Regulation Load Regulation Oscillator Section Frequency Error Amp Section EAINV IEAINV AVOL EAOUT High EAOUT Low IEAOUT Unity Gain Bandwidth Current Sense Comparator Section Threshold Input Bias Current CS Propagation Delay Gate Drive Output Section OUT High Saturation OUT Low Saturation Rise Time Fall Time Pulse Width Modulator Section Maximum Duty Cycle Minimum Duty Cycle Modulator Gain TEST CONDITION MIN TYP 2.94 3 1 1 3.06 10 10 V mV mV VCC = 5V to 30V 85 100 115 kHz EAOUT = 2V IEAINV = −1mA EAOUT = 2V EAOUT = 0.5V to 3V EAINV = −100mV EAINV = 100mV EAINV = −100mV, EAOUT = 2V EAINV = 100mV, EAOUT = 2V TJ = 25°C, F = 10kHz −10 0 −0.2 −0.2 90 4 0.1 −500 20 1 10 −0.9 −1.0 mV V µA dB V V µA mA MHz 0.215 −0.4 300 0.235 −1 V µA ns IOUT = 0 IOUT = −10mA IOUT = −100mA IOUT = 10mA IOUT = 100mA TJ = 25°C, CLOAD = 1nF + 3.3 Ohms TJ = 25°C, CLOAD = 1nF + 3.3 Ohms 0 0.7 1.5 0.1 1.5 30 30 0.3 1.5 2.5 0.4 2.2 80 80 V V V V V ns ns EAINV = +100mV, VCC = 5V to 30V EAINV = −100mV, VCC = 5V to 30V EAOUT = 1.5V to 2.5V 92 96 0 65 % % %/V VCC = 4.75 TO 30V I3VREF = 0V to −5mA 65 3.6 −350 7 0.6 0.195 CS = 0 2 45 55 MAX UNITS 4.4 0.2 UC1572 UC2572 UC3572 ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise stated, these parameters apply for TA = – 55°C to +125°C for the UC1572, – 40°C to +85°C for the UC2572, and 0°C to +70°C for the UC3572, VCC = 5V, CT = 680pF, TA = TJ. PARAMETER Undervoltage Lockout Section Start Threshold Hysteresis Sleep Mode Section Threshold Supply Current Section IVCC TEST CONDITION VCC = 5V, 30V VCC = 30, CS = 3V MIN TYP MAX UNITS 3.5 100 4.2 200 4.7 300 V mV 1.8 2.2 2.6 V 9 50 12 150 mA µA PIN DESCRIPTIONS 3VREF: Precision 3V reference. Bypass with 100nF capacitor to GND. OUT: Gate drive for external PMOS switch connected between VCC and the flyback inductor. OUT drives the gate of the PMOS switch between VCC and GND. CS: Current limit sense pin. Connect to a ground referenced current sense resistor in series with the flyback inductor. OUT will be held high (PMOS switch off) if CS exceeds 0.2V. EAINV: Inverting input to error amplifier. Summing junction for 3VREF and VOUT sense. The non-inverting input of the error amplifier is internally connected to GND. RAMP: Oscillator and ramp for pulse width modulator. Frequency is set by a capacitor to GND by the equation 1 F= 15k CRAMP Recommended operating frequency range is 10kHz to 200kHz. EAOUT: Output of error amplifier. Use EAOUT and EAINV for loop compensation components. VCC: Input voltage supply to chip. Range is 4.75 to 30V. Bypass with a 1µF capacitor. · GND: Circuit Ground. UDG-94095 Typical Waveforms 3 UC1572 UC2572 UC3572 TYPICAL APPLICATION : +5V TO -12V FLYBACK CONVERTER UDG-94096-1 UNITRODE INTEGRATED CIRCUITS 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. 603-424-2410 • FAX 603-424-3460 4