ETC UC3573DTR

UC1573
UC2573
UC3573
Buck Pulse Width Modulator Stepdown Voltage Regulator
FEATURES
DESCRIPTION
• Simple Single Inductor Buck PWM
Stepdown Voltage Regulation
The UC3573 is a Buck pulse width modulator which steps down and regulates a positive input voltage. The chip is optimized for use in a single inductor buck switching converter employing an external PMOS switch. The
block diagram consists of a precision reference, an error amplifier configured for voltage mode operation, an oscillator, a PWM comparator with
latching logic, and a 0.5A peak gate driver. The UC3573 includes an
undervoltage lockout circuit to insure sufficient input supply voltage is present before any switching activity can occur, and a pulse-by-pulse current
limit. Input current can be sensed and limited to a user determined maximum value. In addition, a sleep comparator interfaces to the UVLO circuit
which turns the chip off when the input voltage is below the UVLO threshold. This reduces the supply current to only 50µA, making the UC3573
ideal for battery powered applications.
• Drives External PMOS Switch
• Contains UVLO Circuit
• Includes Pulse-by-Pulse Current Limit
• Low 50µA Sleep Mode Current
BLOCK DIAGRAM
UDG-94106-1
SLUS346 - APRIL 1999
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UC1573
UC2573
UC3573
CONNECTION DIAGRAMS
ABSOLUTE MAXIMUM RATINGS
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V
EAINV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.6V to VCC
IEAOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
RAMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 4V
CS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VCC
IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.7A to 0.7A
I3VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15mA
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
DIL-8, SOIC-8 (TOP VIEW)
J or N, D Packages
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages.
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, these parameters apply for TA = –55°C to +125°C for
the UC1573, –40°C to +85°C for the UC2573, and 0°C to +70°C for the UC3573, VCC = 5V, CT = 680pF, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
2.94
3
3.06
V
Reference Section
3VREF
Line Regulation
VCC = 4.75 to 30V
1
10
mV
Load Regulation
I3VREF = 0 to –5mA
1
10
mV
85
100
115
kHz
1.45
1.5
1.55
V
–0.2
–1
µA
Oscillator Section
Frequency
VCC = 5V, 30V
Error Amp Section
EAINV
EAOUT = 2V
IEAINV
EAOUT = 2V
AVOL
EAOUT = 0.5V to 3V
65
EAOUT High
EAINV = 1.4V
3.6
EAOUT Low
EAINV = 1.6V
IEAOUT
EAINV = 1.4V, EAOUT = 2V
–350
–500
µA
EAINV = 1.6V, EAOUT = 2V
7
20
mA
0.6
1
MHz
–0.39
–0.43
–0.47
V
150
800
nA
Unity Gain Bandwidth
TJ = 25°C, F = 10kHz
90
dB
4
4.4
V
0.1
0.2
V
Current Sense Comparator Section
Threshold (referred to VCC)
Input Bias Current
CS = VCC
CS Propagation Delay
400
ns
Gate Drive Output Section
OUT High Saturation
IOUT = 0
IOUT = –10mA
OUT Low Saturation
0
0.3
V
0.7
1.5
V
IOUT = –100mA
1.5
2.5
V
IOUT = 10mA
0.1
0.4
V
IOUT = 100mA
1.5
2.2
V
Rise Time
TJ = 25°C, CLOAD = 1nF + 3.3 Ohms
30
80
ns
Fall Time
TJ = 25°C, CLOAD = 1nF + 3.3 Ohms
30
80
ns
Maximum Duty Cycle
EAINV = 1.4V
92
96
%
Minimum Duty Cycle
EAINV = 1.6V
Modulator Gain
EAOUT = 1.5V to 2.5V
Pulse Width Modulator Section
0
%
25
35
45
%/V
Start Threshold
3.5
4.2
4.5
V
Hysteresis
100
200
300
mV
Undervoltage Lockout Section
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UC1573
UC2573
UC3573
ELECTRICAL CHARACTERISTICS: Unless otherwise specified, these parameters apply for TA = –55°C to +125°C for
the UC1573, –40°C to +85°C for the UC2573, and 0°C to +70°C for the UC3573, VCC = 5V, CT = 680pF, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
1.8
2.2
MAX UNITS
Sleep Mode Section
Threshold
2.6
V
Supply Current Section
IVCC
VCC = 30V
9
12
mA
IVCC
VCC = 30V, EAINV = 3V
50
150
A
PIN DESCRIPTIONS
3VREF: Precision 3V reference. Bypass with 100nF capacitor.
EAOUT: Output of error amplifier. Use EAOUT and
EAINV for loop compensation components.
CS: Peak current limit sense pin. Senses the current
across a current sense resistor placed between VCC and
source of the PMOS Buck switch. OUT will be held high
(PMOS buck switch off) if VCC – CS exceeds 0.4V.
GND: Circuit Ground.
EAINV: Inverting input to error amplifier. VOUT sense
feedback connected to this pin. The non-inverting input of
the error amplifier is internally connected to:
RAMP: Oscillator and ramp for pulse width modulator.
Frequency is set by a capacitor to GND by the equation
OUT: Gate drive for external PMOS switch connected between VCC and the flyback inductor. OUT drives the gate
of the PMOS switch between VCC and GND.
F =
3VREF
Volts.
2
1
15k • C RAMP
Recommended operating frequency range is 10kHz to
200kHz.
Connecting the EAINV pin to an external voltage greater
than 2.6V commands the chip to go into a low current
sleep mode.
VCC: Input voltage supply to chip. Range is 4.75V to 30V.
Bypass with a 1µF capacitor.
UDG-94107
Typical Waveforms.
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UC1573
UC2573
UC3573
TYPICAL APPLICATION: 12V TO 5V BUCK CONVERTER
VIN
+12V IN
SLEEP
RSLEEP3
1MEG
MSLEEP
RSLEEP
24k
RCS
RV SENSE1
91K
C V CC
10µF
4
VCC
8
3VREF
7
RAMP
1
EAINV
UC1573
CS
3
C3 V REF
100nF
CRAMP
680pF
RCOMP
CBULK
10µF
OUT
CCOMP
2
5
MSWITCH
EAOUT
LBUCK
RVSENSE2
39k
6
VOUT
GND
DCATCH
1A
GND
COUT
100µF
GND
+5V
OUT
UDG-99050
UNITRODE CORPORATION
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • FAX (603) 424-3460
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