ETC HD74LVC4245ATEL

HD74LVC4245A
Octal Bus Transceiver and 3.3 V to 5 V shifters
with 3-state Outputs
ADE-205-683 (Z)
Rev.0
Apr. 2002
Description
The HD74LVC4245A has eight bus transceivers with three state outputs in a 24 pin package. When (DIR)
is high, data flows from the A inputs to the B outputs, and when (DIR) is low, data flows from the B inputs
to the A outputs. A and B bus are separated by making enable input (OE) high level. And this product has
two terminals (VCCA, VCCB), VCCA (5V) is connected with control input and A bus side, VCCB (3.3V) connected
with B bus side. VCCA and VCCB are isolated. This allows for translation from a 3.3 V to a 5 V environment,
and vice versa. Low voltage and high speed operation is suitable at the battery drive product (note type
personal computer) and low power consumption extends the life of a battery for long time operation.
Features
• This product function as level shift transceiver that change VCCA input level to VCCB output level, VCCB
input level to VCCA output level by providing different supply voltage to VCCA and VCCB.
• This product is able to the power management: Turn on and off the supply on VCCB side with providing
the supply of VCCA. (Enable input (OE): High level )
• VCCA = 4.5 V to 5.5 V, VCCB = 2.7 V to 3.6 V
• All control input VI (max) = 5.5 V (@VCCA = 0 V to 5.5 V)
• All A bus side input outputs VI/O (max) = 5.5 V
(@VCCA = 0 V or output off state)
• All B bus side input outputs VI/O (max) = 3.6 V
(@VCCB = 0 V or output off state)
• High output current
A bus side : ±24 mA (@VCCA = 4.5 V to 5.5 V)
B bus side : ±12 mA (@VCCB = 2.7 V)
±24 mA (@VCCB = 3.0 V to 3.6 V)
HD74LVC4245A
• Package type
Product code example: HD74LVC4245ATEL
Package type
Package code
Package suffix
Taping code
TSSOP-24pin
TTP-24DBV
T
EL (1,000pcs / Reel)
Rev.0, Apr. 2002, page 2 of 14
HD74LVC4245A
Function Table
Inputs
OE
DIR
Operation
L
L
B data to A bus
L
H
A data to B bus
H
X
Z
H:
L:
X:
Z:
High level
Low level
Immaterial
High impedance
Pin Arrangement
VCCA 1
24 VCCB
DIR 2
23 VCCB
A1 3
22 OE
A2 4
21 B1
A3 5
A4 6
20 B2
A5 7
18 B4
A6 8
17 B5
A7 9
16 B6
A8 10
15 B7
GND 11
14 B8
GND 12
13 GND
19 B3
(Top view)
Rev.0, Apr. 2002, page 3 of 14
HD74LVC4245A
Absolute Maximum Ratings
(1) For VCCA
Item
Supply voltage
Input voltage
*1
Input / output voltage
Symbol
Ratings
Unit
Conditions
VCCA
–0.5 to 6.0
V
VI
–0.5 to 6.0
V
DIR, OE
VI/O
–0.5 to VCCA+0.5
V
A port output “H” or “L”
–0.5 to 6.0
A port output “Z” or VCCA : OFF
Input diode current
IIK
–50
mA
VI < 0
Output diode current
IOK
–50
mA
VO < 0
50
Output current
VO > VCCA+0.5
IO
±50
VCCA, GND current
ICCA or IGND
100
mA
Maximum power
dissipation
*2
at Ta = 25°C (in still air)
PT
862
mW
Storage temperature
Tstg
–65 to 150
°C
Notes:
mA
TSSOP
The absolute maximum ratings are values which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current
ratings are observed.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
(2) For VCCB
Item
Supply voltage
*1
Input / output voltage
Symbol
Ratings
Unit
VCCB
–0.5 to 4.6
V
VI/O
–0.5 to VCCB+0.5
V
–0.5 to 4.6
B port output “H” or “L”
B port output “Z” or VCCB : OFF
Input diode current
IIK
–50
mA
Output diode current
IOK
–50
mA
50
VI < 0
VO < 0
VO > VCCB+0.5
Output current
IO
±50
mA
VCCB,GND current
ICCB or IGND
100
mA
Maximum power
dissipation
*2
at Ta = 25°C (in still air)
PT
862
mW
Storage temperature
Tstg
–65 to 150
°C
Notes:
Conditions
TSSOP
The absolute maximum ratings are values which must not individually be exceeded, and
furthermore, no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current
ratings are observed.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.0, Apr. 2002, page 4 of 14
HD74LVC4245A
Recommended Operating Conditions
(1) For VCCA
Item
Symbol
Ratings
Unit
Supply voltage
VCCA
4.5 to 5.5
V
Input / output voltage
VI
0 to 5.5
V
VI/O
0 to VCCA
A port output “H” or “L”
0 to 5.5
A port output “Z” or VCCA : OFF
Output current
IOH
–24
IOL
24
DIR, OE
mA
Input transition rise or fall ∆t / ∆v
time
10
ns / V
Operating temperature
–40 to 85
°C
Ta
Conditions
Note: Unused or floating inputs must be held high or low.
(2) For VCCB
Item
Symbol
Ratings
Unit
Supply voltage
VCCB
2.7 to 3.6
V
Input / output voltage
VI/O
0 to VCCB
V
0 to 3.6
Output current
IOH
–12
mA
VCCB = 2.7 V
VCCB = 3.0 to 3.6 V
12
VCCB = 2.7 V
24
VCCB = 3.0 to 3.6 V
Input transition rise or fall ∆t / ∆v
time
10
ns / V
Operating temperature
–40 to 85
°C
Ta
B port output “H” or “L”
B port output “Z” or VCCB : OFF
–24
IOL
Conditions
Note: Unused or floating inputs must be held high or low.
Rev.0, Apr. 2002, page 5 of 14
HD74LVC4245A
Block Diagram
DIR
2
22
A1
3
21
To seven other channels
Rev.0, Apr. 2002, page 6 of 14
OE
B1
HD74LVC4245A
Electrical Characteristics
(Ta = –40 to 85°C)
Item
Symbol VCCA (V)
Input voltage
VIH
Output voltage
Max
Unit Test Conditions
4.5 to 5.5 2.7 to 3.6 2

V
VIL
4.5 to 5.5 2.7 to 3.6 
0.8
VOHA
4.5 to 5.5 2.7 to 3.6 VCCA–0.2 
VOHB
VOLA
VOLB
VCCB (V)
Min
4.5
2.7 to 3.6 3.7

5.5
2.7 to 3.6 4.7

IOH = –100 µA
V
IOH = –24 mA
4.5 to 5.5 2.7 to 3.6 VCCB–0.2 
IOH = –100 µA
IOH = –12 mA
4.5 to 5.5 2.7
2.2

4.5 to 5.5 3.0
2.4

4.5 to 5.5 3.0
2

IOH = –24 mA
0.2
IOL = 100 µA
IOL = 24 mA
4.5 to 5.5 2.7 to 3.6 
4.5
2.7 to 3.6 
0.55
5.5
2.7 to 3.6 
0.55
4.5 to 5.5 2.7 to 3.6 
0.2
IOL = 100 µA
4.5 to 5.5 2.7

0.4
IOL = 12 mA
4.5 to 5.5 3.0

0.55
IOL = 24 mA
Input current
IIN
5.5
2.7 to 3.6 
±1
µA
Control input
Off state
output current
IOZA
5.5
2.7 to 3.6 
±5
µA
A port, VO = VCCA or GND
IOZB
4.5 to 5.5 3.6

±5
Output leak current
IOFF
0
0

20
µA
A port, VI/O = 5.5 V
B port, VI/O = 3.6 V
Quiescent
supply current
ICCA
5.5
2.7 to 3.6 
80
µA
B to A,
control input =VCCA or GND
Bn = VCCB or GND,
IO (A port) = 0
ICCB
4.5 to 5.5 3.6

50
∆ICCA
5.5
2.7 to 3.6 
1.5
∆ICCB
4.5 to 5.5 2.7 to 3.6 
0.5
Increase in ICC
*1
per input
Notes:
B port, VO = VCCB or GND
A to B,
control input =VCCA or GND
An = VCCA or GND,
IO (B port) = 0
mA
A port or Control input,
One input at 3.4 V,
Other input at VCCA at GND
B port,
One input at VCCB–0.6V,
Other input at VCCB at GND
For condition shown as Min or Max use the appropriate values under recommended operating
conditions.
1. This is the increase in supply current for each input that is at the specified TTL voltage level
rather than VCC or GND.
Rev.0, Apr. 2002, page 7 of 14
HD74LVC4245A
Capacitance
(Ta = 25°C)
Item
Symbol VCCA (V)
VCCB (V)
Min
Typ
Max
Unit Test Conditions
Control Input
capacitance
CIN
5
3.3

5

pF
VI = VCCA or GND
Input / output
capacitance
CI/O
5
3.3

11

pF
A port, VI = VCCA or GND,
B port, VI = VCCB or GND
Switching Characteristics
(Ta = –40 to 85°C)
VCCA = 5.0±0.5 V, VCCB = 2.7 V to 3.6 V
Item
Symbol Min
Propagation delay
time
tPLH
Output enable time
Typ
Max
Unit
Test conditions
From(Input) To(Output)
1

6.7
ns
CL = 50 pF
A
B
tPHL
1

6.3
tPLH
1

5
B
A
tPHL
1

6.1
tZH
1

8.1
OE
A
tZL
1

9
tZH
1

9.8
OE
B
OE
A
OE
B
tZL
1

8.8
Output disable time tHZ
1

5.8
tLZ
1

7
tHZ
1

7.8
tLZ
1

7.7
Rev.0, Apr. 2002, page 8 of 14
RL = 500 Ω
ns
CL = 50 pF
RL = 500 Ω
ns
CL = 50 pF
RL = 500 Ω
HD74LVC4245A
Operating Characteristics
Item
Symbol VCCA (V)
Power dissipation
capacitance
CPD
5.0
VCCB (V)
Min
Typ
Max
Unit Test Conditions
3.0

39.5

pF
f = 10 MHz
CL = 0
Power-up considerations
Level-translation devices offer an opportunity for successful mixed-voltage signal design.
A proper power-up sequence always should be followed to avoid excessive supply current, bus contention,
oscillations, or other anomalies caused by improperly biased device pins.
Take these precautions to guard against such power-up problems.
1. Connect ground before any supply voltage is applied.
2. Next, power up the control side of the device.
(Power up of VCCA is first. Next power up is VCCB. )
3. Tie OE to VCCA with a pullup resistor so that it ramps with VCCA.
4. Depending on the direction of the data path, DIR can be high or low.
If DIR high is needed (A data to B bus), ramp it with VCCA. Overwise, keep DIR low.
Rev.0, Apr. 2002, page 9 of 14
HD74LVC4245A
Test Circuit
See under table
S1
500 Ω
OPEN
GND
*1
CL = 50 pF
500 Ω
Load circuit for outputs
S1
Symbol
VCCA = 5±0.5 V
VCCB = 2.7 to 3.6 V
A/OE to B
B/OE to A
t PLH / tPHL
OPEN
OPEN
t ZH / t HZ
GND
GND
t ZL / t LZ
6V
2 × VCCA
Note: 1. CL includes probe and jig capacitance.
Rev.0, Apr. 2002, page 10 of 14
HD74LVC4245A
Waveforms – 1
tr
tf
90 %
Vref1
Input
VIH
90 %
Vref1
10 %
10 %
GND
t PHL
t PLH
V OH
Output
Vref2
Vref2
V OL
Symbol
VCCA = 5±0.5 V
VCCB = 2.7 to 3.6 V
A to B
B to A
VIH
3.0 V
2.7 V
Vref1
1.5 V
1.5 V
Vref2
1.5 V
1/2 VCCA
Rev.0, Apr. 2002, page 11 of 14
HD74LVC4245A
Waveforms – 2
tf
tr
90 %
Output
Control
VIH
90 %
Vref1
Vref1
10 %
10 %
t ZL
GND
t LZ
VOH
Waveform - A
Vref2
V OL + 0.3 V
t ZH
t HZ
V OH - 0.3 V
Waveform - B
V OL
V OH
Vref2
GND
Symbol
VCCA = 5±0.5 V
VCCB = 2.7 to 3.6 V
OE to B
OE to A
VIH
3.0 V
3.0 V
Vref1
1.5 V
1.5 V
Vref2
1.5 V
1/2 VCCA
Notes: 1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
2. Waveform - A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.0, Apr. 2002, page 12 of 14
HD74LVC4245A
Package Dimensions
As of January, 2002
Unit: mm
7.80
8.10 Max
13
1
12
4.40
24
0.65
1.0
0.13 M
6.40 ± 0.20
*Pd plating
0.10
*0.15 ± 0.05
1.10 Max
0.65 Max
0˚ – 8˚
0.07 +0.03
–0.04
*0.20 ± 0.05
0.50 ± 0.10
Hitachi Code
JEDEC
JEITA
Mass (reference value)
TTP-24DBV
—
—
0.08 g
Rev.0, Apr. 2002, page 13 of 14
HD74LVC4245A
Disclaimer
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intellectual property rights, in connection with use of the information contained in this document.
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received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
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products.
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Copyright © Hitachi, Ltd., 2002. All rights reserved. Printed in Japan.
Colophon 6.0
Rev.0, Apr. 2002, page 14 of 14