HD74CBT3257 4-bit 1-of-2 FET Multiplexer / Demultiplexer ADE-205-624B (Z) Rev. 2 Nov. 2001 Description The HD74CBT3257 is a 4-bit 1-of-2 high-speed TTL-compatible FET multiplexer / demultiplexer. The low on-state resistance of the switch allows connections to be made with minimal propagation delay. Output enable (OE) and select control (S) inputs select the appropriate B1 and B2 outputs for the A-input data. Features • Minimal propagation delay through the switch. • 5 Ω switch connection between two ports. • TTL-compatible input levels. • Ultra low quiescent power. -Ideally suited for notebook applications. • Package type Product code example: HD74CBT3257TELL Package type Package code Package suffix Taping code TSSOP-16pin TTP-16DA T ELL(2000pcs / Reel) Notes: 1. As for the Pb-free package is attached the “V” to the end of package code. 2. As for the Pb-free product is attached the “–E” to the end of product code. HD74CBT3257 Function Table Inputs OE S Function L L A port = B1 port L H A port = B2 port H X Disconnect H: L: X: High level Low level Immaterial Pin Arrangement S 1 16 VCC 1B1 2 15 OE 1B2 3 14 4B1 1A 4 13 4B2 2B1 5 12 4A 2B2 6 11 3B1 2A 7 10 3B2 GND 8 9 (Top view) Rev.2, Nov. 2001, page 2 of 11 3A HD74CBT3257 Absolute Maximum Ratings Item Symbol Ratings Unit VCC −0.5 to 7.0 V VI −0.5 to 7.0 V Input clamp current IIK −50 mA VI < 0 Continuous output current IO 128 mA VO = 0 to VCC Continuous current through VCC or GND ICC or IGND ±100 mA Maximum power dissipation *2 at Ta = 25°C (in still air) PT 500 mW Storage temperature Tstg −65 to 150 °C Supply voltage range Input voltage range Notes: *1 Conditions TSSOP The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation was calculated using a junction temperature of 150°C. Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 4.0 5.5 V Input voltage range VI 0 5.5 V Output voltage range VI/O 0 5.5 V Input transition rise or fall rate ∆t / ∆v 0 5 ns / V Operating free-air temperature Ta −40 85 °C Conditions VCC = 4.5 to 5.5 V Note: Unused or floating inputs must be held high or low. Rev.2, Nov. 2001, page 3 of 11 HD74CBT3257 Block Diagram 1A 4 2 1B1 3 1B2 2A 7 5 2B1 6 2B2 3A 9 11 3B1 10 3B2 4A 12 14 4B1 13 4B2 S OE 1 15 Rev.2, Nov. 2001, page 4 of 11 HD74CBT3257 DC Electrical Characteristics (Ta = −40 to 85°C) Item Symbol VCC (V) Clamp diode voltage VIK Input voltage VIH On-state switch *2 resistance Min Typ 4.5 4.0 to 5.5 2.0 VIL 4.0 to 5.5 RON *1 Max Unit Test conditions −1.2 V IIN = −18 mA V 0.8 4.0 14 20 4.5 5 7 VIN = 0 V, IIN = 64 mA 4.5 5 7 VIN = 0 V, IIN = 30 mA 4.5 10 15 VIN = 2.4 V, IIN = 15 mA Ω VIN = 2.4 V, IIN = 15 mA Typ at VCC = 4.0 V Input current IIN 0 to 5.5 ±1.0 µA VIN = 5.5 V or GND Off-state leakage current IOZ 5.5 ±1.0 µA 0 ≤ A, B ≤ VCC Quiescent supply current ICC 5.5 3 µA VIN = VCC or GND, IO = 0 mA Increase in ICC *3 per input ∆ICC 5.5 2.5 mA One input at 3.4 V, other inputs at VCC or GND Notes: For condition shown as Min or Max use the appropriate values under recommended operating conditions. 1. All typical values are at VCC = 5 V (unless otherwise noted), Ta = 25°C. 2. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower voltage of the two (A or B) terminals. 3. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. Capacitance (Ta = 25°C) Item Symbol VCC (V) Min Typ Max Unit Test conditions Control input capacitance CIN 5.0 3.5 pF VIN = 0 or 3 V CI/O (OFF) 5.0 9 pF VO = 0 or 3 V 5.0 5 Input / output A port capacitance B port OE = VCC Note: This parameter is determined by device characterization is not production tested. Rev.2, Nov. 2001, page 5 of 11 HD74CBT3257 Switching Characteristics (Ta = −40 to 85°C) • VCC = 4.0 V Test conditions FROM (Input) TO (Output) ns CL = 50 pF RL = 500 Ω A or B B or A 5.5 ns CL = 50 pF RL = 500 Ω S A 5.7 ns S B 5.6 CL = 50 pF RL = 500 Ω OE A or B 5.2 S B 5.5 OE A or B 5.2 S B 6.4 OE A or B Test conditions FROM (Input) TO (Output) Item Symbol Min Max Unit Propagation delay *1 time tPLH tPHL 0.35 Propagation delay time tPLH tPHL Enable time tZH tZL tHZ Disable time tLZ • ns CL = 50 pF RL = 500 Ω VCC = 5.0±0.5 V Item Symbol Min Max Unit Propagation delay *1 time tPLH tPHL 0.25 ns CL = 50 pF RL = 500 Ω A or B B or A Propagation delay time tPLH tPHL 1.6 5.0 ns CL = 50 pF RL = 500 Ω S A Enable time tZH tZL 1.6 5.2 ns S B 1.8 5.1 CL = 50 pF RL = 500 Ω OE A or B tHZ 1.0 5.0 S B 2.2 5.5 CL = 50 pF RL = 500 Ω OE A or B 1.0 5.0 S B 2.2 6.8 OE A or B Disable time tLZ Note: ns 1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Rev.2, Nov. 2001, page 6 of 11 HD74CBT3257 Test Circuit See under table 500 Ω S1 OPEN GND *1 CL = 50 pF 500 Ω Load circuit for outputs Symbol S1 t PLH / tPHL OPEN t ZH / t HZ OPEN t ZL / t LZ 7V Note: 1. CL includes probe and jig capacitance. Rev.2, Nov. 2001, page 7 of 11 HD74CBT3257 Waveforms – 1 tr tf 90 % 1.5 V Input 3V 90 % 1.5 V 10 % 10 % t PLH GND t PHL V OH 1.5 V Output 1.5 V V OL Waveforms – 2 tf tr 90 % Output Control 3V 90 % 1.5 V 1.5 V 10 % t ZL 10 % GND t LZ 3.5 V Waveform - A 1.5 V V OL + 0.3 V t ZH t HZ V OH - 0.3 V Waveform - B V OL V OH 1.5 V GND Notes: 1. All input pulses are supplied by generators having the following characteristics : PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. Rev.2, Nov. 2001, page 8 of 11 HD74CBT3257 Package Dimensions As of July, 2001 Unit: mm 4.40 5.00 5.30 Max 16 9 1 8 0.65 0.20 ± 0.06 1.0 0.13 M 6.40 ± 0.20 0.10 *Dimension including the plating thickness Base material dimension *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.65 Max 0.07 +0.03 –0.04 0.08 *0.22 +– 0.07 0˚ – 8˚ 0.50 ± 0.10 Hitachi Code JEDEC JEITA Mass (reference value) TTP-16DA — — 0.05 g Rev.2, Nov. 2001, page 9 of 11 HD74CBT3257 As of July, 2001 Unit: mm 4.40 5.00 5.30 Max 16 9 1 8 0.65 1.0 0.13 M 6.40 ± 0.20 *Pd plating Rev.2, Nov. 2001, page 10 of 11 0.10 *0.15 ± 0.05 1.10 Max 0.65 Max 0.07 +0.03 –0.04 *0.20 ± 0.05 0˚ – 8˚ 0.50 ± 0.10 Hitachi Code JEDEC JEITA Mass (reference value) TTP-16DAV — — 0.05 g HD74CBT3257 Disclaimer 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Sales Offices Hitachi, Ltd. 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(Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road Hung-Kuo Building Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://semiconductor.hitachi.com.hk Copyright © Hitachi, Ltd., 2001. All rights reserved. Printed in Japan. Colophon 5.0 Rev.2, Nov. 2001, page 11 of 11