HD74ALVC162835A 18-bit Universal Bus Driver with 3-state Outputs ADE-205-294C (Z) Rev. 3 Oct. 2001 Description The HD74ALVC162835A is an 18-bit universal bus driver designed for 2.3 V to 3.6 V VCC operation. Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode when the latch enable (LE) is high. When LE is low, the A data is latched if the clock (CLK) input is held at a high or low logic level. If the LE is low, the A data is stored in the latch/flip flop on the low to high transition of CLK. When OE is high, the outputs are in the high impedance state. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup registor; the minimum value of the registor is determined by the current sinking capability of the driver. All outputs, which are designed to sink up to 12 mA, include series dumping resistors to reduce overshoot and undershoot. Features • Supports PC133 and meets “PC SDRAM registered DIMM specification, Rev. 1.1” • VCC = 2.3 V to 3.6 V • Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) • Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.0 V) • All outputs have series dumping resistors, so no external resistors are required • tpd (CLK to Y) = 3.5 ns (Max) (@VCC = 3.3±0.3 V, CL = 50 pF, Ta = 0 to 85°C) • tpd (CLK to Y) = 2.5 ns (Max) (@VCC = 3.3±0.3 V, CL = 30 pF, Ta = 0 to 85°C) • Package type Package type Package code Package suffix Taping code TSSOP-56pin TTP-56DAV T EL(1000pcs / Reel) TVSOP-56pin TTP-56DBV N EL(1000pcs / Reel) HD74ALVC162835A Function Table Inputs OE LE CLK A Output Y H X X X Z L H X L L L H X H H L L ↑ L L L L ↑ H H L L L or H X Y0 H: L: X: Z: ↑: Note: *1 High level Low level Immaterial High impedance Low to high transition 1. Output level before the indicated steady-state input conditions were established. Rev.3, Oct. 2001, page 2 of 17 HD74ALVC162835A Pin Arrangement NC 1 56 GND NC 2 55 NC Y1 3 54 A1 53 GND GND 4 Y2 5 52 A2 Y3 6 51 A3 50 VCC VCC 7 Y4 8 49 A4 Y5 9 48 A5 Y6 10 47 A6 46 GND GND 11 Y7 12 45 A7 Y8 13 44 A8 Y9 14 43 A9 Y10 15 42 A10 Y11 16 41 A11 Y12 17 40 A12 GND 18 39 GND Y13 19 38 A13 Y14 20 37 A14 Y15 21 36 A15 VCC 22 35 VCC Y16 23 34 A16 Y17 24 33 A17 GND 25 32 GND Y18 26 31 A18 OE 27 30 CLK LE 28 29 GND (Top view) Rev.3, Oct. 2001, page 3 of 17 HD74ALVC162835A Absolute Maximum Ratings Item Symbol Ratings Unit Conditions VCC –0.5 to 4.6 V VI –0.5 to 4.6 V VO –0.5 to VCC+0.5 V Input clamp current IIK –50 mA VI < 0 Output clamp current IOK ±50 mA VO < 0 or VO > VCC Continuous output current IO ±50 mA VO = 0 to VCC VCC, GND current / pin ICC or IGND ±100 mA Maximum power dissipation *3 at Ta = 55°C (in still air) PT 1 W Storage temperature range Tstg –65 to 150 °C Supply voltage range Input voltage range *1 Output voltage range *1, 2 TSSOP TVSOP Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating condition” is not implied. Exposure to absolutemaximum-rated conditions for extended periods may affect device reliability. Notes: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp current ratings are observed. 2. The input and output positive-voltage ratings may be exceeded up to 4.6 V if the input and output clamp-current ratings are observed. 3. The maximum power dissipation is calculated using a junction temperature of 150°C and board trace length of 750 mils. Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage VCC 2.3 3.6 V Input voltage VI 0 VCC V Output voltage VO 0 VCC V High-level output current IOH — –6 mA — –8 VCC = 2.7 V — –12 VCC = 3.0 V — 6 — 8 VCC = 2.7 V — 12 VCC = 3.0 V Low-level output current IOL mA Input transition rise or fall rate •t/•v 0 10 ns/V Operating free-air temperature Ta –40 85 °C Note: Unused or floating control pins must be held high or low. Rev.3, Oct. 2001, page 4 of 17 Conditions VCC = 2.3 V VCC = 2.3 V HD74ALVC162835A Logic Diagram OE CLK LE A1 27 30 28 54 1D C1 CLK 3 Y1 To seventeen other channels Rev.3, Oct. 2001, page 5 of 17 HD74ALVC162835A Electrical Characteristics Ta = –40 to 85°C Item Symbol VCC (V) Min Max Unit Test Conditions Input voltage VIH 2.3 to 2.7 1.7 — V 2.7 to 3.6 2.0 — 2.3 to 2.7 — 0.7 2.7 to 3.6 — 0.8 2.3 to 3.6 VCC–0.2 — 2.3 1.9 — IOH = –4 mA, VIH = 1.7 V 2.3 1.7 — IOH = –6 mA, VIH = 1.7 V 3.0 2.4 — IOH = –6 mA, VIH = 2.0 V 2.7 2.0 — IOH = –8 mA, VIH = 2.0 V 3.0 2.0 — IOH = –12 mA, VIH = 2.0 V 2.3 to 3.6 — 0.2 2.3 — 0.4 IOL = 4 mA, VIL = 0.7 V 2.3 — 0.55 IOL = 6 mA, VIL = 0.7 V 3.0 — 0.55 IOL = 6 mA, VIL = 0.8 V 2.7 — 0.6 IOL = 8 mA, VIL = 0.8 V 3.0 — 0.8 IOL = 12 mA, VIL = 0.8 V VIL Output voltage VOH VOL V V V IOH = –100 µA IOL = 100 µA Input current IIN 3.6 — ±5.0 µA VIN = VCC or GND Off state output current IOZ 3.6 — ±10 µA VOUT = VCC or GND Quiescent supply current ICC 3.6 — 40 µA VIN = VCC or GND 3.0 to 3.6 — 750 µA One input at (VCC–0.6)V, other inputs at VCC or GND ∆ICC Rev.3, Oct. 2001, page 6 of 17 HD74ALVC162835A Switching Characteristics (Ta = –40 to 85°C) Item Symbol VCC (V) Min Typ Max Unit Maximum clock fmax 150 — — MHz frequency Propagation delay time Output enable time Output disable time Input capacitance Output capacitance 2.5±0.2 2.7 150 — — 3.3±0.3 150 — — tPLH 2.5±0.2 1.0 — 5.0 tPHL 2.7 — — 5.0 3.3±0.3 1.0 — 4.2 2.5±0.2 1.3 — 5.9 2.7 — — 5.8 3.3±0.3 1.3 — 5.1 2.5±0.2 1.4 — 6.3 2.7 — — 6.1 3.3±0.3 1.4 — 5.4 tZH 2.5±0.2 1.4 — 6.3 tZL 2.7 — — 6.5 3.3±0.3 1.1 — 5.5 tHZ 2.5±0.2 1.0 — 4.7 tLZ 2.7 — — 4.9 3.3±0.3 1.3 — 4.5 3.3 3.3 4.0 4.5 3.3 3.0 6.0 9.0 3.3 3.0 7.0 9.0 CIN CO ns From (Input) To (Output) A Y LE Y CLK Y ns OE Y ns OE Y pF Control inputs Data inputs pF Y ports Rev.3, Oct. 2001, page 7 of 17 HD74ALVC162835A Switching Characteristics (Ta = –40 to 85°C) (cont) Item Symbol VCC (V) Min Typ Max Unit From (Input) Setup time tsu 2.5±0.2 2.2 — — ns Data before CLK↑ 2.7 2.1 — — 3.3±0.3 1.7 — — 2.5±0.2 1.9 — — Data before LE↓ 2.7 1.6 — — CLK “H” 3.3±0.3 1.5 — — 2.5±0.2 1.3 — — Data before LE↓ 2.7 1.1 — — CLK “L” 3.3±0.3 1.0 — — 2.5±0.2 0.6 — — 2.7 0.6 — — 3.3±0.3 0.7 — — 2.5±0.2 1.4 — — Data after LE↓ 2.7 1.7 — — CLK “H” or “L” 3.3±0.3 1.4 — — 2.5±0.2 3.3 — — 2.7 3.3 — — 3.3±0.3 3.3 — — 2.5±0.2 3.3 — — 2.7 3.3 — — 3.3±0.3 3.3 — — Hold time Pulse width th tw ns ns Data after CLK↑ LE “H” CLK “H” or “L” Switching Characteristics (Ta = 0 to 85°C) Item Symbol VCC (V) Typ Max Unit FROM (Input) Propagation delay time CL=50pF tPLH, tPHL 3.3±0.3 1.4 — 3.5 ns 3.3±0.3 0.7 — 2.5 CL=30pF Min TO (Output) CLK Y CLK Y Setup time tsu 3.3±0.3 1.0 — — ns Data before CLK↑ Hold time th 3.3±0.3 0.6 — — ns Data after CLK↑ Rev.3, Oct. 2001, page 8 of 17 HD74ALVC162835A Operating Characteristics (Ta = 25°C) Item Symbol VCC = 2.5±0.2 V VCC = 3.3±0.3 V Typ Typ Power dissipation Outputs enable Cpd 22.0 24.5 capacitance 5.0 6.0 Outputs disable Unit Test Conditions pF CL = 0, f = 10 MHz Rev.3, Oct. 2001, page 9 of 17 HD74ALVC162835A Test Circuit See under table 500 Ω S1 OPEN GND *1 CL 500 Ω Load Circuit for Outputs Symbol t PLH / t PHL t su / t h / t w t ZH/ t HZ t ZL / t LZ CL Note: 1. Vcc=2.5±0.2V Vcc=2.7V, 3.3±0.3V OPEN OPEN GND GND 2 ×V CC 30 pF 6.0 V 50 pF CL includes probe and jig capacitance. Rev.3, Oct. 2001, page 10 of 17 HD74ALVC162835A Waveforms – 1 tr tf 90 % Input VIH 90 % Vref Vref 10 % 10 % GND t PHL t PLH VOH Output Vref Vref VOL Waveforms – 2 tr VIH 90 % Vref Timing Input 10 % tsu GND th VIH Data Input Vref Vref GND tw VIH Input Vref Vref GND Rev.3, Oct. 2001, page 11 of 17 HD74ALVC162835A Waveforms – 3 tf tr 90 % Vref Output Control VIH 90 % Vref 10 % t ZL 10 % GND t LZ ≈VOH1 Vref Waveform - A t ZH Waveform - B Vref1 VOL t HZ VOH Vref2 Vref ≈VOL1 TEST VIH Vref Vref1 Vref2 VOH1 VOL1 Notes: 1. 2. 3. 4. Vcc=2.5±0.2V Vcc=2.7V, 3.3±0.3V VCC 2.7 V 1/2 VCC 1.5 V VOL +0.15 V VOL +0.3 V VOH–0.15 V VOH–0.3 V VCC 3.0 V GND GND All input pulses are supplied by generators having the following characteristics : PRR • 10 MHz, Zo = 50 Ω, tr • 2.0 ns, tf • 2.0 ns. (VCC = 2.5±0.2 V) PRR • 10 MHz, Zo = 50 Ω, tr • 2.5 ns, tf • 2.5 ns. (VCC = 2.7 V, 3.3±0.3 V) Waveform – A is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform – B is for an output with internal conditions such that the output is high except when disabled by the output control. The output are measured one at a time with one transition per measurement. Rev.3, Oct. 2001, page 12 of 17 HD74ALVC162835A IV Characteristics for Register Output (Measured value) Weak condition HIGH Vcc = 3.0 V, Ta = 85°C VOH (V) 0.0 0 0.5 1.0 1.5 2.0 2.5 3.0 I OH (mA) -20 -40 -60 -80 -100 Strong condition HIGH Vcc = 3.6 V, Ta = 0°C VOH (V) 0.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 I OH (mA) -30 -60 -90 -120 -150 Rev.3, Oct. 2001, page 13 of 17 HD74ALVC162835A Weak condition LOW Vcc = 3.0 V, Ta = 85°C 120 100 I OL (mA) 80 60 40 20 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 VOL (V) Strong condition LOW Vcc = 3.6 V, Ta = 0°C 150 I OL (mA) 120 90 60 30 0 0.0 0.5 1.0 1.5 2.0 VOL (V) Rev.3, Oct. 2001, page 14 of 17 2.5 3.0 3.5 4.0 HD74ALVC162835A Package Dimensions As of July, 2001 14.0 14.2 Max 56 Unit: mm 6.10 29 1 *0.19 ± 0.05 0.50 28 0.08 M 1.0 8.10 ± 0.20 0.65 Max *Pd plating 0.10 ± 0.05 0.10 *0.15 ± 0.05 1.20 Max 0° – 8° 0.50 ± 0.1 Hitachi Code JEDEC JEITA Mass (reference value) TTP-56DAV — — 0.32 g Rev.3, Oct. 2001, page 15 of 17 HD74ALVC162835A As of July, 2001 11.3 11.5 Max Unit: mm 29 4.40 56 1 *0.18 ± 0.05 0.40 28 0.07 M 1.0 6.40 ± 0.20 0.40 Max *Pd plating Rev.3, Oct. 2001, page 16 of 17 0.10 ± 0.05 0.08 *0.15 ± 0.05 1.20 Max 0° – 8° 0.50 ± 0.1 Hitachi Code JEDEC JEITA Mass (reference value) TTP-56DBV — — — HD74ALVC162835A Cautions 1. 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(Taipei Branch Office) 4/F, No. 167, Tun Hwa North Road Hung-Kuo Building Taipei (105), Taiwan Tel : <886>-(2)-2718-3666 Fax : <886>-(2)-2718-8180 Telex : 23222 HAS-TP URL : http://www.hitachi.com.tw Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://semiconductor.hitachi.com.hk Copyright © Hitachi, Ltd., 2001. All rights reserved. Printed in Japan. Colophon 5.0 Rev.3, Oct. 2001, page 17 of 17