Renesas Semiconductor Lead-Free Packages Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Renesas Semiconductor Lead-Free Packages Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corporation or a third party. 2. Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corporation by various means, including the Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corporation for further details on these materials or the products contained therein. http://www.renesas.com Copyright © 2003. Renesas Technology Corporation, All rights reserved. Printed in Japan. REJ01K0001-0100O Colophon 0.0 2003.4 www.renesas.com Lead-free packaging Making package terminals lead-free Background to the Trend toward Lead-Free Products It is widely recognized that the absorption of lead into the human body can lead to a variety of health problems. To protect the environment against contamination by lead from waste electronic equipment and components, there is a growing worldwide movement to restrict the use of lead. Semiconductor products are no exception, and moves are also underway toward making Renesas semiconductor packages lead-free. The European Union has agreed to implement the RoHS directive (the restriction of the use of certain Hazardous Substances in electrical and elecironic equipment), starting in July 2006, prohibiting the use of lead, mercury, cadmium, hexavalent chromium, PBB (polybrominated biphenyls), and PBDE (polybrominated diphenyl ethers). This directive was published in the official journal of the European Union in February 2003. Solder balls Surface finish of lead Making terminals lead-free Lead-free specifications Package Conventional specifications Sn-Pb plating Surface-mount type (SMD) Pin insertion type (THD) Lead-free specifications Sn-Bi plating Ni/Pd/Au plating Sn-Cu plating Ni/Pd/Au plating Same as conventional specifications Sn-Pb ball Sn-Ag-Cu ball Sn-Pb plating Sn-Bi plating Sn-Cu plating Sn-Pb dipping Sn-Cu dipping Ni/Pd/Au plating Sn-Cu plating Same as conventional specifications Au plating Same as conventional specifications Improving heat resistance Lead-free soldering generally requires higher reflow temperature. Renesas has set the heat-resisting temperature of a surfacemount type package at 260°C or 245°C to withstand mounting with an Sn-Ag-Cu or similar high-melting-point lead-free solder. Solder heat-resistance is defined by the package surface temperature, and an appropriate temperature profile is offered according to the heat capacity of the package. Heat-resistance reflow profiles of small, thin packages and large, thick packages are shown below. IR/air reflow profiles of small, thin packages and large, thick packages Information is available on an individual basis for devices that do not conform to the profiles shown below. Lead-free packaging Using lead free materials for semiconductors. Initially, priority will be given to making terminals lead-free.* The higher melting points of lead-free solders and the resulting higher mounting temperatures require enhanced heat resistance in components. * Technologies are under development for eliminating lead inside packages, including sealing glass, and also die-bonding materials in some products. The Renesas approach Heat-resistance improvement and provisions for mass production of lead-free terminals have been completed for all product families, and some products are already in mass production. consult a Renesas sales representative for the mass production details concerning particular products. The target date for the total abolition of lead from terminals is end of 2005. Lead-free products are differentiated from conventional products by a "Pb-Free T." marking on the label of the inner bag, box. Lead-free packaging Making package terminals lead-free Background to the Trend toward Lead-Free Products It is widely recognized that the absorption of lead into the human body can lead to a variety of health problems. To protect the environment against contamination by lead from waste electronic equipment and components, there is a growing worldwide movement to restrict the use of lead. Semiconductor products are no exception, and moves are also underway toward making Renesas semiconductor packages lead-free. The European Union has agreed to implement the RoHS directive (the restriction of the use of certain Hazardous Substances in electrical and elecironic equipment), starting in July 2006, prohibiting the use of lead, mercury, cadmium, hexavalent chromium, PBB (polybrominated biphenyls), and PBDE (polybrominated diphenyl ethers). This directive was published in the official journal of the European Union in February 2003. Solder balls Surface finish of lead Making terminals lead-free Lead-free specifications Package Conventional specifications Sn-Pb plating Surface-mount type (SMD) Pin insertion type (THD) Lead-free specifications Sn-Bi plating Ni/Pd/Au plating Sn-Cu plating Ni/Pd/Au plating Same as conventional specifications Sn-Pb ball Sn-Ag-Cu ball Sn-Pb plating Sn-Bi plating Sn-Cu plating Sn-Pb dipping Sn-Cu dipping Ni/Pd/Au plating Sn-Cu plating Same as conventional specifications Au plating Same as conventional specifications Improving heat resistance Lead-free soldering generally requires higher reflow temperature. Renesas has set the heat-resisting temperature of a surfacemount type package at 260°C or 245°C to withstand mounting with an Sn-Ag-Cu or similar high-melting-point lead-free solder. Solder heat-resistance is defined by the package surface temperature, and an appropriate temperature profile is offered according to the heat capacity of the package. Heat-resistance reflow profiles of small, thin packages and large, thick packages are shown below. IR/air reflow profiles of small, thin packages and large, thick packages Information is available on an individual basis for devices that do not conform to the profiles shown below. Lead-free packaging Using lead free materials for semiconductors. Initially, priority will be given to making terminals lead-free.* The higher melting points of lead-free solders and the resulting higher mounting temperatures require enhanced heat resistance in components. * Technologies are under development for eliminating lead inside packages, including sealing glass, and also die-bonding materials in some products. The Renesas approach Heat-resistance improvement and provisions for mass production of lead-free terminals have been completed for all product families, and some products are already in mass production. consult a Renesas sales representative for the mass production details concerning particular products. The target date for the total abolition of lead from terminals is end of 2005. Lead-free products are differentiated from conventional products by a "Pb-Free T." marking on the label of the inner bag, box. Lead-free specifications for various packages Various test results Joint strength test results of lead-free plating products The joint strengths for both Alloy 42 and Cu lead frames are equivalent to conventional products (using Sn-Pb plating and Sn-Pb solder paste). Sn-Cu Ni/Pd/Au Sn-Cu Sn-Ag-Cu Sn Au plating plating plating dipping ball plating plating QFP,TQFP LQFP,HQFP IC,LSI package Package: 100-pin QFP (Alloy 42) Temperature cycle test conditions: -40/125°C Terminal surface finish Sn-Cu 20 SOP,TSSOP TSOP(1),TSOP(2) HSOP QFJ SOJ 18 16 14 Package: 100-pin QFP (Cu) Temperature cycle test conditions: -40/125°C Terminal surface finish Solder paste Sn-3.5Ag-0.7Cu Sn-Cu Sn-3.0Ag-0.5Cu Sn-Cu Sn-2.5Ag-05Cu-2.5Bi Sn-Cu Sn-8Zn-3Bi Sn-Cu Sn-37Pb Sn-Pb Sn-37Pb(Ref.) 20 18 16 Joint strength (N) Sn-Bi Joint strength (N) Surfacemount type (SMD) Appearance Joint strength test results Package name Package 12 10 8 6 4 2 2 1000 1500 2000 0 Test method IC,LSI package Terminal surface finish Sn-Bi 8 Terminal surface finish Sn-Bi Solder paste Sn-3Ag-0.7Cu 30 Sn-2.5Ag-1Bi-0.5Cu Sn-Bi Sn-2.5Ag-1Bi-0.5Cu Sn-3Ag-3Bi-0.7Cu Sn-Bi Sn-37Pb Sn-Bi Sn-37Pb Sn-Pb Sn-37Pb(Ref.) Sn-Pb Sn-37Pb(Ref.) 4 20 10 0 500 Test method 500 1000 Number of temperature cycles 45° Speed: 12 mm/min Sn-Ag-Cu ball 10 Shear strength Sn-Pb ball Shear strength (N) 9 8 7 6 5 4 3 2 1 0 0 In the case of packages for which a number of specifications are indicated, the specification is determined by products. Specifications may differ for outsourced products. Sn-2.5Ag-1Bi-0.5Cu Ni/Pd/Au Sn-37Pb Sn-Pb Sn-37P(Ref.) 10 0 200 400 600 Storage time (h) 800 1000 500 1000 Number of temperature cycles Vertical pull Shear Package: 240-pin FBGA Test conditions: Left at 150°C :Same as conventional specifications Ni/Pd/Au 20 Hook 45° pull Shear strength of ball products :Lead-free specifications 30 Solder paste Sn-3Ag-0.5Cu 0 0 1000 The joint strengths for Sn-Ag-Cu ball prodncts are equivalent to conventional products. DPAK(L) LDPAK(L) Terminal surface finish Ni/Pd/Au 2 Joint strength test results of lead-free ball products DO-34 DO-35 Package: 20-pin SOP (Cu) Temperature cycle test conditions: -55/125°C Solder paste Sn-Bi 6 0 TO-92,TO-220 TO-3P 2000 Sn-3Ag-0.5Cu Sn-Bi Number of temperature cycles Transistor, diode package 1500 45° Package: CMPAK-4 (Cu) Temperature cycle test conditions: -55/125°C 0 PGA 1000 Joint strength (N) 10 G-DIP C-DIP ZIP 500 45° pull Joint strength (N) DIP SDIP Sn-37Pb(Ref.) 45° Joint strength (N) Pin insertion type(THD) Sn-37Pb Sn-Pb Hook Package: 208-pin QFP (Alloy 42) Temperature cycle test conditions: -55/125°C URP UFP Sn-8Zn-3Bi Sn-Cu Number of temperature cycles 45° pull UPAK,SOT-89 DPAK(S),MP-3 LDPAK(S),TO-22OS MPAK SOT-23mod Sn-2.5Ag-05Cu-2.5Bi Sn-Cu 0 500 Hook Joint strength test results Transistor, diode package Sn-3.0Ag-0.5Cu Sn-Cu 8 Number of temperature cycles LGA Sn-Cu 10 4 0 BGA TFBGA HBGA Sn-3.5Ag-0.7Cu 12 6 0 P-VQFN 14 Solder paste Sn-Cu Hook Lead-free specifications for various packages Various test results Joint strength test results of lead-free plating products The joint strengths for both Alloy 42 and Cu lead frames are equivalent to conventional products (using Sn-Pb plating and Sn-Pb solder paste). Sn-Cu Ni/Pd/Au Sn-Cu Sn-Ag-Cu Sn Au plating plating plating dipping ball plating plating QFP,TQFP LQFP,HQFP IC,LSI package Package: 100-pin QFP (Alloy 42) Temperature cycle test conditions: -40/125°C Terminal surface finish Sn-Cu 20 SOP,TSSOP TSOP(1),TSOP(2) HSOP QFJ SOJ 18 16 14 Package: 100-pin QFP (Cu) Temperature cycle test conditions: -40/125°C Terminal surface finish Solder paste Sn-3.5Ag-0.7Cu Sn-Cu Sn-3.0Ag-0.5Cu Sn-Cu Sn-2.5Ag-05Cu-2.5Bi Sn-Cu Sn-8Zn-3Bi Sn-Cu Sn-37Pb Sn-Pb Sn-37Pb(Ref.) 20 18 16 Joint strength (N) Sn-Bi Joint strength (N) Surfacemount type (SMD) Appearance Joint strength test results Package name Package 12 10 8 6 4 2 2 1000 1500 2000 0 Test method IC,LSI package Terminal surface finish Sn-Bi 8 Terminal surface finish Sn-Bi Solder paste Sn-3Ag-0.7Cu 30 Sn-2.5Ag-1Bi-0.5Cu Sn-Bi Sn-2.5Ag-1Bi-0.5Cu Sn-3Ag-3Bi-0.7Cu Sn-Bi Sn-37Pb Sn-Bi Sn-37Pb Sn-Pb Sn-37Pb(Ref.) Sn-Pb Sn-37Pb(Ref.) 4 20 10 0 500 Test method 500 1000 Number of temperature cycles 45° Speed: 12 mm/min Sn-Ag-Cu ball 10 Shear strength Sn-Pb ball Shear strength (N) 9 8 7 6 5 4 3 2 1 0 0 In the case of packages for which a number of specifications are indicated, the specification is determined by products. Specifications may differ for outsourced products. Sn-2.5Ag-1Bi-0.5Cu Ni/Pd/Au Sn-37Pb Sn-Pb Sn-37P(Ref.) 10 0 200 400 600 Storage time (h) 800 1000 500 1000 Number of temperature cycles Vertical pull Shear Package: 240-pin FBGA Test conditions: Left at 150°C :Same as conventional specifications Ni/Pd/Au 20 Hook 45° pull Shear strength of ball products :Lead-free specifications 30 Solder paste Sn-3Ag-0.5Cu 0 0 1000 The joint strengths for Sn-Ag-Cu ball prodncts are equivalent to conventional products. DPAK(L) LDPAK(L) Terminal surface finish Ni/Pd/Au 2 Joint strength test results of lead-free ball products DO-34 DO-35 Package: 20-pin SOP (Cu) Temperature cycle test conditions: -55/125°C Solder paste Sn-Bi 6 0 TO-92,TO-220 TO-3P 2000 Sn-3Ag-0.5Cu Sn-Bi Number of temperature cycles Transistor, diode package 1500 45° Package: CMPAK-4 (Cu) Temperature cycle test conditions: -55/125°C 0 PGA 1000 Joint strength (N) 10 G-DIP C-DIP ZIP 500 45° pull Joint strength (N) DIP SDIP Sn-37Pb(Ref.) 45° Joint strength (N) Pin insertion type(THD) Sn-37Pb Sn-Pb Hook Package: 208-pin QFP (Alloy 42) Temperature cycle test conditions: -55/125°C URP UFP Sn-8Zn-3Bi Sn-Cu Number of temperature cycles 45° pull UPAK,SOT-89 DPAK(S),MP-3 LDPAK(S),TO-22OS MPAK SOT-23mod Sn-2.5Ag-05Cu-2.5Bi Sn-Cu 0 500 Hook Joint strength test results Transistor, diode package Sn-3.0Ag-0.5Cu Sn-Cu 8 Number of temperature cycles LGA Sn-Cu 10 4 0 BGA TFBGA HBGA Sn-3.5Ag-0.7Cu 12 6 0 P-VQFN 14 Solder paste Sn-Cu Hook Solder ball connection reliability Connection reliability of Sn-Ag-Cu balls is equivalent to conventional products. Cumulative failure rate (%) Sn-Ag-Cu ball vs Sn-Pb ball Connection reliability evaluation 99.9 99.0 95.0 Breakage evaluation with mounting on both sides of board Solder ball : Sn-Ag-Cu 90.0 80.0 70.0 60.0 50.0 40.0 30.0 20.0 15.0 10.0 Solder paste : Sn-Ag-Cu Test conditions Temperature : -25/125°C Solder ball : Sn-Pb Time : 20 min/cycle Solder paste : Sn-Pb 5.0 4.0 3.0 2.0 1.5 Package 240pin FBGA Mounting board specifications 1.0 FR-4 0.5 0.4 0.3 0.2 0.15 0.1 10 100 1000 10000 Number of temperature cycles Cross-sections of fillet shape after mounting on board Sn-Ag-Cu ball Conventional Sn-Pb ball Sn-Bi plating vs Sn-Pb plating Sn-Cu dipping vs Sn-Pb dipping Sn-Bi plating Conventional Sn-Pb plating Package Sn-Cu plating vs Sn-Pb plating Board Enlarged views of observed area Solder Sn-Cu plating Conventional Sn-Pb plating Ni/Pd/Au plating vs Sn-Pb plating Sn-Cu dipping Ni/Pd/Au plating Conventional Sn-Pb plating Conventional Sn-Pb dipping Solder ball connection reliability Connection reliability of Sn-Ag-Cu balls is equivalent to conventional products. Cumulative failure rate (%) Sn-Ag-Cu ball vs Sn-Pb ball Connection reliability evaluation 99.9 99.0 95.0 Breakage evaluation with mounting on both sides of board Solder ball : Sn-Ag-Cu 90.0 80.0 70.0 60.0 50.0 40.0 30.0 20.0 15.0 10.0 Solder paste : Sn-Ag-Cu Test conditions Temperature : -25/125°C Solder ball : Sn-Pb Time : 20 min/cycle Solder paste : Sn-Pb 5.0 4.0 3.0 2.0 1.5 Package 240pin FBGA Mounting board specifications 1.0 FR-4 0.5 0.4 0.3 0.2 0.15 0.1 10 100 1000 10000 Number of temperature cycles Cross-sections of fillet shape after mounting on board Sn-Ag-Cu ball Conventional Sn-Pb ball Sn-Bi plating vs Sn-Pb plating Sn-Cu dipping vs Sn-Pb dipping Sn-Bi plating Conventional Sn-Pb plating Package Sn-Cu plating vs Sn-Pb plating Board Enlarged views of observed area Solder Sn-Cu plating Conventional Sn-Pb plating Ni/Pd/Au plating vs Sn-Pb plating Sn-Cu dipping Ni/Pd/Au plating Conventional Sn-Pb plating Conventional Sn-Pb dipping Renesas Semiconductor Lead-Free Packages Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Renesas Semiconductor Lead-Free Packages Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corporation or a third party. 2. Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corporation by various means, including the Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corporation for further details on these materials or the products contained therein. http://www.renesas.com Copyright © 2003. Renesas Technology Corporation, All rights reserved. Printed in Japan. REJ01K0001-0100O Colophon 0.0 2003.4 www.renesas.com