ETC FAN8400D3TF

www.fairchildsemi.com
FAN8400D
Polygon Mirror Motor Drive IC
Features
Description
•
•
•
•
•
•
•
3-Phase BLDC motor driver IC with speed control
Phase Locked Loop (PLL) speed control
Built-in phase locked detector output
Current linear drive scheme
External clock for arbitrary motor speed
Built-in FG amplifier and integrating amplifier
Auto Gain Control (AGC) circuit for compensation hall
amplifier
• Built-in protection circuits (over-current limit, undervoltage limit, thermal shut down)
The FAN8400D is a monolithic integrated circuit. it is one
driver for laser beam printer (LBP) polygon mirror motor,
which has single chip implementation of all circuits. For
extremely high rotational precision, it employs the phase
locked loop (PLL) speed control scheme.
Typical application
Ordering Information
•
•
•
•
•
Polygon mirror motor drive IC for laser beam printer
Polygon mirror motor drive IC for facsimile
Polygon mirror motor drive IC for duplicator
Polygon mirror motor drive IC for multi function printer
General 3 phase BLDC motor drive IC
28-SSOPH-375SG2
Device
Package
Operating Temp.
FAN8400D3
28-SSOPH-375SG2
−20°C ~ +80°C
FAN8400D3TF
28-SSOPH-375SG2
−20°C ~ +80°C
Rev.1.0.2
©2001 Fairchild Semiconductor Corporation
FAN8400D
Pin Assignments
AGC
1
28
HW-
FGIN-
2
27
HW+
FGS
3
26
HU-
4
25
HU+
S/S
5
24
HV-
REF
6
23
HV+
NC
7
22
W
FGOUT
FIN
2
FAN8400D
FIN
SGND
8
21
V
LD
9
20
U
ECLK
10
19
RF
PD
11
18
PGND
EI
12
17
VCC
EO
13
16
VREG
FC
14
15
NC
FAN8400D
Pin Definitions
Pin Number
Pin Name
1
AGC
2
FGIN-
3
4
FGS
FGOUT
Pin Function Description
AGC amplifier frequency characteristics correction
FG amplifier inverting input
FG pulse output
FG amplifier output
5
S/S
Stop and start
6
REF
2.5V input
7
8
NC
SGND
Signal ground
9
LD
10
ECLK
Phase locked loop detector output
11
12
PD
EI
Phase locked loop detector output
Error amplifier inverting input
13
EO
Error amplifier output
14
FC
Control amplifier frequency correction
15
NC
-
16
17
VREG
VCC
Regulator voltage stabilization output
Power supply
18
PGND
Power ground
19
RF
20
21
U
V
U output
V output
22
W
W output
23
HV+
V hall amplifier non inverting input
24
25
HVHU+
V hall amplifier inverting input
U hall amplifier non inverting input
26
HU-
U hall amplifier inverting input
27
HW+
W hall amplifier non inverting input
28
HW-
W hall amplifier inverting input
External clock
Output current detection
3
FAN8400D
Internal Block Diagram
AGC
AGC
1
28
HW-
FGIN-
2
27
HW+
FGS
3
26
HU-
FGOUT
4
VREG
2
25
HU+
S/S
5
S/S
24
HV-
REF
6
23
HV+
NC
7
22
W
+
+
-
Hall
AMP
Matrix
PLL
FIN
4
SGND
8
LD
9
ECLK
10
PD
11
EI
12
EO
13
FC
14
Output
Controller
Clock
Lock
Detector
FIN
V-type
Control
OCL
TSD &
UVLO
+
Regulator
VREG
2
21
V
20
U
19
RF
18
PGND
17
VCC
16
VREG
15
NC
FAN8400D
Absolute Maximum Ratings (Ta = 25°°C)
Parameter
Symbol
Value
Unit
Remark
Maximum supply voltage
VCCMAX
30
V
-
Maximum output current
IOMAX
0.6
A
-
Pd
1.7
W
-
Operating temperature
TOPR
−20 ~ +80
°C
-
Storage temperature
TSTG
−50 ~ +150
°C
-
Power dissipation
Recommended Operating Conditions (Ta = 25°°C)
Parameter
Operating voltage range
Symbol
Min.
Typ.
Max.
Unit
VCC
20
24
28
V
5
FAN8400D
Electrical Characteristics (Ta = 25°°C)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
POWER SUPPLY CURRENT
Low power supply current
ICCL
Stop mode, VCC=20V
20
30
40
mA
Typical power supply current
ICCT
Stop mode, VCC=24V
21
31
41
mA
High power supply current
ICCH
Stop mode, VCC=28V
22
32
42
mA
OUTPUT POWER TRANSISTOR CHARACTERISTICS (VAGC = 3.5V)
U source saturation voltage (1)
VSATUU1 IO=0.6A, RF=0Ω
-
1.8
2.5
V
U source saturation voltage (2)
VSATUU2 IO=0.3A, RF=0Ω
-
1.6
2.3
V
U sink saturation voltage (1)
VSATUL1
IO=0.6A, RF=0Ω
-
0.5
1.0
V
U sink saturation voltage (2)
VSATUL2
IO=0.3A, RF=0Ω
-
0.25
0.7
V
V source saturation voltage (1)
VSATVU1
IO=0.6A, RF=0Ω
-
1.8
2.5
V
V source saturation voltage (2)
VSATVU2
IO=0.3A, RF=0Ω
-
1.6
2.3
V
V sink saturation voltage (1)
VSATVL1
IO=0.6A, RF=0Ω
-
0.5
1.0
V
V sink saturation voltage (2)
VSATVL2
IO=0.3A, RF=0Ω
-
0.25
0.7
V
W source saturation voltage (1)
VSATWU1 IO=0.6A, RF=0Ω
-
1.8
2.5
V
W source saturation voltage (2)
VSATWU2 IO=0.3A, RF=0Ω
-
1.6
2.3
V
W sink saturation voltage (1)
VSATWL1 IO=0.6A, RF=0Ω
-
0.5
1.0
V
W sink saturation voltage (2)
VSATWL2 IO=0.3A, RF=0Ω
-
0.25
0.7
V
U output leakage current
IOLEAKU
VCC=28V, OUT1=28V
-
-
100
µA
V output leakage current
IOLEAKV
VCC=28V, OUT2=28V
-
-
100
µA
W output leakage current
IOLEAKW VCC=28V, OUT3=28V
-
-
100
µA
UNDER VOLTAGE LIMIT
UVLO operating voltage
UVLO hysteresis
VSD
-
7.0
7.6
8.2
V
HVSD
-
1.0
1.3
1.6
V
VREG
-
5.8
6.3
6.8
V
REGULATOR VOLTAGE OUTPUT
Regulator output voltage
Power supply variation
HVREG1
VCC=20~28V
-
-
100
mV
Load variation
HVREG2
ILOAD=0~10mA
-
-
100
mV
HALL AMPLIFIER INPUT BLOCK
6
HU+ hall AMP input bias current
IBHA1+
-
-
2
10
µA
HU− hall AMP input bias current
IBHA1−
-
-
2
10
µA
HV+ hall AMP input bias current
IBHA2+
-
-
2
10
µA
HV− hall AMP input bias current
IBHA2−
-
-
2
10
µA
HW+ hall AMP input bias current
IBHA3+
-
-
2
10
µA
HW− hall AMP input bias current
IBHA3−
-
-
2
10
µA
Hall differential input range
VHIN
Sine wave input
50
-
350
mVp-p
Hall common input range
VICM
Differential input : 50mVP-P
3.5
-
VCC3.5
V
FAN8400D
Electrical Characteristics (Continued)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
FG AMP input bias current
IBFG
-
-1
-
1
µA
FG AMP DC bias level
VBFG
-
2.90
3.15
3.40
V
FG AMPLIFIER BLOCK
FG output high level voltage
VOHFG
No external load
VREG
-1.1V
-
-
V
FG output low level voltage
VOLFG
No external load
-
0.8
1.2
V
FG SCHMIDT COMPARATOR BLOCK
FGS high / low input hysteresis
VSHL
-
-50
0
50
mV
FGS low / high input hysteresis
VSLH
-
100
150
200
mV
FGS hysteresis
VFGL
-
100
-
200
mV
VFGSIL
-
400
-
-
mVp-p
FGS input operating level
FGS output saturation voltage
VFGSSAT IFGS=4mA
-
0.2
0.4
V
FGS output leakage current
IFGSLEAK VCC=28V
-
-
10
µA
ERROR AMPLIFIER BLOCK
Error AMP input bias current
IBER
-
-1
-
1
µA
Error AMP DC bias level
VBER
-
2.90
3.15
3.40
V
Error output high level voltage
VOHER
No external load
VREG
-1.1V
-
-
V
Error output low level voltage
VOLER
No external load
-
-
1.0
V
CURRENT LIMIT OPERATION
RF output voltage limit
VRF
-
0.55
0.60
0.65
V
Dead zone
VDZ
-
50
100
300
mV
Output idle voltage
VID
-
-
-
5
mV
Forward gain
GDF+
-
0.4
0.5
0.6
-
Reverse gain
GDF−
-
-0.6
-0.5
-0.4
-
Accelerate command voltage
VSTA
-
VREG
-1.1V
-
-
V
Decelerate command voltage
VSTO
-
-
0.8
1.5
V
CONTROLLER BLOCK
Forward limit voltage
VL+
RF=22Ω
-
0.60
-
V
Reverse limit voltage
VL−
RF=22Ω
-
0.60
-
V
PHASE COMPARATOR OUTPUT BLOCK
PD output high level voltage
VPDH
No external load
5.2
-
-
V
PD output low level voltage
VPDL
No external load
-
-
0.7
V
PD output source current
IPD+
VPD=0.5*VREG
-
-
-0.6
mA
PD output sink current
IPD−
VPD=0.5*VREG
1.0
-
-
mA
PHASE LOCKED LOOP DETECTOR OUTPUT BLOCK
LD output saturation voltage
VLDSAT
ILD=5mA
-
0.1
0.4
V
LD output leakage current
ILDLEAK
VCC=28V
-
-
10
µA
7
FAN8400D
Electrical Characteristics (Continued)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
0.5
-
7.0
KHz
3.7
4.2
4.7
V
EXTERNAL CLOCK INPUT BLOCK
External input frequency
FCLK
External clock mode
ECLK input open voltage
VIOCLK
ECLK input high level current
IIHCLK
VCLK=VREG
100
150
200
µA
ECLK input low level current
IILCLK
VCLK=0V
-400
-300
-200
µA
-
S/S BLOCK
S/S input high level voltage
VIHSS
-
3.0
-
VREG
V
S/S input low level voltage
VILSS
-
0
-
1.5
V
S/S hysteresis
VISSS
-
0.3
0.5
0.7
V
S/S input open voltage
VIOSS
-
3.7
4.2
4.7
V
S/S input high level current
IIHSS
VSS=VREG
100
150
200
µA
S/S input low level current
IILSS
VSS=0V
-400
-300
-200
µA
REFERENCE BLOCK
8
REF input level voltage
VIREF
-
2.0
-
3.0
V
REF input open voltage
VION2
-
3.7
4.2
4.7
V
REF input high level current
IIHN2
VREF=VREG
100
150
200
µA
REF input low level current
IILN2
VREF=0V
-400
-300
-200
µA
FAN8400D
Application Information
1. Output Block
•
•
•
•
•
•
3 Phase power transistor and free wheeling diodes
Reverse active type upper side diodes and parasitic lower side diodes
full wave current linear drive with current feedback
Connection with external capacitor to prevent voltage spike and oscillation by current drive
Output transistor commutation by "Winner takes all" method
Built in over current limit (OCL) circuit
2. Hall AMP Block
• Detection of rotor position using 3 phase hall sensors
• Determination of output commutation by hall signal
Forward torque [ Reverse torque]
Hall U
Hall V
Hall W
Output U
Output V
Output W
H
L
H
L [H]
H [L]
M [M]
H
L
L
L [H]
M [M]
H [L]
H
H
L
M [M]
L [M]
H [L]
L
H
L
H [L]
L [H]
M [M]
L
H
H
H [L]
M [M]
L [H]
L
L
H
M [M]
H [L]
L [H]
3. AGC Block
• This block is remained output amplitude.
• It is controlled by envelope through hall signals.
1
V AGC ∝ --------------------H NI – H I
NOTES:
VAGC is voltage of AGC output.
HNI is hall non inverting input voltage.
HI is hall inverting voltage.
4. Speed Control Block
• Digital phase locked loop (PLL) circuit
• Generating error pulse between rising edge of clock and falling edge of FG signal.
• High precision stable speed control
9
FAN8400D
5. FG AMP & FG Schmidt Comparator Block
• This block measures of motor rotation speed and controls motor speed.
• It is determined FG AMP gain and filter by external component.
• FG schmidt block change sine wave form to square wave form
6. Error AMP Block
•
•
•
•
It composes of dumping filter and ripple filter by external component.
It determines output amplitude of error AMP by width error pulse.
It is determined output current by output amplitude of error AMP.
Bidirectional torque control
RF Voltage [V]
Error AMP Output Voltage [V]
7. Regulator Block
• Power supply of control circuits in inside.
• Band gap reference circuits.
8. Lock Detector
• It is low when FG frequency reaches capture range of clock frequency.
• Open correct
9. FG Pulse Output
• Monitoring pin for motor rotative speed
• Open correct
10. Stop And Start
• Stop mode: Open or high voltage
• Start mode: Low voltage
10
FAN8400D
Test Circuits
VCC
3.5V
56K
+
0.1u
1
28
-
2
27
+
3
26
-
4
25
+
5
24
-
6
23
+
7
22
HW
1K
HU
1K
HV
2.5V
FAN8400D
VCC
VCC
VCC
VCC
8
21
9
20
10
19
11
18
12
17
13
16
14
15
10K
22
VREG
VCC
+
10u
+
0.1u
+
0.1u
11
FAN8400D
+
Typical Application Circuits
1
28
-
2
27
+
3
26
-
4
25
+
5
24
-
6
23
+
7
22
+
HW
+
HU
HV
2.5V
FAN8400D
8
21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
+
+
M
+
+
+
+
12
FAN8400D
13
FAN8400D
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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