Surface Mount PIN Diodes Technical Data HSMP-386x Series Features • Switching – Low Distortion Switching – Low Capacitance • Attenuating – Low Current Attenuating for Less Power Consumption • Matched Diodes for Consistent Performance • Better Thermal Conductivity for Higher Power Dissipation • Low Failure in Time (FIT) Rate[1] Note: 1. For more information see the Surface Mount PIN Reliability Data Sheet. 1 2 3 LUx • Unique Configurations in Surface Mount Packages – Add Flexibility – Save Board Space – Reduce Cost Pin Connections and Package Marking, SOT-363 6 5 4 Notes: 1. Package marking provides orientation, identification, and date code. 2. See “Electrical Specifications” for appropriate package marking. Description/Applications The HSMP-386x series of general purpose PIN diodes are designed for two classes of applications. The first is attenuators where current consumption is the most important design consideration. The second application for this series of diodes is in switches where low capacitance is the driving issue for the designer. The HSMP-386x series Total Capacitance (CT) and Total Resistance (RT) are typical specifications. For applications that require guaranteed performance, the general purpose HSMP-383x series is recommended. A SPICE model is not available for PIN diodes as SPICE does not provide for a key PIN diode characteristic, carrier lifetime. 2 Package Lead Code Identification, SOT-23 (Top View) Package Lead Code Identification, SOT-323 (Top View) SERIES SINGLE SERIES SINGLE #0 #2 B C COMMON ANODE COMMON CATHODE COMMON ANODE COMMON CATHODE #3 #4 E F Package Lead Code Identification, SOT-363 (Top View) UNCONNECTED TRIO 6 5 1 2 4 3 L Absolute Maximum Ratings[1] TC = +25°C Symbol Parameter Unit SOT-23 SOT-323 If Forward Current (1 µs Pulse) Amp 1 1 PIV Peak Inverse Voltage V 50 50 Tj Junction Temperature °C 150 150 Tstg Storage Temperature °C -65 to 150 -65 to 150 θjc Thermal Resistance[2] °C/W 500 150 ESD WARNING: Handling Precautions Should Be Taken To Avoid Static Discharge. Notes: 1. Operation in excess of any one of these conditions may result in permanent damage to the device. 2. TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made to the circuit board. Electrical Specifications TC = 25°C, each diode PIN General Purpose Diodes, Typical Specifications TA = 25°C Part Number HSMP3860 3862 3863 3864 386B 386C 386E 386F 386L Package Marking Code Lead Code Configuration 0 2 3 4 B C E F L Single Series Common Anode Common Cathode Single Series Common Anode Common Cathode Unconnected Trio [1] L0 L2 [1] L3 [1] L4 [1] L0 [2] L2 [2] L3 [2] L4 [2] LL [2] Test Conditions Notes: 1. Package marking code is laser marked. Minimum Typical Typical Breakdown Series Resistance Total Capacitance Voltage VBR (V) RS (Ω) CT (pF) 50 3.0/1.5* 0.20 VR = VBR Measure IR ≤ 10 µA IF = 10 mA f = 100 MHz VR = 50 V f = 1 MHz IF = 100 mA* 3 HSMP-386x Typical Parameters at TC = 25°C Part Number HSMP- Total Resistance RT (Ω) Carrier Lifetime τ (ns) Reverse Recovery Time Trr (ns) Total Capacitance CT (pF) 386x 22 500 80 0.20 IF = 1 mA f = 100 MHz IF = 50 mA TR = 250 mA VR = 10 V IF = 20 mA 90% Recovery VR = 50 V f = 1 MHz Test Conditions Typical Performance, TC = 25°C, each diode 1000 1 MHz 0.25 100 MHz 0.20 0.15 1 GHz 0 2 4 6 8 100 10 0.1 1 10 100 Figure 2. Typical RF Resistance vs. Forward Bias Current. 1000 VR = 10 V 100 VR = 20 V IF – FORWARD CURRENT (mA) 100 VR = 5 V 10 1 0.1 125°C 25°C –50°C 10 10 0.01 20 30 FORWARD CURRENT (mA) Figure 4. Reverse Recovery Time vs. Forward Current for Various Reverse Voltages. 0 0.2 0.4 0.6 0.8 1.0 1.2 VF – FORWARD VOLTAGE (mA) Figure 5. Forward Current vs. Forward Voltage. Equivalent Circuit Model HSMP-386x Chip* Rs Rj 1.5 Ω Cj 0.12 pF 110 Diode Mounted as a Series Switch in a 50 Ω Microstrip and Tested at 123 MHz 105 100 95 90 1 10 30 IF – FORWARD BIAS CURRENT (mA) BIAS CURRENT (mA) Figure 1. RF Capacitance vs. Reverse Bias. 115 85 1 0.01 10 12 14 16 18 20 REVERSE VOLTAGE (V) Trr – REVERSE RECOVERY TIME (ns) INPUT INTERCEPT POINT (dBm) 0.30 120 TA = +85°C TA = +25°C TA = –55°C RESISTANCE (OHMS) TOTAL CAPACITANCE (pF) 0.35 RT = 1.5 + R j CT = C P + C j 12 R j = 0.9 Ω I I = Forward Bias Current in mA * See AN1124 for package models Figure 3. 2nd Harmonic Input Intercept Point vs. Forward Bias Current for Switch Diodes. 4 Typical Applications for Multiple Diode Products RF COMMON RF COMMON RF 2 RF 1 RF 1 RF 2 BIAS 1 BIAS BIAS 2 BIAS Figure 7. High Isolation SPDT Switch, Dual Bias. Figure 6. Simple SPDT Switch, Using Only Positive Current. RF COMMON RF COMMON BIAS RF 1 RF 2 RF 2 RF 1 BIAS Figure 8. Switch Using Both Positive and Negative Current. Figure 9. Very High Isolation SPDT Switch, Dual Bias. VARIABLE BIAS RF IN/OUT INPUT FIXED BIAS VOLTAGE Figure 10. Four Diode π Attenuator. See AN1048 for details. 5 Typical Applications for Multiple Diode Products (continued) BIAS “ON” “OFF” 1 1 +V 0 2 0 +V 1 6 5 4 1 2 3 RF out RF in 2 Figure 12. HSMP-386L Unconnected Trio used in a Positive Voltage, High Isolation Switch. Figure 11. High Isolation SPST Switch (Repeat Cells as Required). 1 2 3 0 3 2 1 4 5 6 2 “ON” “OFF” 1 b1 b2 3 2 1 4 5 6 1 0 0 2 +V –V 1 b3 RF out RF in Figure 13. HSMP-386L used in a SP3T Switch. Figure 14. HSMP-386L Unconnected Trio used in a Dual Voltage, High Isolation Switch. Ordering Information Specify part number followed by option. For example: HSMP - 386x - XXX Bulk or Tape and Reel Option Part Number; x = Lead Code Surface Mount PIN Option Descriptions -BLK = Bulk, 100 pcs. per antistatic bag -TR1 = Tape and Reel, 3000 devices per 7" reel -TR2 = Tape and Reel, 10,000 devices per 13" reel Tape and Reeling conforms to Electronic Industries RS-481, “Taping of Surface Mounted Components for Automated Placement.” 6 Assembly Information SOT-323 PCB Footprint Recommended PCB pad layouts for the miniature SOT packages are shown in Figures 15, 16, 17. These layouts provide ample allowance for package placement by automated assembly equipment without adding parasitics that could impair the performance. 0.026 0.07 SMT Assembly Reliable assembly of surface mount components is a complex process that involves many material, process, and equipment factors, including: method of heating (e.g., IR or vapor phase reflow, wave soldering, etc.) circuit board material, conductor thickness and pattern, type of solder alloy, and the thermal conductivity and thermal mass of components. Components with a low mass, such as the SOT package, will reach solder reflow temperatures faster than those with a greater mass. 0.035 0.016 Figure 15. PCB Pad Layout, SOT-323. (dimensions in inches). 0.026 Agilent’s diodes have been qualified to the time-temperature profile shown in Figure 18. This profile is representative of an IR reflow type of surface mount assembly process. After ramping up from room temperature, the circuit board with components attached to it (held in place with solder paste) passes through one or more preheat zones. The preheat zones increase the temperature of the board and components to prevent thermal shock and begin evaporating solvents from the solder paste. The reflow zone briefly elevates the temperature sufficiently to produce a reflow of the solder. The rates of change of temperature for the ramp-up and cooldown zones are chosen to be low enough to not cause deformation of the board or damage to components due to thermal shock. The maximum temperature in the reflow zone (TMAX) should not exceed 235°C. These parameters are typical for a surface mount assembly process for Agilent diodes. As a general guideline, the circuit board and components should be exposed only to the minimum temperatures and times necessary to achieve a uniform reflow of solder. 0.075 250 0.035 TMAX 0.016 Figure 16. PCB Pad Layout, SOT-363. (dimensions in inches). 0.037 0.95 0.037 0.95 TEMPERATURE (°C) 200 150 Reflow Zone 100 Preheat Zone Cool Down Zone 50 0 0 0.079 2.0 120 0.031 0.8 inches mm Figure 17. PCB Pad Layout, SOT-23. 180 TIME (seconds) Figure 18. Surface Mount Assembly Profile. 0.035 0.9 DIMENSIONS IN 60 240 300 7 Package Dimensions Outline SOT-323 (SC-70) Outline 23 (SOT-23) PACKAGE MARKING CODE (XX) 1.30 (0.051) REF. 1.02 (0.040) 0.89 (0.035) 2.20 (0.087) 2.00 (0.079) XXX DATE CODE (X) 0.54 (0.021) 0.37 (0.015) PACKAGE MARKING CODE (XX) 1.35 (0.053) 1.15 (0.045) 3 1.40 (0.055) 1.20 (0.047) XXX 1 0.650 BSC (0.025) 0.425 (0.017) TYP. 2.20 (0.087) 1.80 (0.071) DATE CODE (X) 0.50 (0.024) 0.45 (0.018) 2.65 (0.104) 2.10 (0.083) 2 2.04 (0.080) 1.78 (0.070) TOP VIEW 0.10 (0.004) 0.00 (0.00) 0.30 REF. 1.00 (0.039) 0.80 (0.031) 0.25 (0.010) 0.15 (0.006) 10° 0.152 (0.006) 0.066 (0.003) 3.06 (0.120) 2.80 (0.110) 0.30 (0.012) 0.10 (0.004) 1.02 (0.041) 0.85 (0.033) 0.20 (0.008) 0.10 (0.004) 0.69 (0.027) 0.45 (0.018) 0.10 (0.004) 0.013 (0.0005) DIMENSIONS ARE IN MILLIMETERS (INCHES) SIDE VIEW DIMENSIONS ARE IN MILLIMETERS (INCHES) Outline 363 (SC-70, 6 Lead) PACKAGE MARKING CODE (XX) 1.30 (0.051) REF. 2.20 (0.087) 2.00 (0.079) XXX DATE CODE (X) 1.35 (0.053) 1.15 (0.045) 0.650 BSC (0.025) 0.425 (0.017) TYP. 2.20 (0.087) 1.80 (0.071) 0.10 (0.004) 0.00 (0.00) 0.30 REF. 1.00 (0.039) 0.80 (0.031) 0.25 (0.010) 0.15 (0.006) 10° 0.30 (0.012) 0.10 (0.004) 0.20 (0.008) 0.10 (0.004) DIMENSIONS ARE IN MILLIMETERS (INCHES) Package Characteristics Lead Material ............................ Copper (SOT-323/363); Alloy 42 (SOT-23) Lead Finish ............................................................................ Tin-Lead 85-15% Maximum Soldering Temperature .............................. 260°C for 5 seconds Minimum Lead Strength .......................................................... 2 pounds pull Typical Package Inductance .................................................................. 2 nH Typical Package Capacitance .............................. 0.08 pF (opposite leads) END VIEW Device Orientation REEL TOP VIEW END VIEW 4 mm 8 mm CARRIER TAPE USER FEED DIRECTION ### ### ### ### Note: “###” represents Package Marking Code, Date Code. COVER TAPE Tape Dimensions For Outline SOT-323 (SC-70 3 Lead) P P2 D P0 E F W C D1 t1 (CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS) K0 8° MAX. A0 DESCRIPTION 5° MAX. B0 SYMBOL SIZE (mm) SIZE (INCHES) www.agilent.com/semiconductors LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER A0 B0 K0 P D1 2.24 ± 0.10 2.34 ± 0.10 1.22 ± 0.10 4.00 ± 0.10 1.00 + 0.25 0.088 ± 0.004 0.092 ± 0.004 0.048 ± 0.004 0.157 ± 0.004 0.039 + 0.010 For product information and a complete list of distributors, please go to our web site. DIAMETER PITCH POSITION D P0 E 1.55 ± 0.05 4.00 ± 0.10 1.75 ± 0.10 0.061 ± 0.002 0.157 ± 0.004 0.069 ± 0.004 Europe: +49 (0) 6441 92460 CARRIER TAPE WIDTH THICKNESS W t1 8.00 ± 0.30 0.255 ± 0.013 0.315 ± 0.012 0.010 ± 0.0005 India, Australia, New Zealand: (+65) 6271 2394 COVER TAPE WIDTH TAPE THICKNESS C Tt 5.4 ± 0.10 0.062 ± 0.001 0.205 ± 0.004 0.0025 ± 0.00004 DISTANCE CAVITY TO PERFORATION (WIDTH DIRECTION) F 3.50 ± 0.05 0.138 ± 0.002 CAVITY TO PERFORATION (LENGTH DIRECTION) P2 2.00 ± 0.05 0.079 ± 0.002 CAVITY PERFORATION For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright © 2002 Agilent Technologies, Inc. Obsoletes 5968-7687E September 16, 2002 5988-7917EN