ETC L3235N

L3234
L3235N
®
HIGHLY INTEGRATED SLIC KIT TARGETED TO PABX
AND KEY SYSTEM APPLICATIONS
HIGHLY INTEGRATED SUBSCRIBER LINE
INTERFACE KIT FOR PABX AND KEY SYSTEM APPLICATIONS
IMPLEMENTS ALL KEY ELEMENTS OF THE
BORSCHT FUNCTION
INTEGRATED ZERO CROSSING BALANCED
RINGING INJECTION ELIMINATES EXTERNAL RELAY AND CENTRALISED RINGING
GENERATOR
ZERO NOISE INJECTED ON ADJACENT
LINES DURING RINGING SEQUENCE
LOW POWER IN STANDBY AND ACTIVE
MODES
BATTERY FEED WITH PROGRAMMABLE
LIMITING CURRENT
PARALLEL LATCHED DIGITAL INTERFACE
SIGNALLING FUNCTIONS (OFF HOOK,
GND-KEY)
LOW NUMBER OF EXTERNAL COMPONENTS
INTEGRATED THERMAL PROTECTION
INTEGRATED OVER CURRENT PROTECTION
0°C TO 70°C: L3234/L3235N
-40°C TO 85°C: L3234T/L3235NT
DESCRIPTION
The L3234/L3235N is a highly integrated SLIC
KIT targeted to PABX and key system applications
The kit integrates the majority of functions required to interface a telephone line. The
L3234/L3235N implements the main features of
the broths function:
- Battery Feed (Balanced Mode)
- Ringing Injection
- Signalling Detection
- Hybrid Function
December 2001
HEPTAWATT
ORDERING NUMBER: L3234
TQFP44
ORDERING NUMBER: L3235N
The Kit comprises 2 devices, the L3234 ringing
injector fabricated in Bipolar in 140V Technology.
Its function is to amplify and inject in balanced
mode with zero crossing the ringing signal. The
device requires an external positive supply of
100V and a low level sinusoid of approx.
950mVrms. The L3235N Line Feeder is integrated in 60V Bipolar Technology. The L3235N
provides battery feed to the line with programmable current limitation. The two to four wire voice
frequency signal conversion is implemented by
the L3235N and line terminating and balance impedances are externally programmable. The
L3234/L3235N kit is designed for low power dissipation. In a short loop condition the extra power is
dissipated on an external transistor. The Kit is
controlled by five wire parallel bus and interfaces
easily to all the STLC5046 and STLC5048
CODECs. In Kit with STLC5048 (see fig 1) the
line impedance synthesis and echo canceling are
performed inside the CODEC.
1/25
2/25
SERIAL
CONTROL
PORTS
VCC
CI
CO
VFXI3
VFRO3
VFXI2
VFRO2
VFXI1
VFRO1
IO15(CS3)
IO14(CS2)
IO13(CS1)
IO12(CS0)
IO11
VCC
VSS
D98TL381
0.1µF
17
4
1
6
0.1µF
CVSS
2
0.1µF
CVB
VBAT
35
14
24
20
34
22
44
40
38
18
6
CS
CS
39
29
2
GND
RP1
CGF
390nF
GKF
REF
LIM
VPOL
RTF
BASE
VREG
10µF
RT
1MΩ
RR
51K
VBAT
RLIM
9.1K
to 35K
TEXT
MJE350
D2
1N4007
RGF
39K
RP1
82Ω
82Ω
D1
1N4007
CAC
100µF
7
5
RING 30Ω
TIP
IL
CAC
3
VCC
30Ω
0.1µF
L3234
0.1µF
VBAT
L3235N
GND
VA
AGND
4.7µF
VSS
13
3
32
28
27
25
31
9
10
12
11
43
7
CVCC
VCC
GDK
IO4
CCLK
SBY
PUNEG
RNG
OH
IO3
CTX 100nF
TX
IO2
IO1
IO0
VFXI0
ZB
RX
ZA
ZAC
ZS=4100Ω
100K
VDD
0.1µF
VFRO0
100µF
SUB
VSS
VDD
BGND
STLC5048
VEE
VCC
VRING
CS
RES
INT
TSX
MCLK
FS
DR
DX
GND
0.1µF
VCC
V100
RP2 20Ω
CR
4.7µF
CF
390nF
RP2 20Ω
OVERVOLTAGE
PROTECTION
10µF
RF
39K
RING
TIP
L3234 - L3235N
ABS TYPICAL LINE CARD APPLICATION
L3234 - L3235N
L3234
Solid State Ringing Injector
DESCRIPTION
The L3234 is a monolithic integrated circuit which
is part of a kit of solid state devices for the subscriber line interface. The L3234 sends a ringing
signal into a two wires analog telephone line in
balanced mode. The AC ringing signal amplitude
is up to 60Vrms, and for that purpose a positive
supply voltage of +100V shall be available on the
subscriber card.
The L3234 receives a low amplitude ringing signal (950mVrms) and provide the voltage/current
amplification (60Vrms/70mA) when the enable input is active (CS > 2V). In disable mode (CS <
0.8V) the power consumption of the chip is very
low (<14mW).
The circuit is designed with a high voltage bipolar
technology (VCEO > 140V / VCBO > 250V).
HEPTAWATT
The package is a moulded plastic power package
(Heptawatt) suitable also for surface mounting.
BLOCK DIAGRAM
3/25
L3234 - L3235N
PIN CONNECTION (Top view)
7
OUT2
6
V100
5
OUT1
4
GND
3
VCC
2
CS
1
VA
D94TL131
ABSOLUTE MAXIMUM RATINGS
Symbol
V100
Parameter
Positive Power Supply Voltage
Value
Unit
+120
V
VCC
5V Power Supply Voltage
5.5
V
VA
Low Voltage Ringing Signal (with V100 = 120Vdc)
1.4
Vrms
CS
Logical Ring Drive Input
VCC
Max. Junction Temperature
150
o
-55 to +150
o
Tj
Tstg
Storage Temperature
C
C
OPERATING RANGE
Symbol
Value
Unit
V100
High Power Supply Voltage
95 to 105
V
VCC
Low Power Supply Voltage
5 ±5%
V
VA
Low Voltage Ringing Signal
600 to 950
within 10Hz - 100Hz
Vrms
Top
Operating Temperature for L3234
Max. Junction Operating Temperature (due to thermal protection)
0 to 70
130
°C
°C
Tjop
Parameter
Note: Operating ranges define those limits between which the functionality of the device is guaranteed.
THERMAL DATA
Symbol
Rth j-case
Rth j-amb
Description
Value
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Max.
Max.
PIN DESCRIPTION
4/25
Pin
Name
1
2
VA
CS
Low Voltage Ringing Signal Input
Logical Ring Drive Input
Description
3
VCC
+5V Low Power Supply
4
GND
Common Analog-Digital Ground
5
OUT1
Ringing Signal Output
6
V100
+100V High Power Supply
7
OUT2
Ringing Signal Output in Opposite Phase with Out1
4
50
Unit
o
C/W
C/W
o
L3234 - L3235N
OPERATION DESCRIPTION
The Fig. 1 show the simplified circuit configuration
of the L3234 Solid State Ringing injector when
used with the L3235N Line Feeder.
Figure 1: L3234/L3235N Circuit Configuration
+100V
CO1
A
TIP
LINE TERMINALS
RING
B
CO2
V100
RO1
OUT1
RO2
OUT2
CS
CS
5
GND
C100
CVCC
GND
VCC
6
4
GND
L3235N
-VBAT
3
RINGING INJECTOR
7
L3234
2
1
VA
CA
LINE FEEDER
+5V
D94TL-L3235N
VA
EXTERNAL COMPONENTS LIST
In the following table are shown the recommended external components values for L3234.
Ref.
Value
R01, R02
82Ω
C01, C02
10µF - 160V
Ringing Feeding De coupling Capacitors
Low Level Ringing Signal De coupling Capacitor
CA
4.7µF - 10V
C100
100nF - 100V
CVCC
100nF
Involved Parameter or Function
Ringing Feeding Series Resistors
Positive Battery Filter
+5V Supply Filter
When the ringing function is selected by the subscriber card, a low level signal is continuously applied to pin 1 through a de coupling capacitor. Then
the logical ring drive signal CS provided by L3235N
is applied to pin 2 with a cadenced mode.
The ringing cycles are synchronised by the L3234
in such a way that the ringing starts and stops always when the analog input signal crosses zero.
When the ringing injection is enabled (CS = "1"),
an AC ringing signal is injected in a balanced
mode into the telephone line.
When the ringing injection is disabled (CS = "0"),
the output voltage on OUT2 raises to the high
power supply, whereas on OUT1, it falls down to
ground.
The L3234 has a low output impedance when
sending the signal, and high output impedance
when the ringing signal is disabled
In fig. 2 the dynamic features of L3234 are
shown.
5/25
L3234 - L3235N
Figure 2: Dynamic Features of L3234
DATA TRANSMISSION INTERFERENCE TEST
The L3234 meet the requirements of the technical
specification ST/PAA/TPA/STP/1063 from the
CNET. The test circuit used is indicated below.
The measured error rate for data transmission is
lower than 10-6 during the ringing phase.
This test measures if during the ringing phase the
circuit induce any noise to the closer lines.
Figure 3: Test Circuit Data Transmission Interference Test
6/25
L3234 - L3235N
ELECTRICAL CHARACTERISTICS (Test conditions: V100 = +100V, VCC = +5V, Tamb = 25°C, unless otherwise specified)
Note: Testing of all parameter is performed at 25°C. Characterisation, as well as the design rule used allow correlation of tested performance with actual performances at other temperatures. All parameters listed here are met in the range 0°C to +70°C.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
45
560
100
800
µA
µA
6
92
V
V
70
70
kΩ
kΩ
Fig
STAND BY MODE: CS = "0"
IS (V100)
IS (VCC)
Consumption
VA = 950mVrms; 50Hz
VSOUT1
VSOUT2
DC Output Voltage
VA = 950mVrms; 50Hz
ZSOUT1
ZSOUT2
Output Impedance
ZOUT Matching
THD
4
15
%
VLINE < 6dBm; f = 1kHz
-46
-40
dB
Consumption
Z LINE = ∞
VA = 950mVrms; 50Hz
2.5
2.2
5
3
mA
mA
DC Output Voltage
VA = 0V
44
44
56
56
V
V
Threshold Voltage on the
Logical Input CS
VA = 950mVrms; 50Hz
2.0
1
V
µA
0.8
1
V
µA
150
mA
12
7
Harmonic Distortion During
Emission
5
RINGING PHASE: CS = "1"
DC OPERATION
IR (V100)
IR (VCC)
VROUT1
VROUT2
VIH
IIH (CS = 0)
VIL
IIL (CS = 0)
Ilim
DC Line Current Limitation
VA = 0V
70
6
AC OPERATION
VOUT1/VA
VOUT2/VA
VOUT1 -VOUT1
THD VLINE
ZIN (VA)
ZOUT
Ringing Gain
Z LINE = 2.2µF + 1kΩ
VA = 0dBm
Ringing Signal
ZLINE = 2.2µF + 1kΩ
VA = 950mVrms; 50Hz
Harmonic Distortion
VA = 950mVrms; 50Hz
Input Impedance
VA = 950mVrms; 50Hz
Differential Output Impedance
ILINE < 50mArms
29.5
29.5
30
30
dB
dB
57
60
Vrms
7
5
40
20
%
kΩ
8
Ω
9
TEST CIRCUITS
Figure 4.
7/25
L3234 - L3235N
TEST CIRCUITS (continued)
Figure 5.
CS
2
VCC
V100
3
6
7
1
5
4
B
82Ω
L3234
4.7µF
10µF/160V
VOUT2
V
10µF/160V
A
VOUT1
ZLINE=600Ω
82Ω
-VBAT
1MΩ
GND
LINE FEEDER
VE 1KHz
D94TL133
Figure 6.
Figure 7.
8/25
L3234 - L3235N
TEST CIRCUITS (continued)
Figure 8.
Figure 9.
Figure 10.
9/25
L3234 - L3235N
L3235N
Subscriber Line Interface Circuit
TQFP44
VREG
ZAC
N.C.
N.C.
RING
Vbat
TIP
N.C.
N.C.
GKF
RTF
PIN CONNECTION
44
43
42
41
40
39
38
37
36
35
34
30
N.C.
N.C.
5
29
CS
CAC
6
28
PU
RPC
7
27
SBY
N.C.
8
26
N.C.
TX
9
25
RNG
ZB
10
24
LIM
ZA
11
23
N.C.
12
13
14
15
16
17
18
19
20
21
22
BASE
4
N.C.
OH
N.C.
VPOL
31
N.C.
3
IL
GDK
BGND
VSS
32
N.C.
N.C.
2
N.C.
33
AGND
REF
1
RX
N.C.
VCC
DESCRIPTION
Circuit description
The L3235N Subscriber Line Interface Circuit
(SLIC) is a bipolar integrated circuit in 60V technology optimized for PABX application.
The L3235N supplies a line feed voltage with a
current limitation which can be modified by an external resistor (RLIM).
The SLIC incorporates loop currents, ground key
detection functions with an externally programmable constant time.
The two to four wires and four to two wires voice
frequency signal conversion is performed by the
L3235N and the line terminating and the balancing impedances are externally programmable.
The device integrates an automatic power limitation circuit. In short loop condition the extra power
is dissipated on one external transistor (Text).
This aproach allows to assembly the L3235N in a
low cost standard plastic TQFP44 package.
The chip is protected by thermal protection at
Tj = 150°C.
The SLIC is able to give a power up command for
Combo in off hook condition and an enable logic
for solid state ringing injector L3234.
The L3235N package is 44 pin plastic TQFP.
The L3235N has been designed to operate
togheter with L3234 performing complete
BORSHT function without any electromechanical
ringing relay (see the application circuit fig. 16).
D99TL456
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VBAT
Battery Voltage
-54
V
VCC
VSS
Positive Supply Voltage
Negative Supply Voltage
5.5
-5.5
V
V
150
°C
-55 to +150
°C
Tj
Tstg
Max. Junction Temperature
Storage Temperature
OPERATING RANGE
Symbol
Min.
Max.
Unit
VBAT
Battery Voltage
-52
-24
V
VCC
Positive Supply Voltage
4.75
5.25
V
VSS
Negative Supply Voltage
-5.25
-4.75
V
Top
Operating Temperature for L3235N
0
70
°C
130
°C
Tj
Parameter
Max Junction Operating Temperature
Note: Operating ranges define those limits between which the functionality of the device is guaranteed.
10/25
L3234 - L3235N
THERMAL DATA
Symbol
Rth j-amb
Description
Thermal Resistance Junction-ambient
Max
Value
Unit
60
°C/W
PIN DESCRIPTION
N°
Name
1,4,5,8,
15,16,19
,21,23,
26,30,33
,36,37,
41,42
NC
Description
2
AGND
Analog/Digital Ground.
3
BGND
Battery Ground. This is the Reference for the Battery Voltage (note 1).
6
CAC
AC Current Feedback Input.
7
RPC
External Protection Resistors AC Transmission Compensation.
9
TX
Four Wire Transmitting Amplifier Output.
10
ZB
Non Inverting Operational Input Inserted in the Hybrid Circuit for 2W to 4W Conversion.
The Network Connected from this Pin to Ground shall be a copy of the Line Impedance.
11
ZA
VRX Output Buffer 2W to 4W Conversion.
12
RX
High Impedance Four Wire Receiving Input.
13
VCC
Positive 5V Supply Voltage.
14
REF
Voltage Reference Output; a Resistor Connected to this pin sets the Internal Bias Current.
17
VSS
18
IL
20
VPOL
Non Inverting Operational Input to Implement DC Character.
22
BASE
Driver for External Transistor Base.
24
LIM
25
RNG
Ringing Logic Input from Line Card Controller.
27
SBY
Stand by Logic Input (SBY = 1 Set Line Current Limitation at 3mA).
Not Connected
Negative 5V Supply Voltage.
Transversal Line Current Feedback Divided by 50.
Voltage Reference Output; a Resistor Connected to this Pin Sets the Value of Line
Current Limitation.
28
PU
Power u.p Logic Output for the Codec Filter. (PU = 0 means Codec Filter Activated)
29
CS
Ring Injector Enable for L3234 Output. (CS = 1 means L3234 Ringing Injection Enable).
31
OH
Hook Status Logic Output (OH = 0 means off hook).
32
GDK
Ground Key Status Logic Output (GDK = 0 means Ground Key on).
34
RTF
Time Constant Hook Detector Filter Input.
35
GKF
Time Constant GK Detector Filter Input.
38
TIP
Tip Wire of 2 Wire Line Interface.
39
Vbat
Negative Battery Supply Input.
40
RING
RING wire of 2 Wire Line Interface.
43
ZAC
Non Inverting Input of the AC Impedance Synthesis Circuit.
44
VREG
Emitter Connection for the External Transistor.
Note 1:
AGND and BGND pins must be tied together at a low impedance point (e.g. at card connector level).
11/25
L3234 - L3235N
L3235N FUNCTIONAL DIAGRAM
FUNCTIONAL DESCRIPTION
DIGITAL INTERFACE
The different operating modes of the L3235N are
programmed through a digital interface based on
two input pins:
1)SBY input programs the stand-by or Active/Ringing modes.
2)RNG input programs the ringing ON/OFF activation condition for the L3234.
The L3235N digital interface has four output pins :
1)OH provides the on hook/off hook or ring trip
informations (active low).
2)GDK provides the ground key on/off information (active low).
3)PU must be connected to the enable input pin
of CODEC/FILTER devices like ETC 5054/57
12/25
and automatically activates this device when
in active mode off-hook is detected or when
ringing mode is selected.
4)CS output must be connected to the CS enable input of the solid state ringing injector
L3234.
In this way the L3234 will be enabled when ringing mode is programmed and will be automatically disabled when the ring trip condition will be
detected reducing the ringing signal disconnection time after ring trip.
The table 1 here below resumes the different operation modes and the relative logic output signals.
The two current detection (hook and GND key)
have internal fixed threshold. Externally it is possible to program their time costant through two R-C
components connected respectively to pin 26
(RTF) and pin 27 (GKF).
L3234 - L3235N
Table 1.
OPERATING
MODE
INPUT PIN
LINE STATUS
0: ON HOOK
1: OFF HOOK
0
0
1
1
SBY
RNG
ACTIVE
0
0
0
0
0
0
0
0
RINGING
0
0
0
0
1
1
1
1
0
0
1
1
STAND-BY
1
1
0
1
X
X
OUTPUT PIN
0: NO GND KEY
1: GND KEY ON
0
1
0
1
OH
GDK
PU
CS
1
0
0
0
1
0
1
0
1
0
0
0
0
0
0
0
0
1
0
1
1
0
0
0
1
0
1
0
0
0
0
0
1
0(*)
0(*)
0(*)
X
X
1
1
1
1
1
0
0
1
(*)This status is latched and doesn’t change until RNG turn to 0
OPERATING MODES
Stand-By (SBY = 1 and RNG = 0)
In Stand-By mode the L3235N limits the DC Loop
current to 3 mA.
In this mode all the AC circuits are active and all
the AC characteristics are the same as in Active
Mode.
Also the two Line Current detectors (hook and
GND key) are active but due to the loop current
limited to 3 mA they will not be activated.
This mode is useful in emergency condition when
it is very important to limits the system power dissipation.
Ringing Mode (SBY = 0 and RNG = 1)
When ringing mode is selected "CS" pin is set to
1 in order to activate the L3234 ringing injector.
See L3234 for detailed description.
Ring trip is detected by means of the same internal circuitry used for off-hook detection.
An off-hook delay time lower than 1⁄2 FRING should
be selected. (see ext. components list).
When ring trip is detected "CS" is automatically
set to "0" allowing in this way a quick ringing disconnection.
After Ring trip detection the Card Controller must
set the L3235N in active mode to remove the internal latching of the "CS" information.
Active mode (SBY = 0 and CS1 = 0)
In Active mode the L3235N has the DC characteristic show in Fig.13
The DC characteristics of L3235N has two different feeding conditions:
1)Current Limiting Region : (short loop) the DC
impedance of the SLIC is very high (>20
Kohm) therefore the system works as a current generator. By the ext. resistor RLIM connected at pin 19 it is possible to program limiting current values from 20 mA to 70 mA.
2) Voltage source region (long loop).
The DC impedance of the L3235N is almost
equal to zero therefore the system works like
a voltage generator with in series the two external protection resistors Rp.
When a limiting current value higher than 40 mA
is programmed the device will automatically reduce to 40 mA the loop current for very short
loop.
This is done in order to limit the maximum power
dissipation in very short loop to values lower than
2W for the external transistor and lower than
0.5W for the L3235N itself.
This improve the system reliability reducing the
L3235N power dissipation and therefore the internal junction temperature.
13/25
L3234 - L3235N
Figure 11: DC characteristic in Active Mode with two different values of limiting current (30mA and 70 mA).
Figure 12: Line current versus loop resistance with two different values of limiting current (30mA and
70mA)
AC transmission circuit stability
To ensure stability of the feedback loop shown in
block diagram form in figure 13 two capacitors are
required. Figure 14 includes these capacitors Cc
and Ch.
AC - DC separation
The high pass filter capacitor CAC provides the
separation between DC circuits and AC circuits. A
CAC value of 100mF will position the low end frequency response 3dB break point at 7Hz,
fsp =
14/25
1
2π ⋅ 220Ω ⋅ CAC
L3234 - L3235N
Figure 13.
Cac
Cac
IL
18
6
IL/50
38 TIP
Zl
IL'/50
RX
12
+
X2
Vl
40 RING Eg
-1
Vrx
RP
TX
Vtx
RP
+1
9
+
111
10
ZB
ZA
43
ZAC
7
L3235N
RPC
AC Characteristic
equal to :
A simplified AC model of the transmission circuits
is shown in figure 13
Where:
is the received signal
Vrx
Vtx
is the transmitted signal
Vl
is the AC transversal voltage in line
EG
is the line open circuit AC voltage
is the line impedance
ZL
RP
are the protection resistors
ZB
is the line impedance balancing network
ZA
is the SLIC impedance balancing network
ZAC
programmable AC line termination
impedance
used for external protection resistors
RPC
insertion loss compensation
is the AC transversal current divided by 50
Il/50
CAC AC feedback current decoupling
GTX = Vtx / Vl
GTX = 0.25 * (RPC + ZAC) / (25RP + ZAC)
using
RPC = 25RP , as recommended to
compensate the protection resistor RP,
GTX = 0.25 (-12 dB)
Four wire to two wire gain
The receiver gain , Grx, of the SLIC is equal to:
GRX = Vl / Vrx
GRX = 50Zl / (ZAC +12.5(Zl + 2RP))
using ZAC = 12.5(Zs - 2RP) and assuming
Zl
= Zs we have the following gain:
GRX = 2
(+6 dB)
Hybrid function
The transybrid loss, Thl, is equal to:
Thl = Vtx / Vrx
AC behavior
The AC path simplified formulas, that are valid
when Il/50’ is equal to Il/50, are the following :
Two wire impedance
The impedance presented to the two wire by
the SLIC including the protection resistors RP
and defined as Zs is equal to :
Zs = ZAC/12.5 + 2RP
i.e. with ZAC = 6250 W and Rp = 50 W
Zs = 600 W
Two wire to four wire gain
The transmission gain , Gtx, of the SLIC is
Thl = ZB / (ZA + ZB)-(ZAC +RPC) / (ZAC +
+ 12.5(2RP + Zl))
using ZAC = 12.5(ZS - 2RP) and RPC = 25RP
we have the following relation:
Thl = ZB / (ZA + ZB) - Zl / (Zl + Zs)
To maximize the hybrid attenuation the impedance must be matched, ZA / ZB = ZS / Zl, to
guarantee Thl = 0.
From the above relation it is evident that if Zs is
equal to the Zl in Thl test the impedance ZA and
ZB can be substituted by two equal resistors.
15/25
L3234 - L3235N
External components list for L3235N
To set the SLIC into operation the following parameters have to be defined:
- The AC SLIC impedance at line terminals "Zs" to which the return loss measurements is referred. It can
be real (typ. 600Ω) or complex.
- The equivalent AC impedance of the line "Zl" used for evaluation of the trans-hybrid loss performance
(2/4 wire conversion). It is usually a complex impedance.
- The value of the two protection resistors Rp in series with the line termination.
Once, the above parameters are defined, it is possible to calculate all the external components using the
following table. The typical values has been obtained supposing: Zs = 600Ω; Zl = 600Ω; Rp = 50Ω
Name
RF
CF
RGF
CGF
RR
RLIM
Suggested Value
39KΩ
390nF
39KΩ
390nF
51KΩ
8.4KΩ to 33KΩ
Function
Delay Time
On-hook Off-hook
Delay Time
GK Detector
Bias Set
Ext. Current Limit. Progr.
CR
4.7µF
6.3 V 30%
Negative Battery
Filter
RP
RT
CAC
50
1MΩ 20%
100µF
6.3V 20%
Protection Resistors
Termination Resistor
DC/AC current feedback splitting
RPC
ZAC
CC
1250Ω 1%
6250Ω 1%
470pF 20%
RP insertion loss compensation
2W AC Impedance programmation
AC Feedback compensation
ZAS
RAS
ZB
CH
12500Ω 1%
2500Ω 1%
15KΩ 1%
220pF 20%
Slic Impedance Balancing Net.
Line impedance Balancing Net.
CC Transybrid loss Compensation
CTX
4.7µF 30%
DC Decoupling Tx Output
D1, D2
Text
1N4007
(3)
CVSS; CVDD
CVB
100nF
100nF/100V
Line Rectifier
External Transistor
Formula
τ = 0.69 ⋅ CF ⋅ 39KΩ
(1)
τ = 0.69 ⋅ CGF ⋅ 39KΩ
RLIM =
564
ILIM − 3mA
1
2π ⋅ 16KΩ ⋅ fp
47 < RP < 100Ω (2)
CAC =
1
2π ⋅ 220Ω ⋅ fsp
RPC = 12.5 ⋅ (2RP)
ZAC = 12.5 ⋅ (ZS - 2RP)
CAC =
1
2πf1 ⋅ 25RP
ZAS = 25 ⋅ (ZS - 2RP)
RAS = 25 ⋅ (2RP)
ZB = 25 ⋅ Zl
ZAC
C H = CC ⋅
ZAS
f1 = 300KHz
CTX =
CC =
1
6.28 ⋅ fp ⋅ Zload
PDiss > 2W, VCEO > 60V
HFE > 40, IC > 100mA
VBE < 0.8V @ 100mA
±5V supply filter
VBAT supply filter
Notes:
1) For proper operation Cf should be selected in order to verify the following conditions:
A) cf > 150nF
B) τ < 1/2 • fRING
fRING: Ringing signal frequency
2) For protection purposes the RP resistor is usually splitted in two part RP1 and RP2, with RP1 > 30Ω.
3) ex: BD140; MJE172; MJE350.... (SOT32 or SOT82 package available also for surface mount). For low power application (reduced battery
voltage) BCP53 (SOT223 surface mount package) can be used. Depending on application enviroment an heatsink could be necessary.
16/25
L3234 - L3235N
Figure 13: Typical Appication Circuit Including L3234 and Protection
17/25
L3234 - L3235N
ELECTRICAL CHARACTERISTICS (Test condition: refer to the test circuit of the fig. 16; VCC = 5V,
VSS = -5V, Vbat = -48V, Tamb = 25°C, unless otherwise specified)
Note: Testing of all parameters is performed at 25°C. Characterization, as well as the design rules used
allow correlation of tested performance with actual performance at other temperatures. All parameters listed here are met in the range 0°C to +70°C.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
39
V
3
4
mA
70
39
39
77
70
5
V
V
mA
mA
mA
mA
mA
mA
Fig.
STAND-BY
Vls
ILCC
Output Voltage at TIP/RING
pins
Short Circuit Current
ILINE = 0
Stand-by, SBY = 1
35.7
2
DC OPERATION
VlP
Ilim
Ilim
IO
If
Ilgk
Gklim
Gkov
Imax
IVCC
IVSS
IVbat
Output Voltage at TIP/RING
pins
Current Progr.
Current Progr.
On-hook Threshold
Off-hook Threshold
GK Detector Threshold
Ground Key Current
Limitation
Ground Key Threshold
Overloap
Max. Output Current at
TIP/RING
Supply Current from VCC
Supply Current from VSS
Supply Current from Vbat
ILINE = 0
ILINE = 50mA
Ilim Prog. = 70mA
8.4KΩ < RLIM < 33KΩ
35.7
35.2
63
20
RING to BGND
10
10
13
Gklim-Ilgk
1
Ilim = 70mA
90
Iline = 0
Iline = 0
Iline = 0
17
22
mA
6.2
1.6
2.8
140
mA
8
2.1
3.6
mA
mA
mA
10
Ω
MΩ
dB
dB
dB
dB
dB
dB
dB
dB
dBmp
dBmp
dB
dB
dB
dB
AC OPERATION
Ztx
Zrx
Rl
Thl
Gs
Gsf
Gsl
Gr
Grf
Grl
Np4W
Np2W
Svrr
Svrr
Ltc
Tlc
Sending Output Impedance
Receiving Input Impedance
2W Return Loss
Trans Hybrid Loos
Sending Gain
Flatness
Linearity
Receiving Gain
Flatness
Linearity
Psoph. Noise at Tx
Psoph. Noise at Line
Relative to Vbat versus Line
Terminal versus Tx Terminal
Relative to Vcc and Vss
versus Line Terminal versus
Tx Terminal
L/T Conversion measured at
line Terminals
T/L Conversion Measured at
Line Terminals
(*) Selected parts L3235NC
18/25
pin 9 (Tx)
pin 12 (Rx)
f = 300 to 3400Hz
f = 300 to 3400Hz
f = 1020Hz Il = 20mA
f = 300 to 3400Hz
-20dB to 10dBm
f = 1020Hz Il = 20mA
f = 300 to 3400Hz
-20dBm to +4dBm
1
22
22
-11.9
-0.2
-0.2
5.8
-0.2
-0.2
6
-90
-82
-30
-24
-20
-14
f = 1020Hz
VS = 100mVpp
f = 1020Hz
VS = 100mVpp
f = 300 to 3400
Iline = 20mA
f = 300 to 3400
Iline = 20mA
36
36
-12.1
49
53(*)
46(*)
-12.3
0.2
0.2
6.2
0.2
0.2
-78
-70
dB
dB
dB
A1
A2
A3
A4
A5
A6
A7
L3234 - L3235N
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Fig.
DIGITAL STATIC INTERFACE
Vil
Input Voltage at Logical "0"
Input SBY, CS1
0
0.8
V
Vih
Iil
Input Voltage at Logical "1"
Input SBY, CS1
2
5
V
Input Current at Logical "0"
Input SBY, CS1
10
µA
Iih
Input Current at Logical "1"
Input SBY, CS1
10
µA
Vol
Output Voltage at Logical "0"
Iout = 1mA
Iout = 10µA
0.5
0.4
V
V
Voh
Output Voltage at Logical "1"
Iout = 10µA
Iout = 1mA
4
2.7
V
V
Figure 14: Test Circuit
L3235N
19/25
L3234 - L3235N
APPENDIX A
L3235N TEST CIRCUITS
Referring to the test circuit reported in fig 16 you
can find the proper configuration for the main
measurements.
In particular:
A-B: Line terminals
C: Tx sending output on 4W side
D: Rx receiving input on 4W Side
Figure A1: 2W Return Loss
100µF
100µF
RL = 20 log
Figure A2: Trans-hybrid Loss
100µF
THL = 20log
VS
VR
100µF
Figure A3: Sending Gain
100µF
100µF
20/25
| ZML − Z |
| 2VS |
= 20 log
| ZML + Z |
|E|
L3234 - L3235N
TEST CIRCUITS (continued)
Figure A4: Receiving Gain
100µF
100µF
Figure A5: SVRR Relative to Battery Voltage VB
100µF
100µF
Figure A6: Longitudinal to Transversal Conversion
21/25
L3234 - L3235N
Figure A7: Transversal to Longitudinal Conversion
APPENDIX B
LAYOUT SUGGESTIONS
Standard layout rules should be followed in order
to get the best system performances:
22/25
1) Use always 100nF filtering capacitor close to
the supply pins of each IC.
2) The L3235N bias resistor (RR) should be connected
close to the corresponding pins of L3235N
(REF and AGND).
L3234 - L3235N
mm
DIM.
MIN.
TYP.
inch
MAX.
A
4.8
C
1.37
D
2.4
2.8
MIN.
TYP.
MAX.
0.189
0.054
0.094
0.110
D1
1.2
1.35
0.047
0.053
E
0.35
0.55
0.014
0.022
F
0.6
0.8
0.024
0.031
F1
0.9
0.035
G
2.41
2.54
2.67
0.095
0.100
0.105
G1
4.91
5.08
5.21
0.193
0.200
0.205
G2
7.49
7.62
7.8
0.295
0.300
H2
9.2
10.4
0.362
H3
10.05
10.4
0.396
0.409
L
4.6
5.05
0.181
0.198
0.307
0.409
L1
3.9
4.1
4.3
0.153
0.161
L2
6.55
6.75
6.95
0.253
0.265
0.273
L3
5.9
6.1
6.3
0.232
0.240
0.248
L5
2.6
2.8
3
0.102
0.110
0.118
L6
15.1
15.8
0.594
L7
6
6.6
0.236
0.260
M
0.17
0.32
0.007
0.012
3.65
3.85
V2
Dia
OUTLINE AND
MECHANICAL DATA
0.170
0.622
8°(max)
0.144
Heptawatt (Surface Mount)
0.152
April 1999
23/25
L3234 - L3235N
mm
DIM.
MIN.
TYP.
A
inch
MAX.
MIN.
TYP.
1.60
A1
0.05
A2
1.35
B
0.30
C
0.09
0.063
0.15
0.002
0.006
1.40
1.45
0.053
0.055
0.057
0.37
0.45
0.012
0.014
0.018
0.20
0.004
0.008
D
12.00
0.472
D1
10.00
0.394
D3
8.00
0.315
e
0.80
0.031
E
12.00
0.472
E1
10.00
0.394
E3
8.00
0.315
L
0.45
0.60
0.75
OUTLINE AND
MECHANICAL DATA
MAX.
0.018
0.024
L1
1.00
K
0°(min.), 3.5˚(typ.), 7°(max.)
0.030
0.039
TQFP44 (10 x 10)
D
D1
A
A2
A1
33
23
34
22
0.10mm
.004
B
E
B
E1
Seating Plane
12
44
11
1
C
L
e
K
TQFP4410
24/25
L3234 - L3235N
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2001 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.
http://www.st.com
25/25