® XTR110 PRECISION VOLTAGE-TO-CURRENT CONVERTER/TRANSMITTER FEATURES APPLICATIONS ● 4mA TO 20mA TRANSMITTER ● SELECTABLE INPUT/OUTPUT RANGES: 0V to +5V, 0V to +10V Inputs 0mA to 20mA, 5mA to 25mA Outputs Other Ranges ● 0.005% MAX NONLINEARITY, 14 BIT ● PRECISION +10V REFERENCE OUTPUT ● INDUSTRIAL PROCESS CONTROL ● PRESSURE/TEMPERATURE TRANSMITTERS ● CURRENT-MODE BRIDGE EXCITATION ● GROUNDED TRANSDUCER CIRCUITS ● SINGLE SUPPLY OPERATION ● WIDE SUPPLY RANGE: 13.5V to 40V ● PROGRAMMABLE CURRENT SOURCE FOR TEST EQUIPMENT ● POWER PLANT/ENERGY SYSTEM MONITORING ● CURRENT SOURCE REFERENCE FOR DATA ACQUISITION DESCRIPTION The XTR110 is a precision voltage-to-current converter designed for analog signal transmission. It accepts inputs of 0 to 5V or 0 to 10V and can be connected for outputs of 4 to 20mA, 0 to 20mA, 5 to 25mA and many other commonly used ranges. A precision on-chip metal film resistor network provides input scaling and current offsetting. An internal 10V voltage reference can be used to drive external circuitry. The XTR110 is available in 16-pin plastic DIP, ceramic DIP and SOL-16 surface-mount packages. Commercial and industrial temperature range models are available. VREF Force 15 16 +VCC R9 +10V Reference VREF Sense 12 1 R8 13 Source Sense VREF Adjust 11 VIN1 (10V) 4 VREF In 3 A2 14 7 R1 R5 R3 6 R4 8 R7 5 R6 Common 2 Gate Drive Offset (zero) Adjust A1 R2 VIN2 (5V) Source Resistor Span Adjust 10 4mA Span 9 16mA Span International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1984 Burr-Brown Corporation PDS-555D Printed in U.S.A. September, 1993 SPECIFICATIONS ELECTRICAL At TA = +25°C and VCC = +24V and RL = 250Ω**, unless otherwise specified. XTR110AG, KP, KU PARAMETER TRANSMITTER Transfer Function Input Range: VIN1(5) VIN2 Current, IO Nonlinearity Offset Current, IOS Initial vs Temperature vs Supply, VCC Span Error Initial vs Temperature vs Supply, VCC Output Resistance Input Resistance CONDITIONS MIN Specified Performance Specified Performance Specified Performance(1) Derated Performance(1) 16mA/20mA Span(2) IO = 4mA(1) 0 0 4 0 (1) (1) (1) XTR110BG MAX MIN TYP MAX UNITS IO = 10 [(VREFIn/16) + (VIN1/4) + (VIN2/2)] /RSPAN +10 * +5 * 20 * 40 * 0.01 0.025 0.002 * * * * 0.005 V V mA mA % of Span 0.2 0.0003 0.0005 0.4 0.005 0.005 0.02 * * 0.1 0.003 * % of Span % of Span/°C % of Span/V 0.3 0.0025 0.003 10 x 109 27 22 19 0.6 0.005 0.005 0.05 0.0009 * * * * * 0.2 0.003 * % of Span % of Span/°C % of Span/V Ω kΩ kΩ kΩ IO = 20mA (1) (1) (1) From Drain of FET (QEXT)(3) VIN1 VIN2 VREF In Dynamic Response Settling Time To 0.1% of Span To 0.01% of Span 15 20 1.3 Slew Rate VOLTAGE REFERENCE Output Voltage vs Temperature vs Supply, VCC vs Output Current vs Time Trim Range Output Current TYP +9.95 Line Regulation Load Regulation Specified Performance POWER SUPPLY Input Voltage, VCC Quiescent Current +10 35 0.0002 0.0005 100 –0.100 10 +13.5 Excluding IO TEMPERATURE RANGE Specification: AG, BG KP, KU Operating: AG, BG KP, KU 3 –40 0 –55 –25 µs µs mA/µs * * * +10.05 50 0.005 0.01 +9.98 +0.25 * * +40 4.5 * +85 +70 +125 +85 * 15 * * * +10.02 30 * * * V ppm/°C %/V %/mA ppm/1k hrs V mA * * V mA * * * * °C °C °C °C * * Specifications same as AG/KP grades. ** Specifications apply to the range of RL shown in Typical Performance Curves. NOTES: (1) Including internal reference. (2) Span is the change in output current resulting from a full-scale change in input voltage. (3) Within compliance range limited by (+VCC – 2V) +VDS required for linear operation of the FET. (4) For VREF adjustment circuit see Figure 3. (5) For extended IREF drive circuit see Figure 4. (5) Unit may be damaged. See section, “Input Voltage Range”. ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS Power Supply, +VCC ............................................................................ 40V Input Voltage, VIN1, VIN2, VREF IN ....................................................... +VCC See text regarding safe negative input voltage range. Storage Temperature Range: A, B ................................ –55°C to +125°C K, U ................................. –40°C to +85°C Lead Temperature (soldering, 10s) G, P ................................................................... 300°C (wave soldering, 3s) U ................................................................ 260°C Output Short-Circuit Duration, Gate Drive and VREF Force ................................ Continuous to common and +VCC Output Current Using Internal 50Ω Resistor .................................... 40mA Any integral circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet published specifications. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® XTR110 2 PACKAGE INFORMATION PIN CONFIGURATION Top View MODEL Source Resistor 1 16 +VCC Common 2 15 VREF Force XTR110AG XTR110BG XTR110KP XTR110KU VREF In 3 14 Gate Drive VIN1 (10V) 4 13 Source Sense VIN2 (5V) 5 12 VREF Sense Zero Adjust 6 11 VREF Adjust Zero Adjust 7 10 4mA Span Span Adjust 8 9 PACKAGE PACKAGE DRAWING NUMBER(1) 16-Pin Ceramic DIP 16-Pin Ceramic DIP 16-Pin Plastic DIP SOL-16 Surface-Mount 109 109 180 211 NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. 16mA Span ORDERING INFORMATION MODEL XTR110AG XTR110BG XTR110KP XTR110KU PACKAGE TEMPERATURE RANGE 16-Pin Ceramic DIP 16-Pin Ceramic DIP 16-Pin Plastic DIP SOL-16 Surface-Mount –40°C to +85°C –40°C to +85°C 0°C to +70°C 0°C to +70°C TYPICAL PERFORMANCE CURVES TA = +25°C, VCC = 24VDC, RL = 250Ω, unless otherwise noted. IO POWER SUPPLY REGULATION vs FREQUENCY VREF LINE REGULATION vs FREQUENCY 10 ∆ IO /∆ VCC (% of span/V) 10 ∆ VREF/∆ VCC (%/V) 1 0.1 0.01 1 0.1 0.01 0.001 0.001 1 10 100 1k 10k 1 100k 10 JUNCTION TEMPERATURE RISE vs VREF OUTPUT CURRENT 1k 10k 100k TOTAL OUTPUT ERROR vs TEMPERATURE 2 100 Max. Temp. Rise for +85°C Ambient 80 Max. TJ = +175°C JA 60 = 70°C/W Error (% of span) Junction Temperature Rise Above Ambient (°C) 100 Ripple Frequency (Hz) Ripple Frequency (Hz) VCC = +40V 40 VCC = +24V 20 1 AG 0 BG –1 AG VCC = +15V –2 0 0 2 4 6 8 –40 10 –20 0 20 40 60 80 Temperature (°C) VREF Output Current (mA) (IOUT has minimal effect on TJ) ® 3 XYR110 TYPICAL PERFORMANCE CURVES (CONT) TA = +25°C, VCC = 24VDC, RL = 250Ω, unless otherwise noted. ICC vs TEMPERATURE MAXIMUM RL vs VCC 2500 IO = 20mA 4 2000 IO MAX = 20mA 3 RL (Ω) ICC (mA) (excluding IO) 5 IO = 4mA 1500 2 1000 1 500 0 IO MAX = 40mA 0 –40 –20 0 20 40 60 80 15 Temperature (°C) 30 25 +VCC (V) SETTLING TIME WITH NEG VIN STEP PULSE RESPONSE VIN VIN 0V 0V 0V IO Error (0.01% of Span/Box) IO into 500Ω 0V SETTLING TIME WITH POS VIN STEP VIN 0V 0V IO Error (0.01% of Span/Box) ® XTR110 20 4 35 40 APPLICATIONS INFORMATION Figure 1 shows the basic connections required for 0 to 10V input and 4 to 20mA output. Other input voltage and output current ranges require changes in connections of pins 3, 4, 5, 9 and 10 as shown in the table of Figure 1. The complete transfer function of the XTR110 is: 10 IO = (VREF IN) 16 (VIN1) + + 4 (VIN2) 2 (1) RSPAN RSPAN is the internal 50Ω resistor, R9, when connected as shown in Figure 1. An external RSPAN can be connected for different output current ranges as described later. EXTERNAL TRANSISTOR MANUFACTURER PART NO. BVDSS(1) BVGS(1) PACKAGE Ferranti ZVP1304A ZVP1304B ZVP1306A ZVP1306B 40V 40V 60V 60V 20V 20V 20V 20V TO-92 TO-39 TO-92 TO-39 International Rectifier IRF9513 60V 20V TO-220 Motorola MTP8P08 80V 20V TO-220 RCA RFL1P08 RFT2P08 80V 80V 20V 20V TO-39 TO-220 Siliconix (preferred) VP0300B VP0300L VP0300M VP0808B VP0808L VP0808M 30V 30V 30V 80V 80V 80V 40V 40V 40V 40V 40V 40V TO-39 TO-92 TO-237 TO-39 TO-92 TO-237 Supertex VP1304N2 VP1304N3 VP1306N2 VP1306N3 40V 40V 60V 60V 20V 20V 20V 20V TO-220 TO-92 TO-220 TO-92 NOTE: (1) BVDSS—Drain-source breakdown voltage. BVGS—Gate-source breakdown voltage. An external pass transistor, QEXT, is required as shown in Figure 1. This transistor conducts the output signal current. A P-channel MOSFET transistor is recommended. It must have a voltage rating equal or greater than the maximum power supply voltage. Various recommended types are shown in Table I. TABLE I. Available P-Channel MOSFETs. +VCC Force 15 R9 50Ω R8 500Ω +10V Reference 11 +VCC 13.5 to 40V 1 13 4 VIN 0 to 10V 1µF 16 Sense 12 VREF Adj. + IO Short Connection (see text) 14 QEXT P-Channel MOSFET (see text) IO/10 3 R1 R2 15kΩ R5 16.25kΩ 5kΩ 7 R3 20kΩ 6 Zero Adjust IO 4 to 20mA R4 10kΩ 8 IO/10 5 R7 6250Ω 2 10 9 RL (250Ω typ) Span Adjust 4mA Span 16mA Span R6 1562.5Ω INPUT OUTPUT RANGE (V) RANGE (mA) 0-10 2-10 0-10 0-10 0-5 1-5 0-5 0-5 0-20 4-20 4-20 5-25 0-20 4-20 4-20 5-25 PIN 3 PIN 4 PIN 5 PIN 9 PIN 10 Com Com +10V Ref +10V Ref Com Com +10V Ref +10V Ref Input Input Input Input Com Com Com Com Com Com Com Com Input Input Input Input Com Com Com Com Com Com Com Com Com Com Open Com Com Com Open Com FIGURE 1. Basic Circuit Connection. ® 5 XYR110 If the supply voltage, +VCC, exceeds the gate-to-source breakdown voltage of QEXT, and the output connection (drain of QEXT) is broken, QEXT could fail. If the gate-tosource breakdown voltage is lower than +VCC, QEXT can be protected with a 12V zener diode connected from gate to source. +VCC 16 47nF 1 13 XTR110 TIP30B etc. 14 Two PNP discrete transistors (Darlington-connected) can be used for QEXT—see Figure 2. Note that an additional capacitor is required for stability. Integrated Darlington transistors are not recommended because their internal base-emitter resistors cause excessive error. 2 0.047µF 2N2907 etc. RL Common TRANSISTOR DISSIPATION Maximum power dissipation of QEXT depends on the power supply voltage and full-scale output current. Assuming that the load resistance is low, the power dissipated by QEXT is: PMAX = (+VCC) IFS FIGURE 2. QEXT Using PNP Transistors. (2) +VCC The transistor type and heat sinking must be chosen according to the maximum power dissipation to prevent overheating. See Table II for general recommendations. VREF Force 15 VREF Sense 12 VREF Adjust VREF PACKAGE TYPE TO-92 TO-237 TO-39 TO-220 TO-3 R 20kΩ ALLOWABLE POWER DISSIPATION Lowest: Use minimum supply and at +25°C. Acceptable: Trade-off supply and temperature. Good: Adequate for majority of designs. Excellent: For prolonged maximum stress. Use if hermetic package is required. + 16 (VIN1) 4 + (VIN2) 11 XTR110 (1) RS 2 Common NOTE: (1) RS gives higher resolution with reduced range, set RS = 0Ω for larger range. FIGURE 3. Optional Adjustment of Reference Voltage. INPUT VOLTAGE RANGE The internal op amp A1 can be damaged if its non-inverting input (an internal node) is pulled more than 0.5V below common (0V). This could occur if input pins 3, 4 or 5 were driven with an op amp whose output could swing negative under abnormal conditions. The voltage at the input of A1 is: (VREF IN) 16 Adjust Range ±5% Optimum TABLE II. External Transistor Package Type and Dissipation. VA1 = IOUT QREF +10VREF Force 15 Sense 12 16 +VCC XTR110 (3) 2 2 This voltage should not be allowed to go more negative than –0.5V. If necessary, a clamp diode can be connected from the negative-going input to common to clamp the input voltage. For 100mA with VCC up to 40V use 2N3055 for QREF. FIGURE 4. Increasing Reference Current Drive. COMMON (Ground) Careful attention should be directed toward proper connection of the common (grounds). All commons should be joined at one point as close to pin 2 of the XTR110 as possible. The exception is the IOUT return. It can be returned to any point where it will not modulate the common at pin 2. 3 should be connected to this point. The circuit in Figure 3 shows adjustment of the voltage reference. The current drive capability of the XTR110’s internal reference is 10mA. This can be extended if desired by adding an external NPN transistor shown in Figure 4. OFFSET (ZERO) ADJUSTMENT The offset current can be adjusted by using the potentiometer, R1, shown in Figure 5. Set the input voltage to zero and then adjust R1 to give 4mA at the output. For spans starting VOLTAGE REFERENCE The reference voltage is accurately regulated at pin 12 (VREF SENSE). To preserve accuracy, any load including pin ® XTR110 6 + 1 12 Output Current, IO (mA) Third Wire 16 24V 3 – XTR110 4 0V to +10V S 13 14 5 7 6 8 2 9 G 15 R1 10 R3 Zero Adjust ±1.8% Optimum 5 RL 250Ω 1V to +5V Out Span Adjust ±0.45% as shown 16mA Span D 4mA to 20mA Out R4 R1 = 100kΩ R2 = 100kΩ R3 = 49.9kΩ R4 = 31.6Ω 20 1µF Tantalum 15 4mA Offset –2.5 0 2 4 6 8 10 Input Voltage, VIN1 (V) R2 Offset Adjust FIGURE 6. Zero and Span of 0V to +10V Input, 4mA to 20mA Output Configuration (see Figure 5). Span Adjust FIGURE 5. Offset and Span Adjustment Circuit for 0V to +10V Input, 4mA to 20mA Output. Output Current, IO (mA) 20 at 0mA, the following special procedure is recommended: set the input to a small nonzero value and then adjust R1 to the proper output current. When the input is zero the output will be zero. Figures 6 and 7 show graphically how offset is adjusted. SPAN ADJUSTMENT See values in Figure 6. In addition, connect pins 9 and 10 together. 15 Span Adjust 20mA Span 10 5 The span is adjusted at the full-scale output current using the potentiometer, R2, shown in Figure 5. This adjustment is interactive with the offset adjustment, and a few iterations may be necessary. For the circuit shown, set the input voltage to +10V full scale and adjust R2 to give 20mA fullscale output. Figures 6 and 7 show graphically how span is adjusted. Zero Adjust 0mA Offset 0 2 4 6 8 10 Input Voltage, VIN1 (V) FIGURE 7. Zero and Span of 0V to +10VIN, 0mA to 20mA Output Configuration (see Figure 5). The values of R2, R3, and R4 for adjusting the span are determined as follows: choose R4 in series to slightly decrease the span; then choose R2 and R3 to increase the span to be adjustable about the center value. EXTENDED SPAN For spans beyond 40mA, the internal 50Ω resistor (R9) may be replaced by an external resistor connected between pins 13 and 16. LOW TEMPERATURE COEFFICIENT OPERATION Although the precision resistors in the XTR110 track within 1ppm/°C, the output current depends upon the absolute temperature coefficient (TC) of any one of the resistors, R6, R7, R8, and R9. Since the absolute TC of the output current can have 20ppm/°C, maximum, the TC of the output current can have 20ppm/°C drift. For low TC operation, zero TC resistors can be substituted for either the span resistors (R6 or R7) or for the source resistor (R9) but not both. Its value can be calculated as follows: REXT = R9 (SpanOLD/SpanNEW) Since the internal thin-film resistors have a 20% absolute value tolerance, measure R9 before determining the final value of REXT. Self-heating of REXT can cause nonlinearity. Therefore, choose one with a low TC and adequate power rating. See Figure 10 for application. ® 7 XYR110 TYPICAL APPLICATIONS The XTR110 is ideal for a variety of applications requiring high noise immunity current-mode signal transmission. The precision +10V reference can be used to excite bridges and transducers. Selectable ranges make it very useful as a precision programmable current source. The compact design and low price of the XTR110 allow versatility with a minimum of external components and design engineering expense. Figures 8 through 10 show typical applications of the XTR110. +15V 15 16 12 VIN A4 1 +10V Reference 11 13 4 14 3 7 T1 6 R9 15kΩ Offset Adjust R1 2Ω R10 1kΩ 8 A3 R3 20kΩ 5 10 2 9 R5 2MΩ R6 402Ω R7 4.75kΩ R8 200Ω Fine Trim RH 50kΩ Course Trim Span Adjust IO A2 T3 A1 T2 R4 2kΩ R2 4.99Ω –15V 200 IO (mA) VIN (V) 0 5 10 R1, R2: Low TC resistors to dissipate 0.32W continuous power. For other current ranges, scale both resistors proportionately. R8, R10, R11: 10-turn trimpots for greatest sensitivity. R6, R7: Low TC resistors. A1 - A4: 1/4 LM324 (powered by ±15V). T1: International Rectifier IR9513(1). T2: International Rectifier IR513(1). T3: International Rectifier IRFF9113(1). NOTE: (1) Or other adequate power rating MOS transistor. –200 FIGURE 8. ±200mA Current Pump. ® XTR110 8 Isolation Barrier +15V Isolated Power Supply (722) 1µF –15V +15V –15V +15V 15 16 12 1 3 15 0 to –10V 7 ISO122 13 XTR110 S 4 8 5 16 G 14 9 4mA to 20mA Out D 2 RL VL FIGURE 9. Isolated 4mA to 20mA Channel. +24V 15 REXT 0.1Ω 16 12 4 0V to +10V 13 XTR110 S 3 5 14 9 G 0A to 10A Out D 2 See extended span section. FIGURE 10. 0A to 10A Output Voltage-to-Current Converter. ® 9 XYR110