Current Output, Parallel Input, 16-/14-Bit Multiplying DACs with 4-Quadrant Resistors AD5546/AD5556 FEATURES FUNCTIONAL BLOCK DIAGRAM R1 16-bit resolution 14-bit resolution 2- or 4-quadrant multiplying DAC ±1 LSB DNL ±1 LSB INL or ±2 LSB INL Operating supply voltage: 2.7 V to 5.5 V Low noise: 12 nV/√Hz Low power: IDD = 10 µA 0.5 µs settling time Built-in RFB facilitates current-to-voltage conversion Built-in 4-quadrant resistors allow 0 V to –10 V, 0 V to +10 V, or ±10 V outputs 2 mA full-scale current ±20%, with VREF = 10 V Automotive operating temperature: –40°C to +125°C Compact TSSOP-28 package R1 VDD REF ROFS R2 AD5546/ AD5556 WR ROFS RFB DAC DAC REGISTER IOUT GND 03810-0-001 DB0–DB15 POR MSB RFB 16/14 CONTROL LOGIC LDAC RS Figure 1. AD5546/AD5556 Simplified Block Diagram GENERAL DESCRIPTION The AD5546/AD5556 are precision 16-/14-bit, multiplying, low power, current output, parallel input D/A converters. They operate from a single 2.7 V to 5.5 V supply with ±10 V multiplying references for 4-quadrant outputs. Built-in 4-quadrant resistors facilitate the resistance matching and temperature tracking that minimize the number of components needed for multiquadrant applications. The feedback resistor (RFB) simplifies the I-V conversion with an external buffer. The AD5546/ AD5556 are packaged in compact TSSOP-28 packages with operating temperatures from –40°C to +125°C. APPLICATIONS Automatic test equipment Instrumentation Digitally controlled calibration Digital waveform generation 5V RCOM 2 + VIN U2A OP2177 U3 ADR03 TRIM VOUT – 5 6 GND 4 R1 –VREF RCOM REF R2 R1 5V C1 +VREF ROF ROFS RFB RFB C2 VDD IOUT 16/14-BIT U1 AD5546/AD5556 U2B OP2177 GND 16/14 DATA WR LDAC RS – + VOUT –VREF TO +VREF MSB 03810-0-002 WR LDAC RS MSB Figure 2. 16-/14-Bit, 4-Quadrant Multiplying DAC with a Minimum of External Components Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. AD5546/AD5556 TABLE OF CONTENTS Specifications..................................................................................... 3 Reference Selection .................................................................... 12 Absolute Maximum Ratings............................................................ 5 Applications..................................................................................... 13 Pin Configurations and Functional Descriptions ........................ 6 Unipolar Mode ........................................................................... 13 Typical Performance Characteristics ............................................. 8 Bipolar Mode .............................................................................. 14 Circuit Operation ........................................................................... 11 AC Reference Signal Attenuator............................................... 15 D/A Converter Section .............................................................. 11 System Calibration ..................................................................... 15 Digital Section............................................................................. 12 Outline Dimensions ....................................................................... 16 ESD Protection Circuits............................................................. 12 Ordering Guide .......................................................................... 16 Amplifier Selection..................................................................... 12 REVISION HISTORY Revision 0: Initial Version Rev. 0 | Page 2 of 16 AD5546/AD5556 SPECIFICATIONS Table 1. Electrical Characteristics. VDD = 2.7 V to 5.5 V, IOUT = virtual GND, GND = 0 V, VREF = –10 V to 10 V, TA = full operating temperature range, unless otherwise noted. Parameter STATIC PERFORMANCE1 Resolution Resolution Symbol Conditions N AD5546, 1 LSB = VREF/216 = 153 µV at VREF = 10 V AD5556, 1 LSB = VREF/214 = 610 µV at VREF = 10 V Grade: AD5556C Grade: AD5546B Monotonic Data = zero scale, TA = 25°C Data = zero scale, TA = TA maximum Data = full scale Data = full scale Data = full scale N Relative Accuracy Relative Accuracy Differential Nonlinearity Output Leakage Current Output Leakage Current Full-Scale Gain Error Bipolar Mode Gain Error Bipolar Mode Zero-Scale Error Full-Scale Tempco REFERENCE INPUT VREF Range REF Input Resistance R1 and R2 Resistance R1-to-R2 Mismatch Feedback and Offset Resistance Input Capacitance2 ANALOG OUTPUT Output Current Output Capacitance LOGIC INPUT AND OUTPUT Logic Input Low Voltage Logic Input Low Voltage Logic Input High Voltage Logic Input High Voltage Input Leakage Current Input Capacitance INTERFACE TIMING , 3 Data to WR Setup Time 2 2 2 INL INL DNL IOUT IOUT GFSE GE GZSE Min Typ Bits 14 Bits ±1 ±2 ±1 10 20 ±4 ±4 ±2.5 1 VREF REF R1 and R2 ∆(R1 to R2) RFB, ROFS –18 4 4 8 CREF Unit 16 ±1 ±1 ±1 TCVFS Max 5 5 ±0.5 10 LSB LSB LSB nA nA mV mV mV ppm/°C +18 6 6 ±1.5 12 V kΩ kΩ Ω kΩ 5 pF 2 200 mA pF IOUT COUT Data = full scale Code dependent VIL VIL VIH VIH IIL CIL VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V tDS VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V VDD = 5 V 20 35 0 0 20 ns ns ns ns ns VDD = 3 V VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V 35 20 35 20 35 0 0 ns ns ns ns ns ns ns 0.8 0.4 2.4 2.1 10 10 V V V V µA pF 2 Data to WR Hold Time tDH WR Pulse Width tWR LDAC Pulse Width tLDAC RS Pulse Width tRS WR to LDAC Delay Time tLWD Rev. 0 | Page 3 of 16 AD5546/AD5556 Parameter SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current Power Dissipation Power Supply Sensitivity AC CHARACTERISTICS4 Output Voltage Settling Time Reference Multiplying BW DAC Glitch Impulse Multiplying Feedthrough Error Digital Feedthrough Total Harmonic Distortion Output Noise Density Symbol Condition VDD RANGE IDD PDISS PSS Logic inputs = 0 V Logic inputs = 0 V ∆VDD = ±5% tS Min Typ 2.7 Max Unit 5.5 10 0.055 0.003 V µA mW %/% 0.5 µs BW Q VOUT/VREF To ±0.1% of full scale, data cycles from zero scale to full scale to zero scale VREF = 5 V p-p, data = full scale VREF = 0 V, midscale to midscale minus 1 VREF = 100 mV rms, f = 10 kHz 4 7 –65 MHz nV-s dB QD THD eN WR = 1, LDAC toggles at 1MHz VREF = 5 V p-p, data = full-scale, f = 1 KHz f = 1 kHz, BW = 1 Hz 7 –85 12 nV-s dB nV/rt Hz 1 All static performance tests (except IOUT) are performed in a closed-loop system, using an external precision OP97 I-V converter amplifier. The AD554x RFB terminal is tied to the amplifier output. The op amp +IN is grounded and the DAC IOUT is tied to the op amp –IN. Typical values represent average readings measured at 25°C. 2 These parameters are guaranteed by design and not subject to production testing. 3 All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V), and timed from a voltage level of 1.5 V. 4 All ac characteristic tests are performed in a closed-loop system using an AD841 I-V converter amplifier. Rev. 0 | Page 4 of 16 AD5546/AD5556 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter VDD to GND RFB, ROFS, R1, RCOM, and REF to GND Logic Inputs to GND V(IOUT) to GND Input Current to Any Pin except Supplies Thermal Resistance (θJA) Maximum Junction Temperature (TJ MAX) Operating Temperature Range Storage Temperature Range Lead Temperature: Vapor Phase, 60 s Infrared, 15 s Package Power Dissipation Rating –0.3 V, +8 V –18 V, 18 V –0.3 V, +8 V –0.3 V, VDD + 0.3 V ±50 mA 128°C 150°C –40°C to +125°C –65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 215°C 220°C (TJ MAX – TA)/θJA ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. 0 | Page 5 of 16 AD5546/AD5556 PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS D7 1 28 VDD D5 1 28 VDD D6 2 27 D8 D4 2 27 D6 D5 3 26 D9 D3 3 26 D7 D4 4 25 D10 D2 4 25 D8 D3 5 24 D11 D1 5 D2 6 23 D12 D0 6 22 D13 TOP VIEW D0 8 (Not to Scale) 21 D14 NC 7 ROFS 9 20 D15 RFB 10 19 GND R1 11 18 RS RCOM 12 17 MSB REF 13 16 WR IOUT 14 15 LDAC 23 D10 22 D11 TOP VIEW NC 8 (Not to Scale) 21 D12 ROFS 9 RFB 10 R1 11 RCOM 12 20 D13 19 GND 18 RS 17 MSB REF 13 16 WR IOUT 14 15 LDAC 03810-0-004 AD5546 03810-0-003 D1 7 24 D9 AD5556 NC = NO CONNECT Figure 3.AD5546 Pin Configuration Figure 4. AD5556 Pin Configuration Table 3. AD5546 Functional Descriptions Pin No. 1–8 9 Mnemonic D7 to D0 ROFS 10 11 12 RFB R1 RCOM 13 REF 14 15 16 IOUT LDAC WR 17 18 MSB RS 19 20–21 22–27 28 GND D15 to D14 D13 to D8 VDD Description Digital Input Data Bits D7 to D0. Signal level must be ≤ VDD + 0.3 V. Bipolar Offset Resistor. Accepts up to ±18 V. In 2-quadrant mode ties to RFB. In 4-quadrant mode ties to R1 and external reference. Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion. 4-Quandrant Resistor R1. In 2-quadrant mode shorts to REF pin. In 4-quadrant mode ties to ROFS. Center Tap Point of Two 4-Quadrant Resistors, R1 and R2. In 4-quadrant mode, ties to the inverting node of the reference amplifier. In 2-quadrant mode, shorts to REF pin. DAC Reference Input in 2-Quadrant Mode and R2 Terminal in 4-Quadrant Mode. In 2-quadrant mode, this is the reference input with constant input resistance versus code. In 4-quadrant mode, this pin is driven by the external reference amplifier. DAC Current Output. Connects to the inverting node of an external op amp for I-V conversion. Digital Input Load DAC Control. Signal level must be ≤ VDD + 0.3 V. Write Control Digital Input in Active Low. Transfers shift-register data to DAC register on rising edge. Signal level must be ≤ VDD + 0.3 V. Power-On Reset State. MSB = 0 resets at zero scale, MSB = 1 resets at midscale. Signal level must be ≤ VDD + 0.3 V. Reset in Active Low. Resets to zero scale if MSB = 0, and resets to midscale if MSB = 1. Signal level must be ≤ VDD + 0.3 V. Analog and Digital Grounds. Digital Input Data Bits D15 to D14. Signal level must be ≤ VDD + 0.3 V. Digital Input Data Bits D13 to D8. Signal level must be ≤ VDD + 0.3 V. Positive Power Supply Input. Specified range of operation: 2.7 V to 5.5 V. Table 4. AD5556 Functional Descriptions Pin No. 1–6 7–8 9 Mnemonic D5 to D0 NC ROFS 10 11 12 RFB R1 RCOM 13 REF 14 IOUT Description Digital Input Data Bits D5 to D0. Signal level must be ≤ VDD+0.3 V. No Connection. User should not connect anything other than dummy pads on these terminals. Bipolar Offset Resistor. Accepts up to ±18 V. In 2-quadrant mode ties to RFB. In 4-quadrant mode ties to R1 and external reference. Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion. 4-Quandrant Resistor R1. In 2-quadrant mode shorts to REF pin. In 4-quadrant mode ties to ROFS. Center Tap Point of Two 4-Quadrant Resistors, R1 and R2. In 4-quadrant mode, ties to the inverting node of the reference amplifier. In 2-quadrant mode, shorts to REF pin. DAC Reference Input in 2-Quadrant Mode and R2 Terminal in 4-Quadrant Mode. In 2-quadrant mode, this is the reference input with constant input resistance versus code. In 4-quadrant mode, this pin is driven by the external reference amplifier. DAC Current Output. Connects to the inverting node of an external op amp for I-V conversion. Rev. 0 | Page 6 of 16 AD5546/AD5556 Pin No. 15 16 Mnemonic LDAC WR 17 18 MSB RS 19 20–27 28 GND D13 to D6 VDD Description Digital Input Load DAC Control. Signal level must be ≤ VDD + 0.3 V. Write Control Digital Input in Active Low. Transfers shift-register data to DAC register on rising edge. Signal level must be ≤ VDD + 0.3 V. Power On Reset State. MSB = 0 resets at zero-scale, MSB = 1 resets at midscale. Signal level must be ≤ VDD + 0.3 V. Reset in Active Low. Resets to zero-scale if MSB = 0 and resets to midscale if MSB = 1. Signal level must be ≤ VDD + 0.3 V. Analog and Digital Grounds. Digital Input Data Bits D13 to D6. Signal level must be ≤ VDD + 0.3 V. Positive power supply input. Specified range of operation: 2.7 V to 5.5 V. tWR WR DATA tDS tDH tLWD LDAC tLDAC 03810-0-005 tRS RS Figure 5. AD5546/AD5556 Timing Diagram Table 5. AD5546 Parallel Input Data Format MSB B15 D15 Bit Position Data Word B14 D14 B13 D13 B12 D12 B11 D11 B10 D10 B9 D9 B8 D8 B7 D7 B6 D6 B5 D5 B4 D4 B3 D3 B2 D2 B1 D1 LSB B0 D0 Table 6. AD5556 Parallel Input Data Format MSB B13 D13 Bit Position Data Word B12 D12 B11 D11 B10 D10 B9 D9 B8 D8 B7 D7 B6 D6 B5 D5 B4 D4 B3 D3 B2 D2 B1 D1 LSB B0 D0 Table 7. Control Inputs RS WR LDAC Register Operation 0 1 1 1 1 X 0 1 0 X 0 1 1 1 1 0 Reset output to 0, with MSB pin = 0. Midscale with MSB pin = 1. Load input register with data bits. Load DAC register with the contents of the input register. Input and DAC registers are transparent. When LDAC and WR are tied together and programmed as a pulse, the data bits are loaded into the input register on the falling edge of the pulse, and then loaded into the DAC register on the rising edge of the pulse. No register operation. Rev. 0 | Page 7 of 16 AD5546/AD5556 1.0 0.8 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0 –0.2 0 –0.2 –0.4 –0.4 –0.6 –0.6 –0.8 0 8192 –0.8 –1.0 16384 24576 32768 40960 49152 57344 65536 CODE (Decimal) 0 10240 12288 14336 16384 VREF = 2.5V TA = 25°C 1.0 LINEARITY ERROR (LSB) 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 0 8192 0.5 INL 0 DNL –0.5 –1.0 03810-0-007 –0.8 –1.5 16384 24576 32768 40960 49152 57344 65536 GE 2 4 CODE (Decimal) 6 8 SUPPLY VOLTAGE VDD (V) 10 Figure 10. Linearity Error vs. VDD Figure 7. AD5546 Differential Nonlinearity Error 5 1.0 VDD = 5V TA = 25°C 0.8 0.4 0.2 0 –0.2 –0.4 03810-0-008 –0.6 –0.8 0 2048 4096 6144 8192 4 3 2 1 0 10240 12288 14336 16384 03810-0-011 SUPPLY CURRENT IDD (LSB) 0.6 INL (LSB) 8192 1.5 0.8 –1.0 6144 Figure 9. AD5556 Differential Nonlinearity Error 1.0 DNL (LSB) 4096 CODE (Decimal) Figure 6. AD5546 Integral Nonlinearity Error –1.0 0248 03810-0-010 –1.0 03810-0-009 DNL (LSB) 1.0 03810-0-006 INL (LSB) TYPICAL PERFORMANCE CHARACTERISTICS 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 LOGIC INPUT VOLTAGE VIH (V) CODE (Decimal) Figure 8. AD5556 Integral Nonlinearity Error Figure 11. Supply Current vs. Logic Input Voltage Rev. 0 | Page 8 of 16 5.0 AD5546/AD5556 3.0 LDAC (5V/DIV) 2.0 0x5555 VDD = 5V VREF = 10V CODES 0x8000 ↔0x7FFF 1.5 0x8000 1.0 0xFFFF 0x0000 1M 10M 100M 0 0.5 1.0 1.5 2.0 CLOCK FREQUENCY (Hz) Figure 12. AD5546 Supply Current vs. Clock Frequency VDD = 5V ± 10% VREF = 10V 70 PSSR (–dB) 60 50 40 30 03810-0-013 20 10 0 10 100 1k 10k FREQUENCY (Hz) 100k 0xFFFF 0x8000 0x4000 0x2000 0x1000 0x0800 0x0400 0x0200 0x0100 0x0080 0x0040 0x0020 0x0010 0x0008 0x0004 0x0002 0x0001 REF LEVEL 0.000dB 1M 5.0 MARKER 4 41 677.200Hz MAG (A/R) –2.939db –36dB –48dB –60dB –72dB –84dB –96dB –108dB 10 100 START 10.000Hz 1k 10k 100k 1M 10M STOP 50 000 000.000Hz Figure 16. AD5546 Unipolar Reference Multiplying Bandwidth LDAC –24 –36 –48 –60 2 –72 –84 REF LEVEL 0.000dB /DIV 12.000dB ALL BITS ON D15 AND D14 ON D15 AND D13 ON D15 AND D12 ON D15 AND D11 ON D15 AND D10 ON D15 AND D9 ON D15 AND D8 ON D15 AND D7 ON D15 AND D6 ON D15 AND D5 ON D15 AND D4 ON D15 AND D3 ON D15 AND D2 ON D15 AND D1 ON –96 03810-0-014 VOUT A CH1 2.70V B CH1 –6.20V 400.00ns 4.5 –24dB –12 M 200ns 4.0 –12dB 0 CH1 5.00V CH2 2.00V /DIV 12.000dB 0x0000 Figure 13. Power Supply Rejection Ratio vs. Frequency 1 3.5 Figure 15. AD5546 Midscale Transition and Digital Feedthrough 90 80 2.5 3.0 TIME (µs) –108 D15 AND D0 ON D15 ON –120 10 100 START 10.000Hz 1k 10k 100k 1M 10M STOP 10 000 000.000Hz Figure 17. AD5546 Bipolar Reference Multiplying Bandwidth (Codes from Midscale to Full Scale) Figure 14. Settling Time from Full Scale to Zero Scale Rev. 0 | Page 9 of 16 03810-0-016 100k 03810-0-017 0 10k VOUT (50mV/DIV) 03810-0-012 0.5 03810-0-015 SUPPLY CURRENT (mA) 2.5 AD5546/AD5556 0 –12 –24 –36 –48 –60 –72 –84 REF LEVEL 0.000dB /DIV 12.000dB ALL BITS OFF D14 ON D14 AND D13 ON D14 AND D12 ON D14 AND D11 ON D14 AND D10 ON D14 AND D9 ON D14 AND D8 ON D14 AND D7 ON D14 AND D6 ON D14 AND D5 ON D14 AND D4 ON D14 AND D3 ON D14 AND D2 ON D14 AND D1 ON –108 03810-0-018 –96 D14 AND D0 ON D14 ON –120 10 100 START 10.000Hz 1k 10k 100k 1M 10M STOP 10 000 000.000Hz Figure 18. AD5546 Bipolar Reference Multiplying Bandwidth (Codes from Midscale to Zero Scale) Rev. 0 | Page 10 of 16 AD5546/AD5556 CIRCUIT OPERATION D/A CONVERTER SECTION The reference voltage inputs exhibit a constant input resistance of 5 kΩ ±20%. The DAC output, IOUT, impedance is code dependent. External amplifier choice should take into account the variation of the AD5546/AD5556 output impedance. The feedback resistance in parallel with the DAC ladder resistance dominates output voltage noise. To maintain good analog performance, it is recommended to bypass the power supply with a 0.01 µF to 0.1 µF ceramic or chip capacitor in parallel with a 1 µF tantulum capacitor. Also, to minimize gain error, PCB metal traces between VREF and RFB should match. The AD5546/AD5556 are 16-/14-bit multiplying, current output, and parallel input DACs. The devices operate from a single 2.7 V to 5.5 V supply, and provide both unipolar 0 V to –VREF, or 0 V to +VREF, and bipolar ±VREF output ranges from a –18 V to +18 V reference. In addition to the precision conversion RFB commonly found in current output DACs, there are three additional precision resistors for 4-quadrant bipolar applications. The AD5546/AD5556 consist of two groups of precision R-2R ladders, which make up the 12/10 LSBs, respectively. Furthermore, the four MSBs are decoded into 15 segments of resistor value 2R. Figure 19 shows the architecture of the 16-bit AD5546. Each of the 16 segments in the R-2R ladder carries an equally weighted current of one-sixteenth of full scale. The feedback resistor, RFB, and 4-quadrant resistor, ROFS, have values of 10 kΩ. Each 4-quadrant resistor, R1 and R2, equals 5 kΩ. In 4-quadrant operation, R1, R2, and an external op amp work together to invert the reference voltage and apply it to the REF input. With ROFS and RFB connected as shown in Figure 2, the output can swing from –VREF to +VREF. Every code change of the DAC corresponds to a step function; gain peaking at each output step may occur if the op amp has limited GBP and excessive parasitic capacitance present at the op amp inverting node. A compensation capacitor, therefore, may be needed between the I-V op amp inverting and output nodes to smooth the step transition. Such a compensation capacitor should be found empirically, but a 20 pF capacitor is generally adequate for the compensation. The VDD power is used primarily by the internal logic and to drive the DAC switches. Note that the output precision degrades if the operating voltage falls below the specified voltage. Users should also avoid using switching regulators because device power supply rejection degrades at higher frequencies. REF 2R 80kΩ R2 5kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ RCOM R1 5kΩ 4 MSB 15 SEGMENTS R1 R 40kΩ R 40kΩ R 40kΩ R 40kΩ R 40kΩ R 40kΩ R 40kΩ R 40kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ 8-BIT R2R ROFS RA R R R R RB 2R 80kΩ 2R 80kΩ 2R 80kΩ 2R 80kΩ RFB 2R 80kΩ 10kΩ 10kΩ 4-BIT R2R IOUT GND 16 8 4 ADDRESS DECODER WR LDAC WR DAC REGISTER RS INPUT REGISTER RS D15 D14 RS D0 Figure 19. 16-Bit AD5546 Equivalent R-2R DAC Circuit with Digital Section Rev. 0 | Page 11 of 16 03810-0-019 LDAC AD5546/AD5556 DIGITAL SECTION AMPLIFIER SELECTION The AD5546/AD5556 have 16-/14-bit parallel inputs. The devices are double-buffered with 16-/14-bit registers. The double-buffered feature allows the update of several AD5546/ AD5556 simultaneously. For AD5546, the input register is loaded directly from a 16-bit controller bus when the WR pin is brought low. The DAC register is updated with data from the input register when LDAC is brought high. Updating the DAC register updates the DAC output with the new data (see Figure 19). To make both registers transparent, tie WR low and LDAC high. The asynchronous RS pin resets the part to zero scale if MSB pin = 0, and midscale if MSB pin = 1. In addition to offset voltage, the bias current is important in op amp selection for precision current output DACs. An input bias current of 30 nA in the op amp contributes to 1 LSB in the AD5546’s full-scale error. Op amps OP1177 and AD8628 are good candidates for the I-V conversion. ESD PROTECTION CIRCUITS All logic input pins contain back-biased ESD protection Zeners connected to ground (GND) and VDD, as shown in Figure 20. As a result, the voltage level of the logic input should not be greater than the supply voltage. VDD 5kΩ DGND 03810-0-020 DIGITAL INPUTS REFERENCE SELECTION The initial accuracy and the rated output of the voltage reference determine the full span adjustment. The initial accuracy is usually a secondary concern in precision, as it can be trimmed. Figure 25 shows an example of a trimming circuit. The zero scale error can also be minimized by standard op amp nulling techniques. The voltage reference temperature coefficient and long-term drift are primary considerations. For example, a 5 V reference with a TC of 5 ppm/oC means that the output changes by 25 µV per degree Celsius. As a result, the reference that operates at 55oC contributes an additional 750 µV full-scale error. Similarly, the same 5 V reference with a ±50 ppm long-term drift means that the output may change by ±250 µV over time. Therefore, it is practical to calibrate a system periodically to maintain its optimum precision. Figure 20. Equivalent ESD Protection Circuits Rev. 0 | Page 12 of 16 AD5546/AD5556 APPLICATIONS UNIPOLAR MODE 2-Quadrant Multiplying Mode, VOUT = 0 V to +VREF 2-Quadrant Multiplying Mode, VOUT = 0 V to –VREF The AD5546/AD5556 are designed to operate with either positive or negative reference voltages. As a result, positive output can be achieved with an additional op amp, (see Figure 22), and the output becomes The AD5546/AD5556 DAC architecture uses a current-steering R-2R ladder design that requires an external reference and op amp to convert the unipolar mode of output voltage to VOUT = –VREF × D/65,536 (AD5546) (1) VOUT = +VREF × D/65,536 (AD5546) (3) VOUT = –VREF × D/16,384 (AD5556) (2) VOUT = +VREF × D/16,384 (AD5556) (4) Table 9 shows the positive output versus code for the AD5546. where D is the decimal equivalent of the input code. Table 9. AD5546 Unipolar Mode Positive Output vs. Code The output voltage polarity is opposite to the VREF polarity in this case (see Figure 21). Table 8 shows the negative output versus code for the AD5546. D in Binary 1111 1111 1111 1111 1000 0000 0000 0000 0000 0000 0000 0001 0000 0000 0000 0000 Table 8. AD5546 Unipolar Mode Negative Output vs. Code D in Binary 1111 1111 1111 1111 1000 0000 0000 0000 0000 0000 0000 0001 0000 0000 0000 0000 VOUT (V) –VREF(65,535/65,536) –VREF/2 –VREF(1/65,536) 0 +5V 2 C2 0.1µF VIN U3 ADR03 TRIM 5 VOUT GND 4 R1 RCOM R1 REF R2 ROFS ROFS RFB C6 2.2pF RFB VDD C3 0.1µF IOUT 16/14-BIT U1 AD5546/AD5556 V+ U2 AD8628 GND 16/14 DATA WR LDAC RS – + V– VOUT –2.5V TO 0V C4 0.1µF MSB WR LDAC RS MSB –5V Figure 21. Unipolar 2-Quadrant Multiplying Mode, VOUT = 0 to –VREF Rev. 0 | Page 13 of 16 C5 1µF 03810-0-021 C1 1µF VOUT (V) +VREF(65,535/65,536) +VREF/2 +VREF(1/65,536) 0 AD5546/AD5556 + V+ U2A AD8628 – V– +5V 2 C1 1µF C2 0.1µF C8 0.1µF VIN U3 C9 1µF ADR03 5 TRIM 6 VOUT –5V +2.5V –2.5V C7 GND 4 R1A RCOMA REFA ROFSA RFBA +5V C6 R1 R2 ROFS RFB VDD C3 0.1µF IOUT 16/14-BIT U1 AD5546/AD5556 – C5 0.1µF V+ U2B AD8628 GND + 16/14 DATA WR LDAC RS C4 1µF V– VOUT 0V TO +2.5V MSB 03810-0-022 WR LDAC RS MSB Figure 22. Unipolar 2-Quadrant Multiplying Mode, VOUT = 0 to +VREF 2 C1 1µF C2 0.1µF + VIN U2A U3 AD8512 ADR01 TRIM VOUT GND 4 5 – 6 R1 RCOM R1 +5V C8 R2 –10V +10V REF ROF RFB ROFS RFB +15V C9 VDD C3 0.1µF C4 1µF IOUT 16/14-BIT U1 AD5546/AD5556 C5 0.1µF V+ U2B AD8512 GND 16/14 DATA WR LDAC RS – + V– VOUT –10V TO +10V C6 0.1µF MSB C7 –15V 1µF WR LDAC RS MSB 03810-0-023 +15V Figure 23. 4-Quadrant Multiplying Mode, VOUT = –VREF to +VREF BIPOLAR MODE 4-Quadrant Multiplying Mode, VOUT = –VREF to +VREF The AD5546/AD5556 contain on-chip all the 4-quadrant resistors necessary for the precision bipolar multiplying operation. Such a feature minimizes the number of exponent components to only a voltage reference, dual op amp, and compensation capacitor (see Figure 23). For example, with a 10 V reference, the circuit yields a precision, bipolar –10 V to +10 V output. VOUT = (D/32768 − 1) × VREF (AD5546) VOUT = (D/16384 − 1) × VREF (AD5556) Rev. 0 | Page 14 of 16 (5) (6) AD5546/AD5556 Table 10 shows some of the results for the 16-bit AD5546. ac reference signals for signal attenuation, channel equalization, and waveform generation applications. The maximum signal range can be up to ±18 V (see Figure 24). Table 10. AD5546 Output vs. Code D in Binary 1111 1111 1111 1111 1000 0000 0000 0001 1000 0000 0000 0000 0111 1111 1111 1111 0000 0000 0000 0000 VOUT +VREF(32,767/32,768) +VREF(1/32,768) 0 –VREF(1/32,768) –VREF SYSTEM CALIBRATION The initial accuracy of the system can be adjusted by trimming the voltage reference ADR0x with a digital potentiometer (see Figure 25). The AD5170 provides an OTP (one time programmable), 8-bit adjustment that is ideal and reliable for such calibration. ADI’s OTP digital potentiometer comes with programmable software that simplifies the factory calibration process. AC REFERENCE SIGNAL ATTENUATOR Besides handling digital waveforms decoded from parallel input data, the AD5546/AD5556 handle equally well low frequency + U2A OP2177 – +10V C7 –10V R1A RCOMA VREFA ROFSA RFBA +15V C6 R1 +5V R2 ROFS RFB VDD C2 0.1µF IOUT 16/14-BIT U1 – AD5546/AD5556 C5 0.1µF V+ U2B VOUT OP2177 GND + 16/14 DATA V– C8 1µF WR LDAC RS MSB WR LDAC RS MSB C9 0.1µF 03810-0-024 C1 1µF C4 1µF –15V Figure 24. Signal Attenuator with AC Reference C1 1µF 2 C2 0.1µF + VIN U4 U3 ADR03 TRIM VOUT 5 R3 470kΩ 6 GND 4 AD5170 – 10kΩ V+ U2A AD8628 V– B R7 1kΩ –5V +2.5V R1A C8 0.1µF C9 1µF –2.5V C7 RCOMA VREFA ROFSA RFBA +5V C6 R1 R2 ROFS VDD C3 0.1µF IOUT 16/14-BIT U1 AD5546/AD5556 WR LDAC RS – C5 0.1µF V+ U2B AD8628 GND 16/14 DATA C4 1µF RFB + V– VOUT 0V TO +2.5V MSB WR LDAC RS MSB 03810-0-025 +5V Figure 25. Full Span Calibration Rev. 0 | Page 15 of 16 AD5546/AD5556 OUTLINE DIMENSIONS 9.80 9.70 9.60 28 15 4.50 4.40 4.30 1 6.40 BSC 14 PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 COPLANARITY 0.10 0.30 0.19 SEATING PLANE 0.20 0.09 8° 0° 0.75 0.60 0.45 COMPLIANT TO JEDEC STANDARDS MO-153AE Figure 26. 28-Lead Thin Shrink Small Outline Package [TSSOP] RU-28 Dimensions shown in millimeters ORDERING GUIDE Model AD5546BRU AD5546BRU-REEL7 AD5556CRU AD5556CRU-REEL7 RES (Bit) 16 16 14 14 DNL (LSB) ±1 ±1 ±1 ±1 INL (LSB) ±2 ±2 ±1 ±1 Temperature Range (°C) –40 to +125 –40 to +125 –40 to +125 –40 to +125 © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03810-0-1/04(0) Rev. 0 | Page 16 of 16 Ordering Quantity 50 1000 50 1000 Package Description TSSOP-28 TSSOP-28 TSSOP-28 TSSOP-28 Package Option RU-28 RU-28 RU-28 RU-28