LTC1821 16-Bit, Ultra Precise, Fast Settling VOUT DAC U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC®1821 is a parallel input 16-bit multiplying voltage output DAC that operates from analog supply voltages of ±5V up to ±15V. INL and DNL are accurate to 1LSB over the industrial temperature range in both unipolar 0V to 10V and bipolar ±10V modes. Precise 16-bit bipolar ±10V outputs are achieved with on-chip 4-quadrant multiplication resistors. The LTC1821 is available in a 36-lead SSOP package and is specified over the industrial temperature range. 2µs Settling to 0.0015% for 10V Step 1LSB Max DNL and INL Over Industrial Temperature Range On-Chip 4-Quadrant Resistors Allow Precise 0V to 10V, 0V to –10V or ±10V Outputs Low Glitch Impulse: 2nV•s Low Noise: 13nV/√Hz 36-Lead SSOP Package Power-On Reset Asynchronous Clear Pin LTC1821: Reset to Zero Scale LTC1821-1: Reset to Midscale The device includes an internal deglitcher circuit that reduces the glitch impulse to less than 2nV•s (typ). The LTC1821 settles to 1LBS in 2µs with a full-scale 10V step. The combination of fast, precise settling and ultra low glitch make the LTC1821 ideal for precision industrial control applications. The asynchronous CLR pin resets the LTC1821 to zero scale and resets the LTC1821-1 to midscale. U APPLICATIO S ■ ■ ■ ■ ■ Process Control and Industrial Automation Precision Instrumentation Direct Digital Waveform Generation Software-Controlled Gain Adjustment Automatic Test Equipment , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATIO 16-Bit, 4-Quadrant Multiplying DAC with a Minimum of External Components VREF 3 + 0.1µF 6 LT®1468 2 LTC1821/LTC1821-1 Integral Nonlinearity 5V 1.0 – 10 R1 9 RCOM 8 REF 2 VCC 11 12 14 ROFS RFB IOUT V+ R1 ROFS R2 16 DATA INPUTS LTC1821-1 RFB WR LD CLR 7 13 16-BIT DAC DNC* DNC* DNC* NC 18 19 21 22 15V 0.1µF + VOUT V 24 23 15 – 3 TO 6, 25 TO 36 WR LD CLR VREF = 10V VOUT = ±10V BIPOLAR 0.8 15pF 15pF DGND 1 – 20 VREF VOUT = –VREF –15V 0.1µF AGNDF AGNDS 17 16 INTEGRAL NONLINEARITY (LSB) –VREF 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 49152 32768 16384 DIGITAL INPUT CODE 65535 1821 TA02 1821 TA01 *DO NOT CONNECT 1 LTC1821 W U U U W W W ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION (Note 1) ORDER PART NUMBER TOP VIEW VCC to AGNDF, AGNDS ............................... – 0.3V to 7V VCC to DGND .............................................. – 0.3V to 7V Total Supply Voltage (V+ to V–) ............................... 36V AGNDF, AGNDS to DGND ............................. VCC + 0.3V DGND to AGNDF, AGNDS ............................. VCC + 0.3V REF, RCOM to AGNDF, AGNDS, DGND .................. ±15V ROFS, RFB, R1, to AGNDF, AGNDS, DGND ............ ±15V Digital Inputs to DGND ............... – 0.3V to (VCC + 0.3V) IOUT to AGNDF, AGNDS............... – 0.3V to (VCC + 0.3V) Maximum Junction Temperature .......................... 150°C Operating Temperature Range LTC1821C/LTC1821-1C .......................... 0°C to 70°C LTC1821I/LTC1821-1I ....................... – 40°C to 85°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C DGND 1 36 D4 VCC 2 35 D5 D3 3 34 D6 D2 4 33 D7 D1 5 32 D8 D0 6 31 D9 CLR 7 30 D10 REF 8 29 D11 RCOM 9 28 D12 R1 10 27 D13 ROFS 11 26 D14 RFB 12 25 D15 VOUT 13 24 WR IOUT 14 23 LD V+ 15 22 NC AGNDS 16 21 DNC* AGNDF 17 20 V – DNC* 18 LTC1821ACGW LTC1821BCGW LTC1821-1ACGW LTC1821-1BCGW LTC1821AIGW LTC1821BIGW LTC1821-1AIGW LTC1821-1BIGW 19 DNC* GW PACKAGE 36-LEAD PLASTIC SSOP WIDE TJMAX = 125°C, θJA = 80°C/ W *DO NOT CONNECT Consult factory for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = TMIN to TMAX, V+ = 15V, V– = –15V, VCC = 5V, VREF = 10V, AGNDF = AGNDS = DGND = 0V. SYMBOL PARAMETER LTC1821B/-1B MIN TYP MAX CONDITIONS LTC1821A/-1A MIN TYP MAX UNITS Accuracy Resolution Monotonicity INL DNL GE 2 16 ● 16 16 Bits 16 Bits ● ±2 ±2 ±0.25 ±0.35 ±1 ±1 LSB LSB TA = 25°C TMIN to TMAX ● ±1 ±1 ±0.2 ±0.2 ±1 ±1 LSB LSB Unipolar Mode TA = 25°C (Note 3) TMIN to TMAX ● ±16 ±24 ±5 ±8 ±16 ±16 LSB LSB Bipolar Mode TA = 25°C (Note 3) TMIN to TMAX ● ± 16 ± 24 ±2 ±5 ±16 ±16 LSB LSB Gain Temperature Coefficient ∆Gain/∆Temperature (Note 4) ● 3 1 3 ppm/°C Unipolar Zero-Scale Error TA = 25°C TMIN to TMAX ● ±3 ±6 ±0.25 ±0.50 ±2 ±4 LSB LSB TA = 25°C TMIN to TMAX ● ±12 ±16 ±2 ±3 ±8 ±10 LSB LSB VCC = 5V ±10% V+, V – = ±4.5V to ±16.5V ● ● 2 ±2 0.7 ±0.1 2 ±2 LSB/V LSB/V Integral Nonlinearity Differential Nonlinearity Gain Error Bipolar Zero Error PSRR ● Power Supply Rejection Ratio TA = 25°C (Note 2) TMIN to TMAX 1 LTC1821 ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = TMIN to TMAX, V + = 15V, V – = – 15V, VCC = 5V, VREF = 10V, AGNDF = AGNDS = DGND = 0V. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Reference Input RREF DAC Input Resistance (Unipolar) (Note 6) ● 4.5 6 10 kΩ R1/R2 R1/R2 Resistance (Bipolar) (Notes 6, 11) ● 9 12 20 kΩ ROFS, RFB Feedback and Offset Resistances (Note 6) ● 9 12 20 kΩ AC Performance (Note 4) Output Voltage Settling Time ∆VOUT = 10V (Notes 7, 8) 2 µs Midscale Glitch Impulse (Note 10) 2 nV•s Digital-Feedthrough (Note 9) 2 nV•s Multiplying Feedthrough Error VREF = ±10V, 10kHz Sine Wave (Note 7) 1 mVP-P Multiplying Bandwidth Code = Full Scale (Note 7) 600 kHz Output Noise Voltage Density 1kHz to 100kHz (Note 7) Code = Zero Scale Code = Full Scale 13 20 nV/√Hz nV/√Hz 0.45 1 µVRMS µVRMS Output Noise Voltage 1/f Noise Corner 0.1Hz to 10Hz (Note 7) Code = Zero Scale Code = Full Scale (Note 7) 30 Hz Analog Outputs (Note 4) VOUT ISC SR DAC Output Swing RL = 2k, V + = 15V, V – = –15V RL = 2k, V + = 5V, V – = –5V ● ● DAC Output Load Regulation V + = 15V, V – = –15V, ±5mA Load ● Short-Circuit Current VOUT = 0V, V + = 15V, V – = –15V ● Slew Rate RL = 2k, V + = 15V, V – = –15V RL = 2k, V + = 5V, V – = –5V ±12.6 ±2.6 V V 0.02 12 0.2 LSB/mA 40 mA 20 14 V/µs V/µs Digital Inputs VIH Digital Input High Voltage ● VIL Digital Input Low Voltage ● IIN Digital Input Current ● CIN Digital Input Capacitance (Note 4 ) VIN = 0V 2.4 V 0.001 ● 0.8 V ±1 µA 8 pF Timing Characteristics t DS Data to WR Setup Time ● 60 20 t DH Data to WR Hold Time t WR WR Pulse Width t LD t CLR t LWD ns ● 0 –12 ns ● 60 25 ns LD Pulse Width ● 110 55 ns Clear Pulse Width ● 60 40 ns WR to LD Delay Time ● 0 ns Power Supply ICC Supply Current, VCC Digital Inputs = 0V or VCC ● 1.5 10 µA IS Supply Current, V+, V – ±15V ±5V ● ● 4.5 4.0 7.0 6.8 mA mA VCC Supply Voltage ● 5 5.5 V V+ Supply Voltage ● 4.5 16.5 V V– Supply Voltage ● –16.5 – 4.5 V 4.5 3 LTC1821 ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: ±1LSB = ±0.0015% of full scale = ±15.3ppm of full scale. Note 3: Using internal feedback resistor. Note 4: Guaranteed by design, not subject to test. Note 5: IOUT with DAC register loaded to all 0s. Note 6: Typical temperature coefficient is 100ppm/°C. Note 7: Measured in unipolar mode. Note 8: To 0.0015% for a full-scale change, measured from the rising edge of LD. Note 9: REF = 0V. DAC register contents changed from all 0s to all 1s or all 1s to all 0s. LD low and WR high. Note 10: Midscale transition code: 0111 1111 1111 1111 to 1000 0000 0000 0000. Unipolar mode, CFEEDBACK = 33pF. Note 11: R1 and R2 are measured between R1 and RCOM, REF and RCOM. U W TYPICAL PERFOR A CE CHARACTERISTICS Midscale Glitch Impulse – 40 CFEEDBACK = 30pF VREF = 10V 30 OUTPUT VOLTAGE (mV) Full-Scale Setting Waveform LD PULSE 5V/DIV 20 10 GATED SETTLING WAVEFORM 500µV/DIV 0 1nV-s TYPICAL –10 –20 – 40 1821 G02 500ns/DIV VREF = –10V CFEEDBACK = 20pF 0V TO 10V STEP – 30 0.2 0 0.4 0.6 TIME (µs) 0.8 SIGNAL/(NOISE + DISTORTION) (dB) 40 Unipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency VCC = 5V CFEEDBACK = 30pF REFERENCE = 6VRMS – 50 – 60 – 70 – 80 500kHz FILTER – 90 80kHz FILTER –100 30kHz FILTER –110 10 1.0 100 1k 10k FREQUENCY (Hz) 100k 1821 G03 1821 G01 Bipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency, Code = All Zeros – 60 – 70 – 80 500kHz FILTER – 90 –100 30kHz FILTER 10 100 1k 10k FREQUENCY (Hz) VCC = 5V ALL DIGITAL INPUTS TIED TOGETHER 4 – 60 – 70 – 80 500kHz FILTER – 90 3 2 1 80kHz FILTER 30kHz FILTER 0 –110 100k 1821 G04 4 5 VCC = 5V USING AN LT1468 CFEEDBACK = 15pF REFERENCE = 6VRMS –100 80kHz FILTER –110 – 50 VCC Supply Current vs Digital Input Voltage SUPPLY CURRENT (mA) – 50 – 40 VCC = 5V USING AN LT1468 CFEEDBACK = 15pF REFERENCE = 6VRMS SIGNAL/(NOISE + DISTORTION) (dB) SIGNAL/(NOISE + DISTORTION) (dB) – 40 Bipolar Multiplying Mode Signal-to-(Noise + Distortion) vs Frequency, Code = All Ones 10 100 1k 10k FREQUENCY (Hz) 100k 1821 G05 0 1 3 2 INTPUT VOLTAGE (V) 4 5 1821 G06 LTC1821 U W TYPICAL PERFOR A CE CHARACTERISTICS Logic Threshold vs VCC Supply Voltage Integral Nonlinearity (INL) INTEGRAL NONLINEARITY (LSB) LOGIC THRESHOLD (V) 2.5 2.0 1.5 1.0 0.5 Differential Nonlinearity (DNL) 1.0 1.0 0.8 0.8 DIFFERENTIAL NONLINEARITY (LSB) 3.0 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 0 1 5 2 3 4 SUPPLY VOLTAGE (V) 6 – 0.4 – 0.6 – 0.8 –1.0 0 7 49152 32768 16384 DIGITAL INPUT CODE 0.2 0 – 0.2 – 0.4 – 0.6 1.0 1.0 0.8 0.8 0.6 0.4 0.2 0 – 0.2 – 0.4 – 0.6 – 0.8 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 8 10 1821 G10 0.8 INTEGRAL NONLINEARITY (LSB) 1.0 0.8 0.2 0 – 0.2 – 0.4 – 0.6 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 8 10 1821 G13 0 – 0.2 – 0.4 – 0.6 – 0.8 –1.0 –10 – 8 – 6 – 4 – 2 0 2 4 6 REFERENCE VOLTAGE (V) 10 8 10 1821 G12 Integral Nonlinearity vs VCC Supply Voltage in Bipolar Mode 2.0 0.6 VREF = 10V 0.4 0.2 VREF = 2.5V 0 VREF = 10V – 0.2 – 0.4 1.5 1.0 0.5 VREF = 10V 0 VREF = 2.5V VREF = 10V – 0.5 VREF = 2.5V – 0.6 VREF = 2.5V –1.0 –1.5 – 0.8 – 0.8 0.2 Integral Nonlinearity vs VCC Supply Voltage in Unipolar Mode 1.0 0.4 0.6 0.4 1821 G11 Differential Nonlinearity vs Reference Voltage in Bipolar Mode 0.6 8 65535 Differential Nonlinearity vs Reference Voltage in Unipolar Mode DIFFERENTIAL NONLINEARITY (LSB) INTEGRAL NONLINEARITY (LSB) 0.8 0.4 49152 32768 16384 DIGITAL INPUT CODE 1821 G09 Integral Nonlinearity vs Reference Voltage in Bipolar Mode 1.0 0.6 0 65535 1821 G08 Integral Nonlinearity vs Reference Voltage in Unipolar Mode INTEGRAL NONLINEARITY (LSB) 0 – 0.2 –1.0 1821 G07 DIFFERENTIAL NONLINEARITY (LSB) 0.4 0.2 INTEGRAL NONLINEARITY (LSB) 0 0.6 –1.0 2 3 4 5 6 SUPPLY VOLTAGE (V) 7 1821 G14 –2.0 2 3 4 5 6 SUPPLY VOLTAGE (V) 7 1821 G15 5 LTC1821 U W TYPICAL PERFOR A CE CHARACTERISTICS Differential Nonlinearity vs VCC Supply Voltage in Bipolar Mode 1.0 1.0 0.8 0.8 DIFFERENTIAL NONLINEARITY (LSB) DIFFERENTIAL NONLINEARITY (LSB) Differential Nonlinearity vs VCC Supply Voltage in Unipolar Mode 0.6 0.4 VREF = 10V VREF = 2.5V 0.2 0 – 0.2 VREF = 10V VREF = 2.5V – 0.4 – 0.6 – 0.8 –1.0 2 3 0.2 VREF = 10V 0 VREF = 2.5V VREF = 10V – 0.2 VREF = 2.5V – 0.4 – 0.6 – 0.8 –1.0 7 4 5 6 SUPPLY VOLTAGE (V) 0.6 0.4 3 2 7 4 5 6 SUPPLY VOLTAGE (V) 1821 G16 Bipolar Multiplying Mode Frequency Response vs Digital Code – 40 – 60 – 80 – 100 – 20 ATTENUATION (dB) ATTENUATION (dB) – 20 0 ALL BITS ON D15 ON D14 ON D13 ON D12 ON D11 ON D10 ON D9 ON D8 ON D7 ON D6 ON D5 ON D4 ON D3 ON D2 ON D1 ON D0 ON ALL BITS OFF – 120 100 1k – 40 – 60 – 80 10k 100k FREQUENCY (Hz) 1M – 20 CODES FROM MIDSCALE TO FULL SCALE 100 100k 1k 10k FREQUENCY (Hz) 1M 10M *DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR ZERO ERROR TO – 96dB TYPICAL (–78dB MAX, A GRADE) VREF 3 30pF 8 9 10 11 12 14 LTC1821 13 1 16 17 VOUT – 60 ALL BITS OFF D14 ON D14 AND D13 ON D14 TO D12 ON D14 TO D11 ON D14 TO D10 ON D14 TO D9 ON D14 TO D8 ON D14 TO D7 ON D14 TO D6 ON D14 TO D5 ON D14 TO D4 ON D14 TO D3 ON D14 TO D2 ON D14 TO D1 ON CODES FROM MIDSCALE TO ZERO SCALE D14 TO D0 ON D15 ON* – 100 100 10 100k 1k 10k FREQUENCY (Hz) 1821 G19 1821 G18 VREF – 40 – 80 D15 AND D1 ON D15 AND D0 ON D15 ON* 10 10M 0 ALL BITS ON D15 AND D14 ON D15 AND D13 ON D15 AND D12 ON D15 AND D11 ON D15 AND D10 ON D15 AND D9 ON D15 AND D8 ON D15 AND D7 ON D15 AND D6 ON D15 AND D5 ON D15 AND D4 ON D15 AND D3 ON D15 AND D2 ON – 100 Bipolar Multiplying Mode Frequency Response vs Digital Code ATTENUATION (dB) Unipolar Multiplying Mode Frequency Response vs Digital Code 0 1821 G17 1821 G20 *DAC ZERO VOLTAGE OUTPUT LIMITED BY BIPOLAR ZERO ERROR TO – 96dB TYPICAL (–78dB MAX, A GRADE) 3 6 + LT1468 – 2 12pF 12pF 6 15pF 9 8 11 12 LTC1821 1 16 17 6 10M VREF + LT1468 – 2 12pF 12pF 10 1M 14 13 15pF 10 VOUT 9 8 11 12 LTC1821 1 16 17 14 13 VOUT LTC1821 U U U PIN FUNCTIONS DGND (Pin 1): Digital Ground. Connect to analog ground. VCC (Pin 2): Positive Supply Input. 4.5V ≤ VCC ≥ 5.5V. Requires a bypass capacitor to ground. D3 (Pin 3): Digital Input Data Bit 3. D2 (Pin 4): Digital Input Data Bit 2. D1 (Pin 5): Digital Input Data Bit 1. D0 (Pin 6): LSB or Digital Input Data Bit 0. CLR (Pin 7): Digital Clear Control Function for the DAC. When CLR is taken to a logic low, it sets the DAC output and all internal registers to: zero code for the LTC1821 and midscale code for the LTC1821-1. REF (Pin 8): Reference Input and 4-Quadrant Resistor R2. Typically ±10V, accepts up to ±15V. In 2-quadrant mode, tie this pin to the external reference signal. In 4-quadrant mode, this pin is driven by external inverting reference amplifier. RCOM (Pin 9): Center Tap Point of the Two 4-Quadrant Resistors R1 and R2. Normally tied to the inverting input of an external amplifier in 4-quadrant operation. Otherwise this pin is shorted to the REF pin. See Figures 1 and 2. IOUT (Pin 14): DAC Current Output. Normally tied through a 22pF feedback capacitor in unipolar mode (15pF in bipolar mode) to VOUT. V + (Pin 15): Amplifier Positive Supply. Range is 4.5V to 16.5V. AGNDS (Pin 16): Analog Ground Sense. Connect to analog ground. AGNDF (Pin 17): Analog Ground Force. Connect to analog ground. DNC (Pin 18, 19, 21): Connected internally. Do not connect external circuitry to these pins. V – (Pin 20): Amplifier Negative Supply. Range is – 4.5V to – 16.5V. NC (Pin 22): No Connection. LD (Pin 23): DAC Digital Input Load Control Input. When LD is taken to a logic high, data is loaded from the input register into the DAC register, updating the DAC output. WR (Pin 24): DAC Digital Write Control Input. When WR is taken to a logic low, data is written from the digital input pins into the 16-bit wide input reigster. D15 (Pins 25): MSB or Digital Input Data Bit 15. R1 (Pin 10): 4-Quadrant Resistor R1. In 2-quadrant operation, short this pin to the REF pin. In 4-quadrant mode, tie this pin to the external reference signal. D14 (Pin 26): Digital Input Data Bit 14. ROFS (Pin 11): Bipolar Offset Resistor. Typically swings ±10V, accepts up to ±15V. For 2-quadrant operation, tie this pin to RFB and for 4-quadrant operation, tie this pin to R1. D12 (Pin 28): Digital Input Data Bit 12. RFB (Pin12): Feedback Resistor. Normally connected to VOUT. Typically swings ±10V. The voltage at this pin swings 0 to VREF in unipolar mode and ±VREF in bipolar mode. VOUT (Pin 13): DAC Voltage Output. Normally connected to RFB and to IOUT through a 22pF feedback capacitor in unipolar mode (15pF in bipolar mode). Typically swings ±10V. D13 (Pin 27): Digital Input Data Bit 13. D11 (Pin 29): Digital Input Data Bit 11. D10 (Pin 30): Digital Input Data Bit 10. D9 (Pin 31): Digital Input Data Bit 9. D8 (Pin 32): Digital Input Data Bit 8. D7 (Pin 33): Digital Input Data Bit 7. D6 (Pin 34): Digital Input Data Bit 6. D5 (Pin 35): Digital Input Data Bit 5. D4 (Pin 36): Digital Input Data Bit 4. 7 LTC1821 TRUTH TABLE Table 1 CONTROL INPUTS CLR WR LD REGISTER OPERATION 0 X X Reset Input and DAC Register to All 0s for LTC1821 and Midscale for LTC1821-1 (Asynchronous Operation) 1 0 0 Write Input Register with All 16 Data Bits 1 1 1 Load DAC Register with the Contents of the Input Register 1 0 1 1 Input and DAC Register Are Transparent CLK = LD and WR Tied Together. The 16 Data Bits Are Written Into the Input Register on the Falling Edge of the CLK and Then Loaded Into the DAC Register on the Rising Edge of the CLK 1 1 0 No Register Operation W BLOCK DIAGRA 48k REF 48k 12 RFB 8 12k 48k RCOM 9 48k 48k 48k 48k 48k 48k 96k 96k 96k 96k 12k 12k 11 ROFS 12k 14 IOUT R1 10 15 V + – + VCC 2 13 VOUT 20 V – DECODER 16 AGNDS LD 23 LOAD D15 (MSB) D14 D13 D12 D11 ••• DAC REGISTER 17 AGNDF D0 (LSB) RST 7 CLR 18 DNC* 19 DNC* 21 DNC* WR 24 8 INPUT REGISTER WR 25 26 D15 D14 •••• RST 36 3 4 5 6 D4 D3 D2 D1 D0 22 NC *CONNECTED INTERNALLY. DO NOT CONNECT EXTERNAL CIRCUITRY TO THESE PINS 1 DGND 1821 BD LTC1821 WU W TI I G DIAGRA tWR WR DATA tDS tDH tLWD LD tLD tCLR CLR 1821 TD U W U U APPLICATIONS INFORMATION Description The LTC1821 is a 16-bit voltage output DAC with a full parallel 16-bit digital interface. The device can operate from 5V and ±15 supplies and provides both unipolar 0V to – 10V or 0V to 10V and bipolar ±10V output ranges from a 10V or –10V reference input. Additionally, the power supplies for the LTC1821 can go as low as 4.5V and ±4.5V. In this case for a 2.5V or – 2.5V reference, the output range is 0V to – 2.5V, 0V to 2.5V and ±2.5V. The LTC1821 has three additional precision resistors on chip for bipolar operation. Refer to the block diagram regarding the following description. The 16-bit DAC consists of a precision R-2R ladder for the 13 LSBs. The three MSBs are decoded into seven segments of resistor value R. Each of these segments and the R-2R ladder carries an equally weighted current of one eighth of full scale. The feedback resistor RFB and 4-quadrant resistor ROFS have a value of R/4. 4-quadrant resistors R1 and R2 have a magnitude of R/4. R1 and R2 together with an external op amp (see Figure 2) inverts the reference input voltage and applies it to the 16-bit DAC input REF, in 4-quadrant operation. The REF pin presents a constant input impedance of R/8 in unipolar mode and R/12 in bipolar mode. The LTC1821 contains an onboard precision high speed amplifier. This amplifier together with the feedback resistor (RFB) form a precision current-to-voltage converter for the DAC’s current output. The amplifier has very low noise, offset, input bias current and settles in less than 2µs to 0.0015% for a 10V step. It can sink and source 22mA (±15V) typically and can drive a 300pF capacitive load. An added feature of these devices, especially for waveform generation, is a proprietary deglitcher that reduces glitch impulse to below 2nV-s over the DAC output voltage range. Digital Section The LTC1821 has a 16-bit wide full parallel data bus input. The device is double-buffered with two 16-bit registers. The double-buffered feature permits the update of several DACs simultaneously. The input register is loaded directly from a 16-bit microprocessor bus when the WR pin is brought to a logic low level. The second register (DAC register) is updated with the data from the input register when the LD signal is brought to a logic high. Updating the DAC register updates the DAC output with the new data. To make both registers transparent in flowthrough mode, tie WR low and LD high. However, this defeats the deglitcher operation and output glitch impulse may increase. The deglitcher is activated on the rising edge of the LD pin. The 9 LTC1821 U U W U APPLICATIONS INFORMATION versatility of the interface also allows the use of the input and DAC registers in a master slave or edge-triggered configuration. This mode of operation occurs when WR and LD are tied together. The asynchronous clear pin resets the LTC1821 to zero scale and the LTC1821-1 to midscale. CLR resets both the input and DAC registers. These devices also have a power-on reset. Table 1 shows the truth table for the LTC1821. Unipolar Mode (2-Quadrant Multiplying, VOUT = 0V to – VREF) The LTC1821 can be used to provide 2-quadrant multiplying operation as shown in Figure 1. With a fixed – 10V reference, the circuit shown gives a precision unipolar 0V to 10V output swing. 5V 22pF 0.1µF VREF 9 10 R1 8 REF RCOM 11 ROFS 2 VCC 12 14 RFB IOUT V+ R1 16 DATA INPUTS ROFS R2 RFB 15V 0.1µF – 13 16-BIT DAC VOUT + LTC1821 V – 20 25 TO 36, 3 TO 6 WR WR LD CLR 15 24 LD 23 CLR DNC* DNC* DNC* 18 7 19 NC 21 22 DGND 1 16 *DO NOT CONNECT Unipolar Binary Code Table DIGITAL INPUT BINARY NUMBER IN DAC REGISTER ANALOG OUTPUT VOUT LSB MSB 1111 1000 0000 0000 1111 0000 0000 0000 1111 0000 0000 0000 1111 0000 0001 0000 –VREF (65,535/65,536) –VREF (32,768/65,536) = –VREF/ 2 –VREF (1/65,536) 0V 1821 F01 Figure 1. Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to – VREF 10 –15V 0.1µF AGNDF AGNDS 17 VOUT = 0V TO –VREF LTC1821 U U W U APPLICATIONS INFORMATION Bipolar Mode (4-Quadrant Multiplying, VOUT = – VREF to VREF) operation can be achieved with a minimum of external components—a capacitor and a single op amp, as shown in Figure 2. With a fixed 10V reference, the circuit shown gives a precision bipolar – 10V to 10V output swing. The LTC1821 contains on chip all the 4-quadrant resistors necessary for bipolar operation. 4-quadrant multiplying VREF 3 2 + – 5V LT1001 0.1µF 22pF 9 10 R1 6 8 REF RCOM 2 VCC 11 ROFS 12 14 RFB IOUT V+ R1 ROFS R2 16 DATA INPUTS RFB 15V 0.1µF – 13 16-BIT DAC VOUT + LTC1821 V – 20 25 TO 36, 3 TO 6 WR WR LD CLR 15 24 LD 23 DGND CLR DNC* DNC* DNC* NC 7 18 19 21 22 1 AGNDF AGNDS 17 VOUT = –VREF TO VREF –15V 0.1µF 16 *DO NOT CONNECT Bipolar Offset Binary Code Table DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB MSB 1111 1000 1000 0111 0000 ANALOG OUTPUT VOUT 1111 0000 0000 1111 0000 1111 0000 0000 1111 0000 1111 0001 0000 1111 0000 VREF (32,767/32,768) VREF (1/32,768) 0V –VREF (1/32,768) –VREF 1821 F02 Figure 2. Bipolar Operation (4-Quadrant Multiplication) VOUT = – VREF to VREF 11 LTC1821 U W U U APPLICATIONS INFORMATION Precision Voltage Reference Considerations Because of the extremely high accuracy of the 16-bit LTC1821, careful thought should be given to the selection of a precision voltage reference. As shown in the section describing the basic operation of the LTC1821, the output voltage of the DAC circuit is directly affected by the voltage reference; thus, any voltage reference error will appear as a DAC output voltage error. There are three primary error sources to consider when selecting a precision voltage reference for 16-bit applications: output voltage initial tolerance, output voltage temperature coefficient (TC), and output voltage noise. Initial reference output voltage tolerance, if uncorrected, generates a full-scale error term. Choosing a reference with low output voltage initial tolerance, like the LT1236 (±0.05%), minimizes the gain error due to the reference; however, a calibration sequence that corrects for system zero- and full-scale error is always recommended. A reference’s output voltage temperature coefficient affects not only the full-scale error, but can also affect the circuit’s INL and DNL performance. If a reference is chosen with a loose output voltage temperature coefficient, then the DAC output voltage along its transfer characteristic will be very dependent on ambient conditions. Minimizing the error due to reference temperature coefficient can be achieved by choosing a precision reference with a low output voltage temperature coefficient and/or tightly controlling the ambient temperature of the circuit to minimize temperature gradients. As precision DAC applications move to 16-bit and higher performance, reference output voltage noise may contribute a dominant share of the system’s noise floor. This in turn can degrade system dynamic range and signal-tonoise ratio. Care should be exercised in selecting a voltage 12 reference with as low an output noise voltage as practical for the system resolution desired. Precision voltage references, like the LT1236, produce low output noise in the 0.1Hz to 10Hz region, well below the 16-bit LSB level in 5V or 10V full-scale systems. However, as the circuit bandwidths increase, filtering the output of the reference may be required to minimize output noise. Grounding As with any high resolution converter, clean grounding is important. A low impedance analog ground plane and star grounding should be used. AGNDF and AGNDS must be tied to the star ground with as low a resistance as possible. When it is not possible to locate star ground close to AGNDF and AGNDS, separate traces should be used to route these pins to the star ground. This minimizes the voltage drop from these pins to ground due to the code dependent current flowing into the ground plane. If the resistance of these separate circuit board traces exceeds 1Ω, the circuit of Figure␣ 3 eliminates this code dependent voltage drop error for high resistance traces. To calculate PC track resistance in squares, divide the length of the PC track by the width and multiply this result by the sheet resistance of copper foil. For 1 oz copper (≈ 1.4 mils thick), the sheet resistance is 0.045Ω per square. Table 2. Partial List of LTC Precision References Recommended for Use with the LTC1821, with Relevant Specifications INITIAL TOLERANCE TEMPERATURE DRIFT 0.1Hz to 10Hz NOISE LT1019A-5, LT1019A-10 ±0.05% 5ppm/°C 12µVP-P LT1236A-5, LT1236A-10 ±0.05% 5ppm/°C 3µVP-P LT1460A-5, LT1460A-10 ±0.075% 10ppm/°C 20µVP-P LT1790A-2.5 ±0.05% 10ppm/°C 12µVP-P REFERENCE LTC1821 U U W U APPLICATIONS INFORMATION 5V LT1236A-10 9 10 R1 8 REF RCOM 2 VCC 11 12 14 ROFS RFB IOUT V + 15 R1 16 DATA INPUTS ROFS R2 LTC1821 RFB – 13 16-BIT DAC VOUT + 25 TO 36, 3 TO 6 V – 20 AGNDS LD WR 24 23 CLR DNC* DNC* DNC* 7 18 19 NC 22 21 DGND 19 VOUT = 0V TO –10V –15V 16 0.1µF AGNDF 17 *DO NOT CONNECT 6 2 LT1001 ERA82.004 3 ALTERNATE AMPLIFIER FOR OPTIMUM SETTLING TIME PERFORMANCE AGNDS AGNDF 16 200Ω 17 – 6 ERA82.004 2 200Ω 1000pF LT1468 + WR LD CLR 15V 0.1µF + 4 22pF 0.1µF 6 10V – 15V 2 3 1821 F03 Figure 3. Driving AGNDF and AGNDS with a Force/Sense Amplifier 13 LTC1821 U TYPICAL APPLICATION 17-Bit Sign Magnitude Output Voltage DAC with Bipolar Zero Error of 140µV (0.92LSB at 17 Bits) 16 15 14 LTC203AC 15V 2 1 2 3 0.1µF LT1236A-10 4 V+ 6 3 2 + – 5V 6 LT1468 0.1µF 0.1µF V– 15pF SIGN BIT 10 9 R1 RCOM 22pF 8 REF 2 11 VCC ROFS 12 14 RFB IOUT V+ R1 ROFS R2 16 DATA INPUTS RFB 13 + WR 14 24 LD 23 CLR DNC* DNC* DNC* NC 7 18 19 21 22 DGND 1 AGNDF AGNDS 17 16 VOUT VOUT V– 25 TO 36, 3 TO 6 WR LD CLR 15V 0.1µF – 16-BIT DAC LTC1821 15 20 –15V 0.1µF *DO NOT CONNECT 1821 TA03 LTC1821 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. GW Package 36-Lead Plastic SSOP (Wide 0.300) (LTC DWG # 05-08-1642) 15.290 – 15.544* (0.602 – 0.612) 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 10.160 – 10.414 (0.400 – 0.410) 7.417 – 7.595** (0.292 – 0.299) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 2.286 – 2.387 (0.090 – 0.094) 2.463 – 2.641 (0.097 – 0.104) 0.254 – 0.406 × 45° (0.010 – 0.016) 0° – 8° TYP 0.231 – 0.3175 (0.0091 – 0.0125) 0.610 – 1.016 (0.024 – 0.040) NOTE: DIMENSIONS ARE IN MILLIMETERS *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.152mm (0.006") PER SIDE 0.800 (0.0315) BSC 0.304 – 0.431 (0.012 – 0.017) **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.254mm (0.010") PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 0.127 – 0.305 (0.005 – 0.0115) GW36 SSOP 1098 15 LTC1821 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS ADCs Low Power 400ksps, 14-Bit ADC 20mW, Single or ±5V, Serial I/O DACs Op Amps LTC1417 LTC1418 14-Bit, 200ksps, Single 5V ADC 15mW, Serial/Parallel ±10V LTC1604/LTC1608 16-Bit, 333ksps/500ksps, ±5V ADC 90dB SINAD, 100dB THD, ±2.5V Inputs LTC1605/LTC1606 16-Bit, 100ksps/250ksps, Single 5V ADC ±10V Inputs, 55mW/75mW, Byte or Parallel I/O LTC1609 16-Bit, 200ksps, Single 5V ADC ±10V Inputs, 65mW, Serial I/O LTC2400 24-Bit, Micropower ∆Σ ADC in SO-8 0.3ppm Noise, 4ppm INL, 10ppm Total Unadjusted Error, 200µA LTC2410 24-Bit, Fully Differential, No Latency ∆Σ ADC 0.16ppm Noise, 2ppm INL, 10ppm Total Unadjusted Error, 200µA LTC1591/LTC1597 Parallel 14-/16-Bit Current Output DACs On-Chip 4-Quadrant Resistors LTC1595/LTC1596 Serial 16-Bit Current Output DACs in SO-8/S16 Low Glitch, ±1LSB Maximum INL, DNL LTC1599 Parallel 2 Byte 16-Bit Current Output DAC On-Chip 4-Quadrant Resistors LTC1650 Serial 16-Bit ±5V Voltage Output DAC Low Noise and Low Glitch Rail-to-Rail VOUT LTC1654 Dual 14-Bit Rail-to-Rail VOUT DAC Programmable Speed/Power, 3.5µs/750µA, 8µs/450µA LTC1655/LTC1655L Serial 5V/3V 16-Bit Voltage Output DAC in SO-8 Low Power, Deglitched, Rail-to-Rail VOUT LTC1657/LTC1657L Parallel 5V/3V 16-Bit Voltage Output DAC Low Power, Deglitched, Rail-to-Rail VOUT LTC1658 Serial 14-Bit Voltage Output DAC Low Power, 8-Lead MSOP Rail-to-Rail VOUT LT1001 Precision Operational Amplifier Low Offset, Low Drift LT1468 90MHz, 22V/µs, 16-Bit Accurate Op Amp Precise, 1µs Settling to 0.0015% Bandgap Reference ±0.05% Initial Tolerance, 5ppm/°C LT1236 Precision Buried Zener Reference ±0.05% Initial Tolerance, Low Noise 3µVP-P LT1460 Micropower Bandgap Reference ±0.075% Initial Tolerance, 10ppm/°C LT1790 SOT-23 Micropower, Low Dropout Reference ±0.05% Initial Tolerance, 10ppm/°C References LT1019 16 Linear Technology Corporation 1821f LT/TP 0401 4K • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com LINEAR TECHNOLOGY CORPORATION 2000