ETC PI3B16215V

PI3B16215
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3.3V, Hot Insertion, 20-Bit FET
Bus Switch w/Precharged Outputs
Product Features
Product Description
• Near Zero Propagation Delay
Pericom Semiconductor’s PI3B series of logic circuits are produced
using the company’s advanced submicron CMOS Technology.
The PI3B16215 provides 20-bits of high-speed bus switching. The
switches low ON-state resistance allows connections to be made
with minimal propagation delay also precharges the B-port to a userselectable bias voltage (BIASV) to minimize live- insertion noise.
The device is organized as dual 10-bit bus switches with individual
output-enable (OE) inputs. When OE is LOW, the corresponding
10-bit bus switch is on and port A is connected to port B. When OE
is HIGH, the switch is open, a high-impedance state exists between
the two ports, and port B is precharged to BIASV through the
equivalent of a 10-kohm resistor.
To ensure the high-impedance state on power up or power down,
OE should be tied to VCC through a pullup resistor; the minimum
value of the resistor is determined by the current-sinking capability
of the driver connected to OE.
• 5-ohm Switches Connect Between Two Ports
• Fast Switching Speed: 4.5ns max.
• Permits Hot Insertion
• Isolation during Power-Off conditions
• B-Port Outputs are precharged by Bias Voltage
to minimize signal distortion during live insertion
• Package options include:
– 48-pin 150-mil wide plastic BQSOP (B)
– 48-pin 240-mil wide plastic TSSOP (A)
– 48-pin 300-mil wide plastic SSOP (V)
Product Pin Configuration
Logic Block Diagram
1
1A1
2
46
SW
BIASV
BIASV
1B1
1A1
1A2
1A3
1A10
12
36 1B10
SW
1A4
1A5
1A6
1OE
2A1
GND
48
1A7
13
35
SW
1A8
2B1
1A9
1A10
2A1
2A10
24
25
SW
2A2
2B10
VCC
2A3
2OE
GND
47
2A4
2A5
2A6
A
2A7
B
2A8
2A9
2A10
48
1
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
48-Pin
10
A,B,V 39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
25
24
1OE
2OE
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
1B9
1B10
2B1
2B2
2B3
GND
2B4
2B5
2B6
2B7
2B8
2B9
2B10
OE
1
PS8190D
08/22/01
PI3B16215
3.3V, Hot Insertion,
20-Bit FET Bus Switch w/Precharged Outputs
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Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.)
Storage Temperature Range, TSTG ...................................... –65ºC to +150ºC
Supply Voltage Range, VCC ......................................... –0.5V to +4.6V
Bias Voltage Range, BIASV ........................................ –0.5V to +4.6V
Input Voltage Range ........................................................–0.5V to +4.6V
DC Output Current ....................................................................... 120mA
Power Dissipation ............................................................................ 0.5W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 3.0V to 3.6V)
Parame te r
BIASV
De s cription
Te s t Conditions
Bias Voltage
M in.
Typ.
0
M ax.
VCC
VIH
High- Level Control Input Voltage
VCC = 2.7V to 3.6V
2
VIL
Low- Level Control Input Voltage
VCC = 2.7V to 3.6V
–0.5
VIK
Clamp Diode Voltage
VCC = 3.0V
II = –18mA
Input Current
VCC = 3.6V
VI = VCC or GND
±5
High Impedance Output Current
VCC = 0
VI = VO = 0 to 3.6V
10
IO
Output Current
VCC = 3.0V
BIASV = 2.4V, VO = 0
ICC
Quiescent Power Supply Current
VCC = 3.6V
IO = 0, VI = VCC or GND
Supply Current
VCC = 3.6V
One Input at 3V,
Other Inputs at VCC or
GND
CIN
Input Capacitance
VI = 3.0V or 0
COFF
A/B Capacitance Switch Off
VO = 3.0V or 0
Switch Off
8.5
RON(2)
Switch On Resistance
VI = 0
II = 64mA
5
8
II = 24mA
5
8
II = 15mA
10
15
II
IOZH
∆ICC(1)
VI = 2.4V
Units
0.8
–0.7
V
–1.2
0.15
µA
mA
10
750
3.0
µA
pF
Ω
Notes:
1. This is the increase in supply current for each input (OE only) that is at the specified voltage level rather than VCC or GND.
2. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On state
resistance is determined by the lower of the voltages of the two (A or B) terminals.
Truth Table
OE
Function
L
A port = B port
H
A port = Z, B Port = BIASV
2
PS8190D
08/22/01
PI3B16215
3.3V, Hot Insertion,
20-Bit FET Bus Switch w/Precharged Outputs
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Switching Characteristics over Operating Range
(Switching characteristics over recommended operating free-air temperature range unless otherwise noted)
VCC = 3.3V ±10%
Parame te r
Te s t Conditions
From (Input)
To (Output)
A or B
B or A
tPD(1)
tPZH
BIASV = GND
tPZL
BIASV = 3V
tPHZ
BIASV = GND
tPLZ
BIASV = 3V
M in.
M ax.
Units
0.25
4.5
OE
ns
4.5
A or B
5.0
5.0
Note:
1. The propagation delay is the calculated RC time of the typical on-state resistance of the switch and the specified load
capacitance, when driven by an ideal voltage source (zero output impedance).
Parameter Measurements (VCC = 2.7 and 3.3V ±10%)
6V
500W
From Output
Under Test
S1
Test
tPD
tPLZ/tPZL
tPHZ/tPZH
Open
GND
CL = 50pF
(See Note 1)
500W
Output
Control
(Low Level
Enabling)
LOAD CIRCUIT
1.5V
1.5V
Input
0V
tPLH
tPHL
Output
Waveform 2
S1 at GND
(see Note 2)
VOH
Output
1.5V
2.7V
1.5V
1.5V
VOL
Voltage Waveforms Propagation Delay Times
1.5V
0V
tPZL
Output
Waveform 1
S1 at 2x VCC
(see Note 2) tPZH
2.7V
S1
Open
6V
GND
tPLZ
3V
1.5V
VOL +0.3V
VOL
tPHZ
1.5V
VOH -0.3V
VOH
0V
Voltage Waveforms Enable and Disable Times
Figure 1. Load Circuit and Voltage Waveforms
Notes:
1. CL includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
3. All input impulses are supplied by generators having the following characteristics: PRR ≤ MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns.
4. The outputs are measured one at a time with one transition per measurement.
5. tTPZ and tPHZ are the same as tDIS
6. tPZL and tPZH are the same as tEN
7. tPLH and tPHL are the same as tPD
3
PS8190D
08/22/01
PI3B16215
3.3V, Hot Insertion,
20-Bit FET Bus Switch w/Precharged Outputs
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48-Pin TSSOP (A) Package
48
.236
.244
1
6.0
6.2
.488 12.4
.496 12.6
.047
1.20 Max
SEATING PLANE
.004 0.09
.008 0.20
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
.0197
BSC
0.50
0.45 .018
0.75 .030
.002
.006
0.05
0.15
.007
.010
0.17
0.27
.319
BSC
8.1
48-Pin BQSOP (B) Package
48
.150
.157
3.80
4.00
.228
.244
5.80
6.20
Gauge Plane
.020
.029
0.50
0.75
.010 0.25
BSC
1
.014 0.356 REF
.386
.394
9.80
10.00
.015 0.381 x 45˚
.008 0.20 Nom
Nom
.063 1.60
5˚
.0157 BSC
0.40
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
.0051
.009
0.13
0.23
4
.079
2.0 Max
.002 0.05
.009 0.25
PS8190D
08/22/01
PI3B16215
3.3V, Hot Insertion,
20-Bit FET Bus Switch w/Precharged Outputs
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48-Pin SSOP (V) Package
48
.291
.299
7.39
7.59
.395
.420
10.03
10.67
Gauge Plane
.010 0.25
.02 0.51
.04 1.01
1
.620
.630
15.75
16.00
.015 0.381 x 45˚
.025 0.635
.008
0.20
Nom.
.110 2.79 Max
.008 0.20
.0135 0.34
.025 BSC
0.635
0-8˚
.008 0.20
.016 0.40
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
Ordering Information
Part
Pin - Package
Width
PI3B16215A
56- TSSO P (A56)
240- mil
PI3B16215B 56- BQ SO P (B56)
150- mil
PI3B16215V
300- mil
56- SSO P (V56)
Te mpe rature
–40ºC to +85ºC
Applications Information
Logic Inputs
The logic control inputs can be driven up to +3.6V regardless of the
supply voltage. For example, given a +3.3V supply, IN may be driven
low to 0V and high to 3.6V. Driving IN Rail-to-Rail® minimizes power
consumption.
Power-Supply Sequencing
Proper power-supply sequencing is recommended for all CMOS
devices. Always apply VCC before applying VBIAS and signals to
input/output or control pins.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5
PS8190D
08/22/01