PI5C6801C 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 10-Bit Bus Switch with Precharged Outputs for Live Insertion and –2V Undershoot Protection Product Description Product Features Pericoms Semiconductors PI5C series of logic circuits are produced using the Companys advanced submicron CMOS technology, achieving industry leading performance. The PI5C6801C is a 10-bit bus switch with low on-state resistance. The bus switch creates no additional propagation delay. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise. The switch is turned on by a single enable (ON) input. When ON is LOW, the switch is on and port A is connnected to port B. When ON is HIGH, the switch between port A and port B is open and the B port is precharged to BIASV through the equivalent of a 10-kΩ resistor. RON is 5 Ohm typical Undershoot protection on A-port only Industrial Operation Temperature: 40ºC to +85ºC Near Zero propagation delay VCC Operating Range: +4.0V to +5.5V Outputs are pre-charged by bias voltage to minimize signal distortion during live insertion Packages options: -24-pin 150 mil-wide plastic QSOP (Q) -24-pin 173 mil-wide plastic TSSOP (L) Product Pin Configuration Logic Diagram 13 23 A1 14 A10 ON A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 GND B1 B10 ON Truth Table(1) Function Connect Precharge ON L H B1 - B10 A1 - A10 BIASV Notes: 1. H = High Voltage Level L = Low Voltage Level 1 Powered by ICminer.com Electronic-Library Service CopyRight 2003 1 2 3 4 5 6 7 8 9 10 11 12 24-Pin L, Q 24 23 22 21 20 19 18 17 16 15 14 13 VCC B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 BIASV PS8374B 05/02/00 PI5C6801C 10-Bit BusSwitch with PrechargedOutputs for Live Insertion and -2V Undershoot Protection 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Absolute Maximum Ratings Over Free-Air Temperature Range* (Above which the useful life may be impaired. For user guidelines, not tested.) Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Storage Temperature ............................................................ 65°C to +150°C Supply Voltage Range ................................................................ 0.5V to +7V DC Input Voltage(1) .................................................................................... 0.5V to +7V Input Clamp Current, IIK (V1<0) .......................................................... 50mA DC Output Current .............................................................................. 120mA Power Dissipation(2) .................................................................................................. 0.5W Notes: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. Recommended Operating Conditions Parame te r De s cription M in. M ax. VCC Supply voltage 4 5.5 BIASV Supply voltage 1.3 VCC VIH High- Level input voltage VIL Low- level input voltage TA Operating free- air temperature Units V 2 0.8 40 85 °C Electrical Characteristics (Over Recommended Operating Free-air Temperature Range) Parame te r Te s t Conditions M in. Typ= M ax. Units 1.8 V ±5 µA VIK VCC = 4.5V II = 18mA II VCC = 5.5V VI = 5.5V or GND IO VCC = 4.5V BIASV = 2.4V VO= 0V ICC VCC = 5.5V IO = 0A VI = VCC or GND 100 µA O ne input at 3.4V O ther at VCC or GND 2.5 mA ∆ICCE Control pins VCC = 5.5V CI Control pins VI = 3V or 0V CO(O FF) 0.20 mA 3.5 pF VO = 3V or 0V Switch O ff VCC = 4V VI = 2.4V II = 15mA 9 28 VI = 0V II = 64mA 5.5 8 VI = 0V II = 30mA 5 8 VI = 2.4V II = 15mA 9 16 RON* VCC = 4.5V 4.5 Ω Notes: * Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals. E This is the increase in supply current for each input that is at the specified TTL voltage level rather the VCC or GND. = All typical values are at VCC = 5V, TA = 25°C. Powered by ICminer.com Electronic-Library Service CopyRight 2003 2 PS8374B 05/02/00 PI5C6801C 10-Bit BusSwitch with PrechargedOutputs for Live Insertion and -2V Undershoot Protection 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics (Over Recommended Operating Free-air Temperature Range, CL = 50pF) Te s t Conditions (1) Parame te r From (Input) To (Output) A or B B or A ON A or B ON A or B tpd tPZH BIASV = GND tPZL BIASV = 3V tPHZ BIASV = GND tPLZ BIASV = 3V VCC = 5V ± 0.5V M in. M ax. VCC = 4V M in. M ax. 0.25 Units 0.25 20 30 22 36 20 30 22 36 20 30 22 36 20 30 22 36 ns Notes: 1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance of 50pF, when driven by an ideal voltage source (zero output impedance). Parameter Measurements 7V S1 From Output Under Test CL = 50pF (See note 1) Output Control (Low Level Enabling) LOAD CIRCUIT 3V Output Waveform 1 S1 at 6V (see Note 2) 1.5V 1.5V Input 0V tPLH tPHL VOH Output 1.5V Te s t S1 tpd O pen tPLZ/tPZL 7V tPHZ/tPZH O pen Open GND Output Waveform 2 S1 at Open (see Note 2) 1.5V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 3V 1.5V 1.5V 0V tPZL tPLZ 3.5V 1.5V VOL +0.3V tPZH VOL tPHZ VOH 1.5V VOH -0.3V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES Notes: 1. CL includes probe and jig capacitance. 2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control. 3. All input pulses are supplied by generators having the following characteristics: PRR<10MHz, ZO = 50Ω, tr ≤ 2.5ns, tf ≤ 2.5ns. 4. The outputs are measured one at a time with one transition per measurement. 5. tPLZ and tPHZ are the same as tdis. 6. tPZL and tPZH are the same as ten. 7. tPLH and tPHL are the same as tpd. 3 Powered by ICminer.com Electronic-Library Service CopyRight 2003 PS8374B 05/02/00 PI5C6801C 10-Bit BusSwitch with PrechargedOutputs for Live Insertion and -2V Undershoot Protection 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 24-pin QSOP (Q) 24 .150 .157 3.81 3.99 .015 x 45˚ 0.38 1 .337 .344 .007 .010 8.56 8.74 .016 .050 .033 0.84 .053 .069 1.35 1.75 .008 0.203 .012 0.305 0.406 1.27 .228 .244 5.79 6.20 SEATING PLANE .025 typical 0.635 0.178 0.254 .004 0.101 .010 0.254 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS Powered by ICminer.com Electronic-Library Service CopyRight 2003 4 PS8374B 05/02/00 PI5C6801C 10-Bit BusSwitch with PrechargedOutputs for Live Insertion and -2V Undershoot Protection 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 24-pin TSSOP (L) 24 .169 .177 1 4.3 4.5 .303 .311 7.7 7.9 .004 .008 .047 1.20 Max .0256 BSC 0.65 .007 .012 0.19 0.30 .002 .006 0.45 0.75 SEATING PLANE 0.09 0.20 .018 .030 .252 BSC 6.4 0.05 0.15 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS Ordering Information Part Pin Package Width PI5C6801CQ 24 QSOP (Q ) 150- mil PI5C6801CL 24 TSSOP (L) 173- mil Applications Information Logic Inputs The logic control inputs can be driven up to +5.5V regardless of the supply voltage. For example, given a +5.0V supply, IN may be driven low to 0V and high to 5.5V. Driving IN Rail-to-Rail® minimizes power consumption. Power-Supply Sequencing Proper power-supply sequencing is recommended for all CMOS devices. Always apply VCC before applying VBIAS and signals to the input/output or control pins. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 5 Powered by ICminer.com Electronic-Library Service CopyRight 2003 PS8374B 05/02/00