CS5201-1
1.0 A Adjustable Linear
Regulator
The CS5201–1 linear regulator provides 1.0 A with an output
voltage accuracy of ±1.0 %. The device uses two external resistors to
set the output voltage within a 1.25 V to 5.5 V range.
This regulator is intended for use as a post regulator and
microprocessor supply. The fast loop response and low dropout
voltage make this regulator ideal for applications where low voltage
operation and good transient response are important.
The circuit is designed to operate with dropout voltages less than 1.2 V
at 1.0 A output current. Device protection includes overcurrent and
thermal shutdown.
The CS5201 is pin compatible with the LT1086 family of linear
regulators.
The regulator is available in TO–220, surface mount D2, and
SOT–223 packages.
Features
• Output Current to 1.0 A
• Output Accuracy to ±1.0% Over Temperature
• Dropout Voltage (typical) 1.0 V @ 1.0 A
• Fast Transient Response
• Fault Protection
– Current Limit
– Thermal Shutdown
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TO–220
THREE LEAD
T SUFFIX
CASE 221A
1
12
2
3
D2PAK
3–PIN
DP SUFFIX
CASE 418E
Tab = VOUT
Pin 1. Adj
2. VOUT
3. VIN
3
1
23
SOT–223
ST SUFFIX
CASE 318E
ORDERING INFORMATION*†
5.0 V
Device
VOUT
VIN
3.3 V @ 1.0 A
CS5201–1
124 Ω
1.0%
Adj
10 µF
5.0 V
0.1 µF
5.0 V Tant
200 Ω
1.0%
22 µF
5.0 V
Package
Shipping
CS5201–1GT3
TO–220‡
50 Units/Rail
CS5201–1GDP3
D2PAK‡
50 Units/Rail
CS5201–1GDPR3
D2PAK‡
750 Tape & Reel
CS5201–1GST3
SOT–223‡
80 Units/Rail
CS5201–1GSTR3
SOT–223‡
2500 Tape & Reel
*Additional ordering information can be found on page
7 of this data sheet.
†Consult your local sales representative for fixed
output voltage versions.
‡TO–220 are all 3–pin, straight leaded. D2PAK and
SOT–223 are all 3–pin.
Figure 1. Applications Diagram
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 7 of this data sheet.
Semiconductor Components Industries, LLC, 2001
February, 2001 – Rev. 3
1
Publication Order Number:
CS5201–1/D
CS5201–1
ABSOLUTE MAXIMUM RATINGS*
Parameter
Supply Voltage, VCC
Operating Temperature Range
Junction Temperature
Storage Temperature Range
Lead Temperature Soldering:
Wave Solder (through hole styles only) Note 1.
Reflow (SMD styles only) Note 2.
ESD Damage Threshold (Human Body Model)
Value
Unit
7.0
V
–40 to +70
°C
150
°C
–60 to +150
°C
260 Peak
230 Peak
°C
°C
2.0
kV
1. 10 second maximum.
2. 60 second maximum above 183°C
*The maximum package power dissipation must be observed.
ELECTRICAL CHARACTERISTICS (CIN = 10 µF, COUT = 22 µF Tantalum, VOUT + VDROPOUT < VIN < 7.0 V, 0°C ≤ TA ≤ 70°C,
TJ ≤ +150°C, unless otherwise specified, Ifull load = 1.0 A)
Characteristic
Test Conditions
Min
Typ
Max
Unit
1.241
(–1.0%)
1.254
1.266
(+1.0%)
V
Adjustable Output Voltage
Reference Voltage (Notes 3. and 4.)
VIN – VOUT = 1.5 V; VAdj = 0 V
10 mA ≤ IOUT ≤ 1.0 A
Line Regulation
1.5 V ≤ VIN – VOUT ≤ 5.75 V; IOUT = 10 mA
–
0.02
0.20
%
Load Regulation (Notes 3. and 4.)
VIN – VOUT = 1.5 V; 10 mA ≤ IOUT ≤ 1.0 A
–
0.04
0.40
%
Dropout Voltage (Note 5.)
IOUT = 1.0 A
–
1.0
1.2
V
Current Limit
VIN – VOUT = 3.0 V; TJ ≥ 25°C
1.1
3.1
–
A
Minimum Load Current (Note 6.)
VIN = 7.0 V, VAdj = 0 V
–
0.6
2.0
mA
Adjust Pin Current
VIN – VOUT = 3.0 V; IOUT = 10 mA
–
50
100
µA
Thermal Regulation (Note 7.)
30 ms Pulse, TA = 25°C
–
0.002
0.020
%/W
Ripple Rejection (Note 7.)
f = 120 Hz; IOUT = 1.0 A; VIN – VOUT = 3.0 V;
VRIPPLE = 1.0 VPP
–
80
–
dB
Thermal Shutdown (Note 8.)
–
150
180
210
°C
Thermal Shutdown Hysteresis (Note 8.)
–
–
25
–
°C
3. Load regulation and output voltage are measured at a constant junction temperature by low duty cycle pulse testing. Changes in output
voltage due to temperature changes must be taken into account seperately.
4. Specifications apply for an external Kelvin sense connection at a point on the output pin 1/4” from the bottom of the package.
5. Dropout voltage is a measurement of the minimum input/output differential at full load.
6. The minimum load current is the minimum current required to maintain regulation. Normally the current in the resistor divider used to set the
output voltage is selected to meet the minimum load requirement.
7. Guaranteed by design, not 100% tested in production.
8. Thermal shutdown is 100% functionally tested in production.
PACKAGE PIN DESCRIPTION
Package Pin Number
TO–220
D2PAK
SOT–223
Pin Symbol
1
1
1
Adj
2
2
2
VOUT
3
3
3
VIN
Function
Adjust pin (low side of the internal reference).
Regulated output voltage (case).
Input voltage.
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2
CS5201–1
VOUT
VIN
Output
Current
Limit
Thermal
Shutdown
– +
Error
Amplifier
Bandgap
Reference
Adj
Figure 2. Block Diagram
TYPICAL PERFORMANCE CHARACTERISTICS
1.00
0.10
0.08
Output Voltage Deviation (%)
TCASE = 0°C
0.95
VDROPOUT (V)
TCASE = 25°C
0.90
0.85
TCASE = 125°C
0.80
0.06
0.04
0.02
0.00
–0.02
–0.04
–0.06
–0.08
–0.10
0.75
–0.12
0
200
400
600
800
1000
0
TJ (°C)
Figure 3. Dropout Voltage vs. Output
Current
Figure 4. Reference Voltage vs.
Temperature
0.65
Minimum Load Current (mA)
0.100
Output Voltage Deviation (%)
10 20 30 40 50 60 70 80 90 100 110 120 130
IOUT (mA)
0.075
0.050
TCASE = 25°C
0.025
TCASE = 125°C
0
TCASE = 0°C
0.55
TCASE = 125°C
0.50
0.45
CIN = COUT = 22 µF Tantalum
TCASE = 0°C
0.000
TCASE = 25°C
0.60
1
0.40
2
1
2
3
4
5
6
Output Current (A)
VIN – VOUT (V)
Figure 5. Load Regulation vs. Output
Current
Figure 6. Minimum Load Current vs.
VIN – VOUT
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3
7
CS5201–1
85
70
IO = 10 mA
75
Ripple Rejection (dB)
Adjust Pin Current (µA)
65
60
55
50
45
TCASE = 25°C
IOUT = 1.0 A
(VIN – VOUT) = 3.0 V
VRIPPLE = 1.0 VPP
CAdj = 0.1 µF
45
35
15
0
101
10 20 30 40 50 60 70 80 90 100 110 120 130
102
103
104
105
Temperature (°C)
Frequency (Hz)
Figure 7. Adjust Pin Current vs.
Temperature
Figure 8. Ripple Rejection vs. Frequency
300
3.5
200
3.3
106
3.1
100
2.9
0
ISC (A)
Voltage Deviation (mV)
55
25
40
Load Step (mA)
65
VOUT = 3.3 V
–100
COUT = CIN = 22 µF Tantalum
CAdj = 0.1 µF
–200
2.7
2.5
2.3
2.1
1000
1.9
500
1.7
1.5
0
0
1
2
3
4
5
6
7
8
9
10
1.0
1.5
2.0
2.5
3.0
3.5
Time (µS)
VIN – VOUT (V)
Figure 9. Transient Response
Figure 10. Short Circuit Current vs.
VIN – VOUT
4.0
APPLICATIONS INFORMATION
The CS5201–1 linear regulator provides adjustable voltages
at currents up to 1.0 A. The regulator is protected against
overcurrent conditions and includes thermal shutdown.
The CS5201–1 has a composite PNP–NPN output
transistor and requires an output capacitor for stability. A
detailed procedure for selecting this capacitor is included in
the Stability Considerations section.
A resistor divider network R1 and R2 causes a fixed current
to flow to ground. This current creates a voltage across R2
that adds to the 1.25 V across R1 and sets the overall output
voltage. The adjust pin current (typically 50 µA) also flows
through R2 and adds a small error that should be taken into
account if precise adjustment of VOUT is necessary.
The output voltage is set according to the formula:
Adjustable Operation
VOUT VREF The CS5201–1 has an output voltage range of 1.25 V to
5.5 V. An external resistor divider sets the output voltage as
shown in Figure 11. The regulator maintains a fixed 1.25V
(typical) reference between the output pin and the adjust pin.
R2
R1 R1
IAdj R2
The term IAdj × R2 represents the error added by the adjust
pin current.
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4
CS5201–1
illustrated in Figure 12; however, the design of clamp
circuitry must be done on an application by application
basis. Care must be taken to ensure the clamp actually
protects the design. Components used in the clamp design
must be able to withstand the short circuit condition
indefinitely while protecting the IC.
R1 is chosen so that the minimum load current is at least
2.0 mA. R1 and R2 should be the same type, e.g. metal film
for best tracking over temperature. While not required, a
bypass capacitor from the adjust pin to ground will improve
ripple rejection and transient response. A 0.1 µF tantalum
capacitor is recommended for “first cut” design. Type and
value may be varied to obtain optimum performance vs.
price.
VIN
EXTERNAL SUPPLY
VOUT
VOUT
VIN
CS5201–1
VREF
C1
Adj
C2
R1
VIN
VAdj
IAdj
CAdj
VOUT
R2
VOUT
Figure 11. Resistor Divider Scheme
Figure 12. Short Circuit Protection Circuit for
High Voltage Application.
Short Circuit Protection
The CS5201–1 linear regulator has an absolute maximum
specification of 7.0 V for the voltage difference between VIN
and VOUT. However, the IC may be used to regulate voltages
in excess of 7.0 V. The main considerations in such a design
are power–up and short circuit capability.
In most applications, ramp–up of the power supply to VIN
is fairly slow, typically on the order of several tens of
milliseconds, while the regulator responds in less than one
microsecond. In this case, the linear regulator begins
charging the load as soon as the VIN to VOUT differential is
large enough that the pass transistor conducts current. The
load at this point is essentially at ground, and the supply
voltage is on the order of several hundred millivolts, with the
result that the pass transistor is in dropout. As the supply to
VIN increases, the pass transistor will remain in dropout, and
current is passed to the load until VOUT reaches the point at
which the IC is in regulation. Further increase in the supply
voltage brings the pass transistor out of dropout. The result
is that the output voltage follows the power supply ramp–up,
staying in dropout until the regulation point is reached. In
this manner, any output voltage may be regulated. There is
no theoretical limit to the regulated voltage as long as the
VIN to VOUT differential of 7.0 V is not exceeded.
However, the possibility of destroying the IC in a short
circuit condition is very real for this type of design. Short
circuit conditions will result in the immediate operation of
the pass transistor outside of its safe operating area.
Over–voltage stresses will then cause destruction of the pass
transistor before overcurrent or thermal shutdown circuitry
can become active. Additional circuitry may be required to
clamp the VIN to VOUT differential to less than 7.0 V if
failsafe operation is required. One possible clamp circuit is
Stability Considerations
The output compensation capacitor helps determine three
main characteristics of a linear regulator: start–up delay,
load transient response, and loop stability.
The capacitor value and type is based on cost, availability,
size and temperature constraints. A tantalum or aluminum
electrolytic capacitor is best, since a film or ceramic
capacitor with almost zero ESR can cause instability. The
aluminum electrolytic capacitor is the least expensive
solution. However, when the circuit operates at low
temperatures, both the value and ESR of the capacitor will
vary considerably. The capacitor manufacturer’s data sheet
provides this information.
A 22 µF tantalum capacitor will work for most
applications, but with high current regulators such as the
CS5201–1 the transient response and stability improve with
higher values of capacitance. The majority of applications
for this regulator involve large changes in load current so the
output capacitor must supply the instantaneous load current.
The ESR of the output capacitor causes an immediate drop
in output voltage given by:
V I ESR
For microprocessor applications it is customary to use an
output capacitor network consisting of several tantalum and
ceramic capacitors in parallel. This reduces the overall ESR
and reduces the instantaneous output voltage drop under
transient load conditions. The output capacitor network
should be as close to the load as possible for the best results.
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5
CS5201–1
Protection Diodes
Calculating Power Dissipation and Heat Sink
Requirements
When large external capacitors are used with a linear
regulator it is sometimes necessary to add protection diodes.
If the input voltage of the regulator gets shorted, the output
capacitor will discharge into the output of the regulator. The
discharge current depends on the value of the capacitor, the
output voltage and the rate at which VIN drops. In the
CS5201–1 linear regulator, the discharge path is through a
large junction and protection diodes are not usually needed.
If the regulator is used with large values of output
capacitance and the input voltage is instantaneously shorted
to ground, damage can occur. In this case, a diode connected
as shown in Figure 13 is recommended.
The CS5201–1 linear regulator includes thermal
shutdown and current limit circuitry to protect the device.
High power regulators such as these usually operate at high
junction temperatures so it is important to calculate the
power dissipation and junction temperatures accurately to
ensure that an adequate heat sink is used.
The case is connected to VOUT on the CS5201–1,
electrical isolation may be required for some applications.
Thermal compound should always be used with high current
regulators such as these.
The thermal characteristics of an IC depend on the
following four factors:
1.
2.
3.
4.
IN4002 (Optional)
VIN
VOUT
VOUT
VIN
CS5201–1
C1
C2
Adj
These four are related by the equation
R1
TJ TA PD RJA
R2
CAdj
Output Voltage Sensing
PD(max) {VIN(max) VOUT(min)}IOUT(max) VIN(max)IQ
Since the CS5201–1 is a three terminal regulator, it is not
possible to provide true remote load sensing. Load
regulation is limited by the resistance of the conductors
connecting the regulator to the load.
For the adjustable regulator, the best load regulation
occurs when R1 is connected directly to the output pin of the
regulator as shown in Figure 14. If R1 is connected to the
load, RC is multiplied by the divider ratio and the effective
resistance between the regulator and the load becomes.
(2)
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current, for the
application
IQ is the maximum quiescent current at IOUT(max).
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment has a thermal resistance. Like series
electrical resistances, these resistances are summed to
determine RΘJA, the total thermal resistance between the
junction and the surrounding air.
1. Thermal Resistance of the junction to case, RΘJC
(°C/W)
2. Thermal Resistance of the case to Heat Sink, RΘCS
(°C/W)
3. Thermal Resistance of the Heat Sink to the ambient
air, RΘSA (°C/W)
These are connected by the equation:
RC R1 R2
R1
where RC = conductor parasitic resistance.
VIN
RC
VOUT
Conductor Parasitic
Resistance
CS5201–1
R1
Adj
(1)
The maximum ambient temperature and the power
dissipation are determined by the design while the
maximum junction temperature and the thermal resistance
depend on the manufacturer and the package type.
The maximum power dissipation for a regulator is:
Figure 13. Protection Diode for Large Output
Capacitors
VIN
Maximum Ambient Temperature TA (°C)
Power dissipation PD (Watts)
Maximum junction temperature TJ (°C)
Thermal resistance junction to ambient RΘJA (°C/W)
RLOAD
R2
RJA RJC RCS RSA
Figure 14. Grounding Scheme for Adjustable Output
Regulator to Minimize Parasitic Resistance Effects
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6
(3)
CS5201–1
thermal grease used?), and the contact area between the heat
sink and the package. Once these calculations are complete,
the maximum permissible value of RΘJA can be calculated
and the proper heat sink selected. For further discussion on
heat sink selection, see application note “Thermal
Management for Linear Regulators,” document number
SR006AN/D, available through the Literature Distribution
Center or via our website at http://onsemi.com.
The value for RΘJA is calculated using equation (3) and
the result can be substituted in equation (1).
The value for RΘJC is 3.5°C/W for a given package type
based on an average die size. For a high current regulator
such as the CS5201–1 the majority of the heat is generated
in the power transistor section. The value for RΘSA depends
on the heat sink type, while RΘCS depends on factors such
as package type, heat sink interface (is an insulator and
ADDITIONAL ORDERING INFORMATION
Orderable Part
Number
Type
Description
CS5201–1GT3
1.0 A, Adj. Output
TO–220 THREE LEAD, STRAIGHT
CS5201–1GDP3
1.0 A, Adj. Output
D2PAK 3–PIN
CS5201–1GDPR3
1.0 A, Adj. Output
D2PAK 3–PIN (Tape & Reel)
CS5201–1GST3
1.0 A, Adj. Output
SOT–223
CS5201–1GSTR3
1.0 A, Adj. Output
SOT–223 (Tape & Reel)
MARKING DIAGRAMS
D2PAK
3–PIN
DP SUFFIX
CASE 418E
TO–220
THREE LEAD
T SUFFIX
CASE 221A
SOT–223
ST SUFFIX
CASE 318E
AYW
52011
CS5201–1
AWLYWW
CS5201–1
AWLYWW
1
1
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
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7
CS5201–1
PACKAGE DIMENSIONS
TO–220
THREE LEAD
T SUFFIX
CASE 221A–09
ISSUE AA
SEATING
PLANE
–T–
B
C
F
T
S
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
1 2 3
U
H
K
Z
L
R
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
J
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
----0.080
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
----2.04
D2PAK
3–PIN
DP SUFFIX
CASE 418E–01
ISSUE O
–T– SEATING
PLANE
B
M
C
E
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
A
1
2
3
K
F
H
G
D
0.13 (0.005)
M
3 PL
T B
J
L
M
N
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INCHES
MIN
MAX
0.326
0.336
0.396
0.406
0.170
0.180
0.026
0.036
0.045
0.055
0.090
0.110
0.100 BSC
0.098
0.108
0.018
0.025
0.204
0.214
0.045
0.055
0.055
0.066
0.000
0.004
MILLIMETERS
MIN
MAX
8.28
8.53
10.05
10.31
4.31
4.57
0.66
0.91
1.14
1.40
2.29
2.79
2.54 BSC
2.49
2.74
0.46
0.64
5.18
5.44
1.14
1.40
1.40
1.68
0.00
0.10
CS5201–1
SOT–223
ST SUFFIX
CASE 318E–04
ISSUE K
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
S
1
2
3
INCHES
DIM MIN
MAX
A
0.249
0.263
B
0.130
0.145
C
0.060
0.068
D
0.024
0.035
F
0.115
0.126
G
0.087
0.094
H 0.0008 0.0040
J
0.009
0.014
K
0.060
0.078
L
0.033
0.041
M
0
10 S
0.264
0.287
B
D
L
G
J
C
0.08 (0003)
M
H
K
PACKAGE THERMAL DATA
Parameter
TO–220
THREE LEAD
D2PAK
3–PIN
SOT–223
Unit
RΘJC
Typical
3.5
3.5
15
°C/W
RΘJA
Typical
50
10–50*
156
°C/W
* Depending on thermal properties of substrate. RΘJA = RΘJC + RΘCA
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9
MILLIMETERS
MIN
MAX
6.30
6.70
3.30
3.70
1.50
1.75
0.60
0.89
2.90
3.20
2.20
2.40
0.020
0.100
0.24
0.35
1.50
2.00
0.85
1.05
0
10 6.70
7.30
CS5201–1
Notes
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CS5201–1
Notes
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CS5201–1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without
further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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