ETC HCS12XDFAMILYPP

MOTOROLA
Freescale Semiconductor, Inc.
MC9S12XD-FamilyPP
Rev 2.3, 9-Jun-04
SEMICONDUCTOR
TECHNICAL DATA
MC9S12XD-Family
Product Brief
NeXt Generation 16-Bit Microcontroller Family
Targeted at automotive multiplexing applications, the MC9S12X MCU family will deliver 32-bit
performance with all the advantages and efficiencies of a 16 bit MCU. The design goal is to retain the
low cost, power consumption, EMC and code-size efficiency advantages currently enjoyed by users of
Motorola's existing 16-Bit MC9S12 MCU family.
Freescale Semiconductor, Inc...
Based around an enhanced S12 core, the MC9S12XD-Family will deliver 2 to 5 times the performance
of a 25MHz S12 whilst retaining a high degree of pin and code compatibility with the S12.
The MC9S12XD-Family introduces the performance boosting XGATE module. Using enhanced DMA
functionality, this parallel processing module offloads the CPU by providing high speed data processing
and transfer between peripheral modules, RAM and I/O ports. Providing up to 80MIPS of performance
additional to the CPU, the XGATE can handle 64 channels and is fully user programmable.
The MC9S12XD-Family will feature the enhanced MXCAN module which, when used in conjunction
with XGATE, delivers FULL CAN performance with virtually unlimited number of mailboxes and retains
backwards compatibility with the MSCAN module featured on existing S12 products.
Memory options will initially range from 128K to 1MByte of Motorola's industry-leading, full automotive
spec SG-Flash with additional integrated EEPROM. In addition to the rich S12 peripheral set, the
MC9S12XD-Family will feature more RAM, extra A/D channels, new timer features and additional
LIN-compatible SCI ports compared with the S12 D-Family. The MC9S12XD-Family also features a
new flexible interrupt handler which allows multilevel nested interrupts.
The MC9S12XD-Family has full 16-bit data paths throughout. The non-multiplexed expanded bus
interface available on the 144-Pin versions allows an easy interface to external memories. The inclusion
of a PLL circuit allows power consumption and performance to be adjusted to suit operational
requirements. System power consumption is further improved with the new “fast exit from STOP mode”
feature and an ultra low power wake-up timer.
In addition to the I/O ports available in each module, up to 25 further I/O ports are available with interrupt
capability allowing Wake-Up from STOP or WAIT mode.
The MC9S12XD-Family will be available in 144-Pin LQFP (with optional external bus), 112-Pin or
80-Pin options.
Feature Detail
• 16-Bit CPU (Enhanced S12 Core – CPU12)
— Additional (superset) instructions to improve 32 bit calculations and semaphore handling
— Now possible to access large data segments independent of PPAGE
• New XGATE Module
— Programmable, high performance DMA module – up to 80 MIPS RISC performance
— Transfers data to or from all peripherals and RAM without CPU intervention or CPU wait states
— Can perform simple operations on data (logical, shifts, arithmetic, bit operations)
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Freescale Semiconductor, Inc.
—
—
—
—
Enables Full CAN capability when used in conjunction with MXCAN module
Full LIN master or slave capability when used in conjunction with the six integrated LIN SCI modules
Can interrupt the HCS12X CPU signalling transfer completion
Triggers from any hardware module as well as from the CPU possible
Freescale Semiconductor, Inc...
• Non-Multiplexed External Bus
— 22 address/16 data wide
— Support for external WAIT input or internal wait cycles to adapt MCU speed to peripheral speed requirements
— Upto three chip select outputs to select 16K, 2M and 4MByte address spaces
— Supports glueless interface to popular asynchronous RAMs and Flash devices
— External address space 4MByte for Data and Program space (144 pin package only)
• System Integration Modules – including Enhanced Interrupt Controller
— CRG (windowed COP watchdog, real time interrupt, clock monitor, clock generation and reset)
— EBI (non-multiplexed external bus interface)
— INT (interrupt control) with 8 levels of nested interrupt, new flexible assignment of interrupt sources to
each interrupt level.
• Five MXCAN Modules with FULL CAN capability when used in conjunction with XGATE
— CAN 2.0 A, B software compatible. Five receive and three transmit buffers
— Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit
— Four separate interrupt channels for Receive, Transmit, Error and Wake-up
— Low-pass filter wake-up function in STOP mode
— Loop-back for self test operation
NUMBER OF CANS
The number of CAN Modules (four or five) is under discussion. In case of four CAN
modules all references to CAN3 should be ignored
• Memory options
— 128K, 256K, 512K and 1M Byte Flash EEPROM
— 2K or 4K Byte EEPROM
— 12K, 16K, 20K, 32K Byte RAM
• Real Time Interrupt
— Timed interrupt for task scheduling purposes or cyclic wake-up from low power modes
• Enhanced Capture Timer
— Featuring improved divide by 1 … 256 pre-scaler allowing greater resolution (e.g. down to 1 usec)
— 16-bit main counter with 8-bit prescaler
— 8 programmable input capture or output compare channels; 4 of the 8 input captures with buffer
— Input capture filters and buffers, three successive captures on four channels, or two captures on four
channels with a capture/compare selectable on the remaining four
— Four 8-bit or two 16-bit pulse accumulators
— 16-bit modulus down-counter with 8-bit prescaler
— Enhanced delay counter configurations for signal filtering
• Periodic Interrupt Timer
— four 16-bit counter internal counters
• Two independent 8-bit prescalers allowing flexible timebase settings
— Especially suited for operating system time ticks and accuract software timeouts
• Analog-to-Digital Converters
— One 8-channel and one 16 channel module with 10-bit resolution
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— External as well as internal conversion trigger capability
• 8 PWM channels with programmable period and duty cycle (7 channels on 80 Pin Packages)
— 8-bit, 8-channel or 16-bit, 4-channel
— Separate control for each pulse width and duty cycle
— Center- or left-aligned outputs
— Programmable clock select logic with a wide range of frequencies
Freescale Semiconductor, Inc...
• Serial interfaces
— Up to six asynchronous serial communications interfaces (SCI) supporting LIN Master applications
— Three synchronous serial peripheral interfaces (SPI)
— Two IIC supporting 400kbps clock rates
• Clock generation
— Phase-locked loop clock frequency multiplier
— Self clock mode in absence of external clock
— Clock Monitor
— Low power Pierce oscillator utilizing a 0.5 to 16 MHz crystal
— or full drive Pierce 0.5MHz - 40MHz crystal oscillator reference clock
• Wake-up interrupt inputs depending on the package option
— 8-bit port H shared with SPI1, SPI2 or SCI4 and SCI5
— 2-bit port J1:0 shared with SCI2
— 1-bit Port J2 shared with chip select output
— 2-bit port J5:4 shared with IIC1 or two chip select outputs
— 2-bit port J7:6 shared with IIC0
— 8-bit port P shared with PWM or SPI1 or SPI2
• Operating frequency for ambient temperatures Ta -40°C <= Ta <= 125°C
— 80MHz equivalent to 40MHz Bus Speed for single chip mode
• Internal 3.3V-10% - 5V+10% to 2.5V Regulator
• 144-Pin LQFP or 112-Pin LQFP or 80-Pin QFP package
— I/O lines with 5V input and drive capability
— 112 Pin and 80 Pin Packages compatible with popular HCS12D and B-Family members
— 5V A/D converter inputs and 5V I/O
— 2.5V logic supply
• Development support
— Single-wire background debug™ mode (BDM)
— On-chip hardware breakpoints
— On-Chip COF (Change of flow) trace buffer
Table 1 List of MC9S12XD-Family members
Flash RAM EEPROM Package
1M
768K
512K
32K
32K
20K
4K
4K
4K
Device
144LQFP 9S12XDP100
XGATE CAN
yes
5
SCI
SPI
IIC
A/D
PWM
I/O
6
3
2
2/24
8
119
112LQFP 9S12XDP100
yes
5
4
3
1
2/16
8
91
144LQFP 9S12XDP768
yes
5
6
3
2
2/24
8
119
112LQFP 9S12XDP768
yes
5
4
3
1
2/16
8
91
144LQFP 9S12XDP512
yes
5
6
3
2
2/24
8
119
112LQFP 9S12XDP512
yes
5
4
3
1
2/16
8
91
yes
3
2
2
1
1/8
7
59
80QFP
9S12XDT512
MC9S12XD-Family
Information
On This Product,
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Freescale Semiconductor, Inc.
Table 1 List of MC9S12XD-Family members
Flash RAM EEPROM Package
384K
20K
4K
16K
4K
12K
2K
SCI
SPI
IIC
A/D
PWM
I/O
yes
5
6
3
2
2/24
8
119
112LQFP 9S12XDP384
yes
5
4
3
1
2/16
8
91
9S12XDT384
yes
3
2
2
1
1/8
7
59
144LQFP 9S12XDT256
yes
3
3
3
1
2/24
8
119
112LQFP 9S12XDT256
yes
3
4
3
1
2/16
8
91
9S12XDT256
yes
3
2
2
1
1/8
7
59
112LQFP 9S12XDG128
yes
2
3
3
1
2/16
8
91
yes
2
2
2
1
1/8
7
59
80QFP
128K
XGATE CAN
144LQFP 9S12XDP384
80QFP
256K
Device
80QFP
9S12XDG128
Freescale Semiconductor, Inc...
• Pin out explanations:
— A/D is the number of modules/total number of A/D channels.
— I/O is the sum of ports capable to act as digital input or output.
144 Pin Packages:
Port A = 8, B = 8, C=8, D=8, E = 6 + 2 input only, H = 8, J = 7, K = 8, M = 8, P = 8, S = 8, T = 8, PAD = 24
25 inputs provide Interrupt capability (H =8, P= 8, J = 7, IRQ, XIRQ)
112 Pin Packages:
Port A = 8, B = 8, E = 6 + 2 input only, H = 8, J = 4, K = 7, M = 8, P = 8, S = 8, T = 8, PAD = 16
22 inputs provide Interrupt capability (H =8, P= 8, J = 4, IRQ, XIRQ)
80 Pin Packages:
Port A = 8, B = 8, E = 6 + 2 input only, J = 2, M = 6, P = 7, S = 4, T = 8, PAD = 8
11 inputs provide Interrupt capability (P= 7, J = 2, IRQ, XIRQ)
—
—
—
—
—
—
—
—
—
—
—
—
CAN0 can be routed under software control from PM1:0 to pins PM3:2 or PM5:4 or PJ7:6.
CAN4 pins are shared between IIC0 pins.
CAN4 can be routed under software control from PJ7:6 to pins PM5:4 or PM7:6.
Versions with 5 CAN modules will have CAN0, CAN1, CAN2, CAN3 and CAN4
Versions with 4 CAN modules will have CAN0, CAN1, CAN2 and CAN4.
Versions with 3 CAN modules will have CAN0, CAN1 and CAN4.
Versions with 2 SPI modules will have SPI0 and SPI1.
Versions with 3 SCI modules will have SCI0, SCI1 and SCI2.
Versions with 4 SCI modules will have SCI0, SCI1, SCI2 and SCI4.
Versions with 1 IIC module will have IIC0.
SPI0 can be routed to either Ports PS7:4 or PM5:2.
SPI1 pins are shared with PWM3:0; In 144 and 112 pin versions SPI1 can be routed under software
control to PH3:0.
— SPI2 pins are shared with PWM7:4; In 144 and 112 pin versions SPI2 can be routed under software
control to PH7:4. In 80 pin packages SS-signal of SPI2 is not bonded out!
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PTA
DDRA
Timer
4 channel
16 bit with Prescaler
for internal timebases
PTB
DDRB
PTC
DDRC
Non-Multiplexed External Bus Interface (EBI)
SCI3
RXD
TXD
Digital Supply 2.5V
VDD1,2
VSS1,2
CAN0
CAN1
CAN2
CAN3
CAN4
SCI2
PLL Supply 2.5V
VDDPLL
VSSPLL
IIC1
IIC0
Analog Supply 3-5V
VDDA
VSSA
PWM
I/O Supply 3-5V
VDDX1,2,3
VSSX1,2,3
Voltage Regulator 3-5V
PTD
DDRD
VDDR
VSSR
SCI4
SCI5
SPI1
RXD
TXD
RXD
TXD
SPI2
SDA
SCL
SDA
SCL
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
MISO
MOSI
SCK
SS
MISO
MOSI
SCK
SS
KWJ0
KWJ1
KWJ2
KWJ4
KWJ5
KWJ6
KWJ7
KWP0
KWP1
KWP2
KWP3
KWP4
KWP5
KWP6
KWP7
KWH0
KWH1
KWH2
KWH3
KWH4
KWH5
KWH6
KWH7
MC9S12XD-Family
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DDRAD1 & AD1
PTT
DDRT
VRH
VRL
VDDA
VSSA
PAD08
PAD09
PAD10
PAD11
PAD12
PAD13
PAD14
PAD15
PAD16
PAD17
PAD18
PAD19
PAD20
PAD21
PAD22
PAD23
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
PM0
PM1
PM2
PM3
PM4
PM5
PM6
PM7
PJ0
PJ1
PJ2 CS1
PJ4 CS0
PJ5 CS2
PJ6
PJ7
PP0
PP1
PP2
PP3
PP4
PP5
PP6
PP7
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
Signals shown in Bold-Italics are neither available on the 112 Pin nor on the 80 Pin Package Option
Signals shown in Bold are not available on the 80 Pin Package
SPI0
NOACC
ROMCTL/TAGHI
MISO
MOSI
SCK
SS
RXCAN
TXCAN
RXCAN
TXCAN
RXCAN
TXCAN
RXCAN
TXCAN
RXCAN
TXCAN
RXD
TXD
PTS
SCI1
8 Bit PPAGE
Allows 4MByte
Program space
DDRS
SCI0
PTM
Enhanced Capture
Timer
DDRM
XIRQ
IRQ
R/W/WE
LSTRB/LDS
ECLK
MODA/RE
MODB/EWAIT
TAGLO/XCLKS
IQSTAT0
IQSTAT1
IQSTAT2
XGATE
DMA and Queue Module
PTJ
Enhanced Multilevel
Interrupt Module
Periodic Interrupt
COP Watchdog
Clock Monitor
Breakpoints
DDRJ
Clock and
Reset
Generation
Module
CPU12
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
IOC7
RXD
TXD
RXD
TXD
PTP
PTE
PTK
ADDR16
ADDR17
ADDR18
ADDR19
ADDR20
ADDR21
ADDR22
TAGHI
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
UDS ADDR0
DATA15
DATA14
DATA13
DATA12
DATA11
DATA10
DATA9
DATA8
DATA7
DATA6
DATA5
DATA4
DATA3
DATA2
DATA1
DATA0
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PLL
DDRE
XFC
VDDPLL
VSSPLL
EXTAL
XTAL
RESET
TEST
Single-wire Background
Debug Module
DDRK
Freescale Semiconductor, Inc...
BKGD
Voltage Regulator
PAD00
PAD01
PAD02
PAD03
PAD04
PAD05
PAD06
PAD07
DDRP
VDDR
VSSR
VREGEN
VDD1,2
VSS1,2
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
VRH
VRL
VDDA
VSSA
PTH
2K, 4K Byte EEPROM
Module to Port Routing
12K, 16K, 20K, 32K Byte RAM
ATD1
DDRH
VRH
VRL
VDDA
VSSA
ATD0
DDRAD0 & AD0
128K, 256K, 384K, 512K, 768K,1MBFlash
MOTOROLA
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
MC9S12XD-Family
144 LQFP
Pins shown in BOLD-ITALICS neither available on the 112 LQFP
nor on the 80 QFP Package Option
Pins shown in BOLD are not available on the 80 QFP package
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
VRH
VDDA
PAD17/AN17
PAD16/AN16
PAD15/AN15/ETRIG1
PAD07/AN07/ETRIG0
PAD14/AN14
PAD06/AN06
PAD13/AN13
PAD05/AN05
PAD12/AN12
PAD04/AN04
PAD11/AN11
PAD03/AN03
PAD10/AN10
PAD02/AN02
PAD09/AN09
PAD01/AN01
PAD08/AN08
PAD00/AN00
VSS2
VDD2
PD7/DATA7
PD6/DATA6
PD5/DATA5
PD4/DATA4
VDDX3
VSSX3
PA7/ADDR15
PA6/ADDR14
PA5/ADDR13
PA4/ADDR12
PA3/ADDR11
PA2/ADDR10
PA1/ADDR9
PA0/ADDR8
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
SS1/PWM3/KWP3/PP3
SCK1/PWM2/KWP2/PP2
MOSI1/PWM1/KWP1/PP1
MISO1/PWM0/KWP0/PP0
CS1/KWJ2/PJ2
NOACC/ADDR22/PK6
ADDR19/PK3
IQSTAT2/ADDR18/PK2
IQSTAT1/ADDR17/PK1
IQSTAT0/ADDR16/PK0
IOC0/PT0
IOC1/PT1
IOC2/PT2
IOC3/PT3
VDD1
VSS1
IOC4/PT4
IOC5/PT5
IOC6/PT6
IOC7/PT7
ADDR21/PK5
ADDR20/PK4
TXD2/KWJ1/PJ1
RXD2/KWJ0/PJ0
MODC/BKGD
VDDX2
VSSX2
DATA8/PC0
DATA9/PC1
DATA10/PC2
DATA11/PC3
UDS/ADDR0/PB0
ADDR1/PB1
ADDR2/PB2
ADDR3/PB3
ADDR4/PB4
ADDR5/PB5
ADDR6/PB6
ADDR7/PB7
DATA12/PC4
DATA13/PC5
DATA14/PC6
DATA15/PC7
TXD5/SS2/KWH7/PH7
RXD5/SCK2/KWH6/PH6
TXD4/MOSI2/KWH5/PH5
RXD4/MISO2/KWH4/PH4
XCLKS/TAGLO/PE7
WAIT/MODB/PE6
RE/MODA/PE5
ECLK/PE4
VSSR
VDDR
RESET
VDDPLL
XFC
VSSPLL
EXTAL
XTAL
TEST
SS1/KWH3/PH3
SCK1/KWH2/PH2
MOSI1/KWH1/PH1
MISO1/KWH0/PH0
PD0/DATA0
PD1/DATA1
PD2/DATA2
PD3/DATA3
LDS/LSTRB/PE3
WE/R/W/PE2
IRQ/PE1
XIRQ/PE0
Freescale Semiconductor, Inc...
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
PP4/KWP4/PWM4/MISO2
PP5/KPW5/PWM5/MOSI2
PP6/KWP6/PWM6/SS2
PP7/KWP7/PWM7/SCK2
PK7/ROMCTL/TAGHI
VDDX1
VSSX1
PM0/RXCAN0
PM1/TXCAN0
PM2/RXCAN1/RXCAN0/MISO0
PM3/TXCAN1/TXCAN0/SS0
PM4/RXCAN2/RXCAN0/RXCAN4/MOSI0
PM5/TXCAN2/TXCAN0/TXCAN4/SCK0
PJ4/KWJ4/SDA1/CS0
PJ5/KWJ5/SCL1/CS2
PJ6/KWJ6/RXCAN4/SDA0
PJ7/KWJ7/TXCAN4/SCL0
VREGEN
PS7/SS0
PS6/SCK0
PS5/MOSI0
PS4/MISO0
PS3/TXD1
PS2/RXD1
PS1/TXD0
PS0/RXD0
PM6/RXCAN3/RXCAN4/RXD3
PM7/TXCAN3/TXCAN4/TXD3
PAD23/AN23
PAD22/AN22
PAD21/AN21
PAD20/AN20
PAD19/AN19
PAD18/AN18
VSSA
VRL
Freescale Semiconductor, Inc.
Figure 1 MC9S12XD-Family Pin assignments 144 LQFP Package
NOTE: Pin Out is subject to change!
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112
111
110
109
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
MC9S12XD-Family
112LQFP
Pins shown in BOLD are not available on the 80 QFP package
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
SS1/PWM3/KWP3/PP3
SCK1/PWM2/KWP2/PP2
MOSI1/PWM1/KWP1/PP1
MISO1/PWM0/KWP0/PP0
PK3
PK2
PK1
PK0
IOC0/PT0
IOC1/PT1
IOC2/PT2
IOC3/PT3
VDD1
VSS1
IOC4/PT4
IOC5/PT5
IOC6/PT6
IOC7/PT7
PK5
PK4
TXD2/KWJ1/PJ1
RXD2/KWJ0/PJ0
MODC/BKGD
PB0
PB1
PB2
PB3
PB4
VRH
VDDA
PAD15/AN15/ETRIG1
PAD07/AN07/ETRIG0
PAD14/AN14
PAD06/AN06
PAD13/AN13
PAD05/AN05
PAD12/AN12
PAD04/AN04
PAD11/AN11
PAD03/AN03
PAD10/AN10
PAD02/AN02
PAD09/AN09
PAD01/AN01
PAD08/AN08
PAD00/AN00
VSS2
VDD2
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB5
PB6
PB7
TXD5/SS2/KWH7/PH7
RXD5/SCK2/KWH6/PH6
TXD4/MOSI2/KWH5/PH5
RXD4/MISO2/KWH4/PH4
XCLKS/PE7
MODB/PE6
MODA/PE5
ECLK/PE4
VSSR
VDDR
RESET
VDDPLL
XFC
VSSPLL
EXTAL
XTAL
TEST
SS1/KWH3/PH3
SCK1/KWH2/PH2
MOSI1/KWH1/PH1
MISO1/KWH0/PH0
PE3
PE2
IRQ/PE1
XIRQ/PE0
Freescale Semiconductor, Inc...
PP4/KWP4/PWM4/MISO2
PP5/KPW5/PWM5/MOSI2
PP6/KWP6/PWM6/SS2
PP7/KWP7/PWM7/SCK2
PK7/ROMCTL
VDDX
VSSX
PM0/RXCAN0
PM1/TXCAN0
PM2/RXCAN1/RXCAN0/MISO0
PM3/TXCAN1/TXCAN0/SS0
PM4/RXCAN2/RXCAN0/RXCAN4/MOSI0
PM5/TXCAN2/TXCAN0/TXCAN4/SCK0
PJ6/KWJ6/RXCAN4/SDA0
PJ7/KWJ7/TXCAN4/SCL0
VREGEN
PS7/SS0
PS6/SCK0
PS5/MOSI0
PS4/MISO0
PS3/TXD1
PS2/RXD1
PS1/TXD0
PS0/RXD0
PM6/RXCAN3/RXCAN4/RXD3
PM7/TXCAN3/TXCAN4/TXD3
VSSA
VRL
Freescale Semiconductor, Inc.
Figure 2 MC9S12XD-Family Pin assignments 112 LQFP Package
NOTE: Pin Out is subject to change!
MC9S12XD-Family
Information
On This Product,
PRODUCT BRIEF - SUBJECTFor
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CHANGE,
Rev 2.3, 9-Jun-04
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MOTOROLA
7
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MC9S12XD-Family
80 QFP
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
VRH
VDDA
PAD07/AN07/ETRIG0
PAD06/AN06
PAD05/AN05
PAD04/AN04
PAD03/AN03
PAD02/AN02
PAD01/AN01
PAD00/AN00
VSS2
VDD2
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
SS1/PWM3/KWP3/PP3
SCK1/PWM2/KWP2/PP2
MOSI1/PWM1/KWP1/PP1
MISO1/PWM0/KWP0/PP0
IOC0/PT0
IOC1/PT1
IOC2/PT2
IOC3/PT3
VDD1
VSS1
IOC4/PT4
IOC5/PT5
IOC6/PT6
IOC7/PT7
MODC/BKGD
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
XCLKS/PE7
MODB/PE6
MODA/PE5
ECLK/PE4
VSSR
VDDR
RESET
VDDPLL
XFC
VSSPLL
EXTAL
XTAL
TEST
PE3
PE2
IRQ/PE1
XIRQ/PE0
Freescale Semiconductor, Inc...
PP4/KWP4/PWM4/MISO2
PP5/KWP5/PWM5/MOSI2
PP7/KWP7/PWM7/SCK2
VDDX
VSSX
PM0/RXCAN0/RXB
PM1/TXCAN0/TXB
PM2/RXCAN1/RXCAN0/MISO0
PM3/TXCAN1/TXCAN0/SS0
PM4/RXCAN2/RXCAN0/RXCAN4/MOSI0
PM5/TXCAN2/TXCAN0/TXCAN4/SCK0
PJ6/KWJ6/RXCAN4/SDA0
PJ7/KWJ7/TXCAN4/SCL0
VREGEN
PS3/TXD1
PS2/RXD1
PS1/TXD0
PS0/RXD0
VSSA
VRL
Freescale Semiconductor, Inc.
Figure 3 MC9S12XD-Family Pin assignments 80 QFP Package
NOTE: Pin Out is subject to change!
MOTOROLA
8
MC9S12XD-Family
For More PRODUCT
Information
On -This
Product,
BRIEF
SUBJECT
TO CHANGE, Rev 2.3, 9-Jun-04
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Freescale Semiconductor, Inc.
$0000
$0000
$0800
$0C00
$07FF
$1000
$0FFF
$2000
$1000
$0000
2K Register Space
4K Bytes EEPROM
four * 1K pages accessible through $0800 - $0BFF
32K Bytes RAM
eight * 4K pages accessible through $1000 - $1FFF
$3FFF
$4000
$4000
1K, 2K, 4K or 8K Protected Sector
12K Fixed Flash EEPROM
Freescale Semiconductor, Inc...
$7000
$7FFF
$8000
$8000
EXT
16K Page Window
sixtyfour* 16K Flash EEPROM Pages
$BFFF
$C000
$C000
16K Fixed Flash EEPROM
$FFFF
2K, 4K, 8K or 16K Protected Boot Sector
$FF00
$FF00
$FFFF
VECTORS
VECTORS
VECTORS
NORMAL
SINGLE CHIP
EXPANDED
SPECIAL
SINGLE CHIP
$FFFF
BDM
(If Active)
Figure 4 MC9S12XDx100 Memory Map
MC9S12XD-Family
Information
On This Product,
PRODUCT BRIEF - SUBJECTFor
TO More
CHANGE,
Rev 2.3, 9-Jun-04
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MOTOROLA
9
Freescale Semiconductor, Inc.
$0000
$0000
$0800
$0C00
$07FF
$1000
$0FFF
$2000
$1000
$0000
2K Register Space
4K Bytes EEPROM
four * 1K pages accessible through $0800 - $0BFF
20K Bytes RAM
five * 4K pages accessible through $1000 - $1FFF
$3FFF
$4000
$4000
1K, 2K, 4K or 8K Protected Sector
12K Fixed Flash EEPROM
Freescale Semiconductor, Inc...
$7000
$7FFF
$8000
$8000
EXT
16K Page Window
thirtytwo * 16K Flash EEPROM Pages
$BFFF
$C000
$C000
16K Fixed Flash EEPROM
$FFFF
2K, 4K, 8K or 16K Protected Boot Sector
$FF00
$FF00
$FFFF
VECTORS
VECTORS
VECTORS
NORMAL
SINGLE CHIP
EXPANDED
SPECIAL
SINGLE CHIP
$FFFF
BDM
(If Active)
Figure 5 MC9S12XDx512 Memory Map
MOTOROLA
10
MC9S12XD-Family
For More PRODUCT
Information
On -This
Product,
BRIEF
SUBJECT
TO CHANGE, Rev 2.3, 9-Jun-04
Go to: www.freescale.com
Freescale Semiconductor, Inc.
$0000
$0000
$0800
$0C00
$07FF
$1000
$0FFF
$2000
$1000
$0000
2K Register Space
4K Bytes EEPROM
four * 1K pages accessible through $0800 - $0BFF
16K Bytes RAM
four * 4K pages accessible through $1000 - $1FFF
$3FFF
$4000
$4000
1K, 2K, 4K or 8K Protected Sector
12K Fixed Flash EEPROM
Freescale Semiconductor, Inc...
$7000
$7FFF
$8000
$8000
EXT
16K Page Window
sixteen * 16K Flash EEPROM Pages
$BFFF
$C000
$C000
16K Fixed Flash EEPROM
$FFFF
2K, 4K, 8K or 16K Protected Boot Sector
$FF00
$FF00
$FFFF
VECTORS
VECTORS
VECTORS
NORMAL
SINGLE CHIP
EXPANDED
SPECIAL
SINGLE CHIP
$FFFF
BDM
(If Active)
Figure 6 MC9S12XDx256 Memory Map
MC9S12XD-Family
Information
On This Product,
PRODUCT BRIEF - SUBJECTFor
TO More
CHANGE,
Rev 2.3, 9-Jun-04
Go to: www.freescale.com
MOTOROLA
11
Freescale Semiconductor, Inc.
$0000
$0000
$0800
$07FF
$1000
$0FFF
$0000
$1000
2K Register Space
2K Bytes EEPROM
two * 1K pages accessible through $0800 - $0BFF
12K Bytes RAM
$3FFF
$4000
$4000
1K, 2K, 4K or 8K Protected Sector
12K Fixed Flash EEPROM
Freescale Semiconductor, Inc...
$7000
$7FFF
$8000
$8000
EXT
16K Page Window
sixteen * 16K Flash EEPROM Pages
$BFFF
$C000
$C000
16K Fixed Flash EEPROM
$FFFF
2K, 4K, 8K or 16K Protected Boot Sector
$FF00
$FF00
$FFFF
VECTORS
VECTORS
VECTORS
NORMAL
SINGLE CHIP
EXPANDED
SPECIAL
SINGLE CHIP
$FFFF
BDM
(If Active)
Figure 7 MC9S12XDx128 Memory Map
MOTOROLA
12
MC9S12XD-Family
For More PRODUCT
Information
On -This
Product,
BRIEF
SUBJECT
TO CHANGE, Rev 2.3, 9-Jun-04
Go to: www.freescale.com
Freescale Semiconductor, Inc.
0.20 T L-M N
4X
PIN 1
IDENT
0.20 T L-M N
4X 36 TIPS
144
109
1
108
4X
J1
P
J1
L
M
CL
B
V
X
140X
B1
Freescale Semiconductor, Inc...
VIEW Y
36
VIEW Y
V1
73
37
NOTES:
1. DIMENSIONS AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS.
3. DATUMS L, M, N TO BE DETERMINED AT THE
SEATING PLANE, DATUM T.
4. DIMENSIONS S AND V TO BE DETERMINED
AT SEATING PLANE, DATUM T.
5. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE
PROTRUSION IS 0.25 PER SIDE. DIMENSIONS
A AND B DO INCLUDE MOLD MISMATCH
AND ARE DETERMINED AT DATUM PLANE H.
6. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL NOT CAUSE THE D
DIMENSION TO EXCEED 0.35.
72
N
A1
S1
A
S
VIEW AB
C
0.1 T
θ2
144X
SEATING
PLANE
θ2
T
PLATING
J
AA
F
C2
0.05
R2
θ
R1
0.08
M
0.25
BASE
METAL
D
GAGE PLANE
T L-M N
SECTION J1-J1
(ROTATED 90 ° )
144 PL
(K)
C1
E
(Y)
VIEW AB
G
MILLIMETERS
DIM MIN MAX
A
20.00 BSC
A1
10.00 BSC
B
20.00 BSC
B1
10.00 BSC
C
1.40
1.60
C1
0.05
0.15
C2
1.35
1.45
D
0.17
0.27
E
0.45
0.75
F
0.17
0.23
G
0.50 BSC
J
0.09
0.20
K
0.50 REF
P
0.25 BSC
R1
0.13
0.20
R2
0.13
0.20
S
22.00 BSC
S1
11.00 BSC
V
22.00 BSC
V1
11.00 BSC
Y
0.25 REF
Z
1.00 REF
AA
0.09
0.16
θ
0°
θ1
0°
7°
θ2
11°
13 °
θ1
(Z)
Figure 8 144-pin LQFP Mechanical Dimensions (case no. 918-03)
MC9S12XD-Family
Information
On This Product,
PRODUCT BRIEF - SUBJECTFor
TO More
CHANGE,
Rev 2.3, 9-Jun-04
Go to: www.freescale.com
MOTOROLA
13
Freescale Semiconductor, Inc.
0.20 T L-M N
4X
PIN 1
DENT
0.20 T L-M N
4X 28 TIPS
112
J1
85
4X
P
J1
1
CL
84
VIEW Y
108X
X
X=L, M OR N
G
VIEW Y
B
L
M
B1
Freescale Semiconductor, Inc...
V
28
AA
J
V1
57
29
F
D
56
0.13
N
M
T
BASE
METAL
L-M N
SECTION J1-J1
ROTATED 90 ° COUNTERCLOCKWISE
A1
S1
A
S
C2
C
VIEW AB
θ2
0.050
0.10 T
112X
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS.
3. DATUMS L, M AND N TO BE DETERMINED AT
SEATING PLANE, DATUM T.
4. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE, DATUM T.
5. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE
PROTRUSION IS 0.25 PER SIDE. DIMENSIONS
A AND B INCLUDE MOLD MISMATCH.
6. DIMENSION D DOES NOT INCLUDE DAMBAR
θ3
T
θ
R
R2
R
0.25
R1
GAGE PLANE
(K)
C1
E
(Y)
(Z)
VIEW AB
θ1
DIM
A
A1
B
B1
C
C1
C2
D
E
F
G
J
K
P
R1
R2
S
S1
V
V1
Y
Z
AA
θ
θ1
θ2
θ3
MILLIMETERS
MIN
MAX
20.000 BSC
10.000 BSC
20.000 BSC
10.000 BSC
--1.600
0.050
0.150
1.350
1.450
0.270
0.370
0.450
0.750
0.270
0.330
0.650 BSC
0.090
0.170
0.500 REF
0.325 BSC
0.100
0.200
0.100
0.200
22.000 BSC
11.000 BSC
22.000 BSC
11.000 BSC
0.250 REF
1.000 REF
0.090
0.160
8 °
0°
7 °
3 °
13
°
11 °
11 °
13 °
Figure 9 112-pin LQFP Mechanical Dimensions (case no. 987)
MOTOROLA
14
MC9S12XD-Family
For More PRODUCT
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Freescale Semiconductor, Inc.
L
60
41
61
D
S
M
V
P
B
C A-B
D
0.20
M
B
B
-A-,-B-,-D-
0.20
L
H A-B
-B-
0.05 D
-A-
S
S
S
40
DETAIL A
Freescale Semiconductor, Inc...
DETAIL A
21
80
1
0.20
A
H A-B
M
S
F
20
-DD
S
0.05 A-B
J
S
0.20
C A-B
M
S
D
S
D
M
E
DETAIL C
C
-H-
-C-
DATUM
PLANE
0.20
M
C A-B
S
D
S
SECTION B-B
VIEW ROTATED 90 °
0.10
H
SEATING
PLANE
N
M
G
U
T
DATUM
PLANE
-H-
R
K
W
X
DETAIL C
Q
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE
LEAD WHERE THE LEAD EXITS THE PLASTIC
BODY AT THE BOTTOM OF THE PARTING LINE.
4. DATUMS -A-, -B- AND -D- TO BE
DETERMINED AT DATUM PLANE -H-.
5. DIMENSIONS S AND V TO BE DETERMINED
AT SEATING PLANE -C-.
6. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE
PROTRUSION IS 0.25 PER SIDE. DIMENSIONS
A AND B DO INCLUDE MOLD MISMATCH
AND ARE DETERMINED AT DATUM PLANE -H-.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION. DAMBAR CANNOT
BE LOCATED ON THE LOWER RADIUS OR
THE FOOT.
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
P
Q
R
S
T
U
V
W
X
MILLIMETERS
MIN
MAX
13.90
14.10
13.90
14.10
2.15
2.45
0.22
0.38
2.00
2.40
0.22
0.33
0.65 BSC
--0.25
0.13
0.23
0.65
0.95
12.35 REF
5°
10 °
0.13
0.17
0.325 BSC
0°
7°
0.13
0.30
16.95
17.45
0.13
--0°
--16.95
17.45
0.35
0.45
1.6 REF
Figure 10 80-pin QFP Mechanical Dimensions (case no. 841B)
MC9S12XD-Family
Information
On This Product,
PRODUCT BRIEF - SUBJECTFor
TO More
CHANGE,
Rev 2.3, 9-Jun-04
Go to: www.freescale.com
MOTOROLA
15
Freescale Semiconductor, Inc...
Freescale Semiconductor, Inc.
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