HM6207H Series 256 k High Speed SRAM (256-kword × 1-bit) Features • Single 5 V supply and high density 24-pin package • High speed Access time: 25/35/45 ns (max) • Low power Operation: 300 mW (typ) Standby: 100 µW (typ) 30 µW (typ) (L-version) • Completely static memory required, no clock or timing strobe required • Equal access and cycle time • Directly TTL compatible, all inputs and outputs • Battery backup operation capability (L-version) Ordering Information Type No. Access Time Package HM6207HP-25 HM6207HP-35 HM6207HP-45 25 ns 35 ns 45 ns 300-mil 24-pin plastic DIP (DP-24NC) HM6207HLP-25 HM6207HLP-35 HM6207HLP-45 25 ns 35 ns 45 ns HM6207HJP-25 HM6207HJP-35 HM6207HJP-45 25 ns 35 ns 45 ns HM6207HLJP-25 HM6207HLJP-35 HM6207HLJP-45 25 ns 35 ns 45 ns Powered by ICminer.com Electronic-Library Service CopyRight 2003 300-mil 24-pin SOJ (CP-24D) HM6207H Series Pin Arrangement A17 1 24 VCC A0 2 23 A16 A1 3 22 A15 A2 4 21 A14 A3 5 20 A13 A4 6 19 A12 A5 7 18 A11 A6 8 17 A10 A7 9 16 A9 Dout 10 15 A8 WE 11 14 Din VSS 12 13 CS (Top view) Pin Description Pin Name Function A0–AI7 Address Din Data input Dout Data output &6 Chip select :( Write enable VCC Power supply VSS Ground Powered by ICminer.com Electronic-Library Service CopyRight 2003 2 HM6207H Series Block Diagram A15 A16 A17 A0 A1 A2 A3 A4 VCC Memory array 256 × 1024 Row decoder VSS Column I/O Din Dout Column decoder CS WE A9 A14 A13 A12A11 A10 A8 A7 A6 A5 Function Table &6 :( Mode VCC Current I/O Pin Ref. Cycle H × Not selected ISB, ISB1 High-Z — L H Read lCC Dout Read cycle L L Write ICC High-Z Write cycle Note: × = Don’t care. Absolute Maximum Ratings Parameter Symbol Value *1 Unit Voltage on any pin relative to VSS Vin –0.5 to +7.0 V Power dissipation PT 1.0 W Operating temperature range Topr 0 to +70 °C Storage temperature range Tstg –55 to +125 °C Storage temperature range under bias Tbias –10 to +85 °C Note: 1. Vin min = –2.5 V for pulse width < 10 ns. Powered by ICminer.com Electronic-Library Service CopyRight 2003 3 HM6207H Series Recommended DC Operating Conditions (Ta = 0 to +70°C) Parameter Symbol Min Typ Max Unit Supply voltage VCC 4.5 5.0 5.5 V VSS 0 0 0 V VIH 2.2 — 6.0 V — 0.8 V Input high (logic 1) voltage Input low (logic 0) voltage Note: VIL –0.5 *1 1. VIL min = –2.0 V for pulse width ≤ 10 ns. DC Characteristics (Ta = 0 to +70°C, VCC = 5 V ±10%, VSS = 0 V) HM6207H-25 *1 HM6207H-35/45 Max Min Typ *1 Max Unit Test Conditions Parameter Symbol Min Typ Input leakage current ILI — — 2.0 — — 2.0 µA VCC = Max, Vin = VSS to VCC Output leakage current ILO — — 10.0 — — 10.0 µA &6 = VIH, VI/O = VSS to VCC Operating power supply current lCC — 60 120 — 50 100 mA &6 = VIL, II/O = 0 mA, min cycle, duty = 100% ICC1 — 40 80 — 40 80 mA &6 = VIL, lI/O = 0 mA, t cycle = 50 ns, duty = 100% Standby power supply current ISB — 20 40 — 15 30 mA &6 = VIH, min cycle Standby power supply current (1) ISB1 — 0.02 2.0 — 0.02 2.0 mA &6 ≥ VCC – 0.2 V, 0 V ≤ Vin < 0.2, or Vin ≥ VCC – 0.2 V LVersion — 0.006 0.1 — 0.006 0.1 Output low voltage VOL — — 0.4 — — 0.4 V IOL = 8 mA Output high voltage VOH 2.4 — — 2.4 — — V IOH = –4.0 mA Note: 1. Typical values are at VCC = 5.0 V, Ta = +25°C and not guaranteed. Capacitance (Ta = 25°C, f = 1 MHz)*1 Parameter Symbol Min Max Unit Test Conditions Input capacitance Cin — 6 pF Vin = 0 V Output capacitance Cout — 10 pF Vout = 0 V Note: 1. This parameter is sampled and is not 100% tested. Powered by ICminer.com Electronic-Library Service CopyRight 2003 4 HM6207H Series AC Characteristics (Ta = 0 to +70°C, VCC = 5 V ± 10% unless otherwise noted) Test Conditions • Input pulse levels: VSS to 3.0 V • Input and output timing reference levels: 1.5 V • Input rise and fall time: 5 ns • Output load: See figures +5V +5V 480 Ω Dout 255 Ω 480 Ω Dout 255 Ω 30 pF *1 Output load (A) 5 pF *1 Output load (B) (tHZ , tLZ, tWZ, and tOW) Note: 1. Including scope and jig Read Cycle HM6207H-25 HM6207H-35 HM6207H-45 Parameter Symbol Min Max Min Max Min Max Unit Read cycle time tRC 25 — 35 — 45 — ns Address access time tAA — 25 — 35 — 45 ns Chip select access time tACS — 25 — 35 — 45 ns Output hold from address change tOH Chip selection to output in low-Z Chip deselection to output in high-Z Note: 5 — 5 — 5 — ns *1 5 — 5 — 5 — ns *1 0 15 0 20 0 20 ns tLZ tHZ 1. Transition is measured ± 200 mV from steady-state voltage with Load (B). These parameters are sampled and not 100% tested. Powered by ICminer.com Electronic-Library Service CopyRight 2003 5 HM6207H Series Read Timing Waveform (1) tRC Address tAA tOH tOH Valid Data Dout Notes: 1. WE is high for read cycle. 2. Device is continuously selected, CS = VIL. Read Timing Waveform (2) tRC CS tHZ tACS tLZ Dout Valid Data High impedance Notes: 1. WE is high for read cycle. 2. Address valid prior to coincident with CS transition low. Powered by ICminer.com Electronic-Library Service CopyRight 2003 6 High impedance HM6207H Series Write Cycle HM6207H-25 HM6207H-35 HM6207H-45 Parameter Symbol Min Max Min Max Min Max Unit Write cycle time tWC 25 — 35 — 45 — ns Chip selection to end of write tCW 20 — 30 — 40 — ns Address valid to end of write tAW 20 — 30 — 40 — ns Address setup time tAS 0 — 0 — 0 — ns Write pulse width tWP 20 — 25 — 25 — ns Write recovery time tWR 3 — 3 — 3 — ns Data valid to end of write tDW 15 — 20 — 20 — ns Data hold time tDH 0 — 0 — 0 — ns Write enabled to output in high-Z tWZ *1 0 15 0 20 0 25 ns Output active from end of write *1 0 — 0 — 0 — ns Note: tOW 1. Transition is measured ± 200 mV from high-impedance voltage with Load (B). This parameter is sampled and is not 100% tested. Write Timing Waveform (1) (:( Controlled) tWC Address tCW CS tAW tAS tWR tWP WE tDH tDW Din Valid Data tWZ tOW Dout High impedance Powered by ICminer.com Electronic-Library Service CopyRight 2003 7 HM6207H Series Write Timing Waveform (2) (&( Controlled) tWC Address tAS tCW CS tAW tWR tWP WE tDW Din tDH Valid Data tWZ Dout Data undefined High impedance Notes: 1. A write occurs during the overlap of a low CS and a low WE. 2. tWR is measured from the earlier of CS or WE going high to the end of the write cycle. 3. If the CS low transition occurs simultaneously with the WE low transition, the output buffers remain in a high impedance state. 4. Dout has the same phase as write data in this write cycle, if tWR is long enough. Powered by ICminer.com Electronic-Library Service CopyRight 2003 8 HM6207H Series Low VCC Data Retention Characteristics (Ta = 0 to +70°C) These characteristics are guaranteed for the L-version only. Parameter Symbol Min Typ Max Unit Test Conditions VCC for data retention VDR 2.0 — — V &6 ≥ VCC – 0.2 V, Vin ≥ VCC – 0.2 V, or 0 V ≤ Vin ≤ 0.2 V Data retention current ICCDR — 2 50 Chip deselect to data retention time tCDR 0 — — ns Operation recovery time 5 — — ms Note: tR *1 µA 1. VCC = 3.0 V Low VCC Data Retention Timing Waveform Data retention mode VCC 4.5 V tCDR tR 2.2 V VDR CS ≥ VCC – 0.2 V CS 0V Powered by ICminer.com Electronic-Library Service CopyRight 2003 9 HM6207H Series Package Dimensions HM6207HP/HLP Series (DP-24NC) Unit: mm 29.88 30.48 Max 7.40 Max 13 7.10 24 1 12 1.14 1.30 7.62 0.48 ± 0.10 0.51 Min 2.54 ± 0.25 2.54 Min 5.08 Max 1.27 Max + 0.11 0.25 – 0.05 0° – 15° HM6207HJP/HLJP Series (CP-24D) Unit: mm 15.63 16.00 Max 7.62 ± 0.13 0.43 ± 0.10 1.27 0.10 Powered by ICminer.com Electronic-Library Service CopyRight 2003 10 0.80 1.30 Max 0.21 2.40 +– 0.24 12 +0.25 –0.17 0.74 3.50 ± 0.26 1 8.64 ± 0.13 13 24 + 0.35 6.76 – 0.16 HM6207H Series When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi’s permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user’s unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. MEDICAL APPLICATIONS: Hitachi’s products are not authorized for use in MEDICAL APPLICATIONS without the written consent of the appropriate officer of Hitachi’s sales company. Such use includes, but is not limited to, use in life support systems. Buyers of Hitachi’s products are requested to notify the relevant Hitachi sales offices when planning to use the products in MEDICAL APPLICATIONS. Hitachi, Ltd. Semiconductor & IC Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 For further information write to: Hitachi America, Ltd. Semiconductor & IC Div. 2000 Sierra Point Parkway Brisbane, CA. 94005-1835 USA Tel: 415-589-8300 Fax: 415-583-4207 Hitachi Europe GmbH Electronic Components Group Continental Europe Dornacher Straße 3 D-85622 Feldkirchen München Tel: 089-9 91 80-0 Fax: 089-9 29 30 00 Hitachi Europe Ltd. Electronic Components Div. Northern Europe Headquarters Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA United Kingdom Tel: 0628-585000 Fax: 0628-778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 0104 Tel: 535-2100 Fax: 535-1533 Hitachi Asia (Hong Kong) Ltd. Unit 706, North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon Hong Kong Tel: 27359218 Fax: 27306071 Powered by ICminer.com Electronic-Library Service CopyRight 2003 11