IS61LV6416 64K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES • High-speed access time: 8, 10, 12, 15, and 20 ns • CMOS low power operation — 250 mW (typical) operating — 250 µW (typical) standby • TTL compatible interface levels • Single 3.3V power supply • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature available OCTOBER 2000 DESCRIPTION The ISSI IS61LV6416 is a high-speed, 1,048,576-bit static RAM organized as 65,536 words by 16 bits. It is fabricated using ISSI 's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with low power consumption. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory.A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS61LV6416 is packaged in the JEDEC standard 44-pin 400-mil SOJ, 44-pin TSOP, and 48-pin mini BGA (6mm x 8mm). FUNCTIONAL BLOCK DIAGRAM A0-A15 ISSI ® DECODER 64K x 16 MEMORY ARRAY I/O DATA CIRCUIT COLUMN I/O VCC GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte CE OE WE CONTROL CIRCUIT UB LB ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc. Integrated Silicon Solution, Inc. Rev. D 10/20/00 1 ISSI IS61LV6416 PIN CONFIGURATIONS 44-Pin SOJ 44-Pin TSOP A15 1 44 A0 A14 2 43 A1 A13 3 42 A2 A12 4 41 OE A11 5 40 UB CE 6 39 LB I/O0 7 38 I/O15 I/O1 8 37 I/O14 I/O2 9 36 I/O13 I/O3 10 35 I/O12 Vcc 11 34 GND GND 12 33 Vcc I/O4 13 32 I/O11 I/O5 14 31 I/O10 I/O6 15 30 I/O9 I/O7 16 29 I/O8 WE 17 28 NC A10 18 27 A3 A9 19 26 A4 A8 20 25 A5 A7 21 24 A6 NC 22 23 NC A15 A14 A13 A12 A11 CE I/O0 I/O1 I/O2 I/O3 Vcc GND I/O4 I/O5 I/O6 I/O7 WE A10 A9 A8 A7 NC 48-Pin mini BGA (6mm x 8mm) 1 2 2 3 4 ® 5 6 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 A0 A1 A2 OE UB LB I/O15 I/O14 I/O13 I/O12 GND Vcc I/O11 I/O10 I/O9 I/O8 NC A3 A4 A5 A6 NC PIN DESCRIPTIONS A0-A15 Address Inputs I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) A LB OE A0 A1 A2 N/C B I/O8 UB A3 A4 CE I/O0 C I/O9 I/O10 A5 A6 I/O1 I/O2 UB Upper-byte Control (I/O8-I/O15) D GND I/O11 NC A7 I/O3 Vcc NC No Connection E Vcc I/O12 NC NC I/O4 GND Vcc Power F I/O14 I/O13 A14 A15 I/O5 I/O6 GND Ground G I/O15 NC A12 A13 WE I/O7 H NC A8 A9 A10 A11 NC Integrated Silicon Solution, Inc. Rev. D 10/20/00 ISSI IS61LV6416 ® TRUTH TABLE Mode Not Selected Output Disabled Read Write WE CE OE LB UB X H X H H H L L L H L L L L L L L L X H X L L L X X X X X H L H L L H L X X H H L L H L L I/O PIN I/O0-I/O7 I/O8-I/O15 High-Z High-Z High-Z DOUT High-Z DOUT DIN High-Z DIN High-Z High-Z High-Z High-Z DOUT DOUT High-Z DIN DIN 1 Vcc Current ISB1, ISB2 I CC 2 ICC 3 ICC 4 ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TSTG PT IOUT Parameter Terminal Voltage with Respect to GND Storage Temperature Power Dissipation DC Output Current (LOW) Value –0.5 to Vcc+0.5 –65 to +150 1.5 20 Unit V °C W mA 5 6 Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 7 OPERATING RANGE Range Commercial Industrial Ambient Temperature 0°C to +70°C –40°C to +85°C Vcc(8,10ns) 3.3V+10%,-5% 3.3V+10%,-5% 8 VCC (12,15,20NS) 3.3V ± 10% 3.3V ± 10% 9 DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol Parameter Test Conditions VOH Output HIGH Voltage VOL Output LOW Voltage VIH Input HIGH Voltage VIL Input LOW Voltage(1) ILI Input Leakage ILO Output Leakage 10 Min. Max. Unit VCC = Min., IOH = –4.0 mA 2.4 — V VCC = Min., IOL = 8.0 mA — 0.4 V 2 VCC + 0.3 V –0.3 0.8 V GND ≤ VIN ≤ VCC –2 2 µA GND ≤ VOUT ≤ VCC, Outputs Disabled –2 2 µA 11 12 Notes: 1. VIL (min.) = –2.0V for pulse width less than 10 ns. Integrated Silicon Solution, Inc. Rev. D 10/20/00 3 ISSI IS61LV6416 ® POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) -8 ns Min. Max. -10 ns Min. Max. -12 ns Min. Max. -15 ns Min. Max. -20 ns Min. Max. VCC = Max., Com. IOUT = 0 mA, f = fMAX Ind. — 210 — 215 — 190 — 210 — 150 — 170 — 130 — 150 — 120 — 140 mA TTL Standby Current (TTL Inputs) VCC = Max., VIN = VIH or VIL CE ≥ VIH , f = 0 Com. Ind. — — 25 30 — — 25 30 — — 15 25 — — 15 25 — — 15 25 mA CMOS Standby Current (CMOS Inputs) VCC = Max., Com. CE ≥ VCC – 0.2V, Ind. VIN ≥ VCC – 0.2V, or VIN ≤ 0.2V, f = 0 — — 10 15 — — 10 15 — — 10 15 — — 10 15 — — 10 15 mA Symbol Parameter Test Conditions ICC Vcc Dynamic Operating Supply Current ISB1 ISB2 Unit Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. CAPACITANCE(1) Symbol Parameter CIN Input Capacitance COUT Input/Output Capacitance Conditions Max. Unit VIN = 0V 6 pF VOUT = 0V 8 pF Note: 1. Tested initially and after any design or process changes that may affect these parameters. READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter -8 ns Min. Max. -10 ns Min. Max. -12 ns Min. Max. -15 ns Min. Max. -20 ns Min. Max. Unit tRC Read Cycle Time 8 — 10 — 12 — 15 — 20 — ns tAA Address Access Time — 8 — 10 — 12 — 15 — 20 ns tOHA Output Hold Time 3 — 3 — 3 — 3 — 3 — ns tACE CE Access Time — 8 — 10 — 12 — 15 — 20 ns OE Access Time — 5 — 5 — 6 — 7 — 8 ns (2) tHZOE OE to High-Z Output — 5 — 5 — 6 0 6 0 8 ns (2) tLZOE OE to Low-Z Output 0 — 0 — 0 — 0 — 0 — ns tHZCE(2 CE to High-Z Output 0 4 0 5 0 6 0 6 0 8 ns tLZCE CE to Low-Z Output 3 — 3 — 3 — 3 — 3 — ns tBA LB, UB Access Time — 6 — 6 — 6 — 7 — 8 ns tHZB LB, UB to High-Z Output 0 4 0 5 0 6 0 6 0 8 ns tLZB LB, UB to Low-Z Output 0 — 0 — 0 — 0 — 0 — ns tDOE (2) Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3. Not 100% tested. 4 Integrated Silicon Solution, Inc. Rev. D 10/20/00 ISSI IS61LV6416 ® AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load Unit 0V to 3.0V 3 ns 1.5V 1 2 See Figures 1a and 1b 3 4 AC TEST LOADS 5 3.3V 3.3V OUTPUT OUTPUT 30 pF Including jig and scope 6 319 Ω 319 Ω 353 Ω 7 5 pF Including jig and scope 353 Ω 8 9 Figure 1a. Figure 1b. 10 11 12 Integrated Silicon Solution, Inc. Rev. D 10/20/00 5 ISSI IS61LV6416 ® AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CS = OE = VIL, UB or LB = VIL) t RC ADDRESS t AA t OHA t OHA DOUT DATA VALID PREVIOUS DATA VALID READ1.eps READ CYCLE NO. 2(1,3) tRC ADDRESS tAA tOHA OE tHZOE tDOE tLZOE CE tACE tHZCE tBA tHZB tLZCE LB, UB DOUT HIGH-Z tLZB DATA VALID Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE, UB, or LB = VIL. 3. Address is valid prior to or coincident with CE LOW transition. 6 Integrated Silicon Solution, Inc. Rev. D 10/20/00 ISSI IS61LV6416 ® WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range) Symbol Parameter -8 ns Min. Max. -10 ns Min. Max. -12 ns Min. Max. -15 ns Min. Max. -20 ns Min. Max. 1 Unit tWC Write Cycle Time 8 — 10 — 12 — 15 — 20 — ns tSCE CE to Write End 6 — 8 — 9 — 10 — 12 — ns tAW Address Setup Time to Write End 8 — 8 — 9 — 10 — 12 — ns tHA Address Hold from Write End 0 — 0 — 0 — 0 — 0 — ns tSA Address Setup Time 0 — 0 — 0 — 0 — 0 — ns tPWB LB, UB Valid to End of Write 7 — 8 — 9 — 10 — 12 — ns tPWE WE Pulse Width 6 — 8 — 9 — 10 — 12 — ns tSD Data Setup to Write End 6 — 6 — 6 — 7 — 9 — ns tHD Data Hold from Write End 0 — 0 — 0 — 0 — 0 — ns tHZWE(2) WE LOW to High-Z Output — 4 — 5 — 6 — 7 — 9 ns WE HIGH to Low-Z Output 3 — 3 — 3 — 3 — 3 — ns 5 Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. 6 tLZWE (2) 2 3 4 7 8 9 10 11 12 Integrated Silicon Solution, Inc. Rev. D 10/20/00 7 ISSI IS61LV6416 ® AC WAVEFORMS WRITE CYCLE NO. 1 (WE Controlled)(1,2) tWC ADDRESS tHA tSCE CE tPWB LB, UB tAW tPWE WE tSA WRITE(1) tSD tHD DIN tHZWE DOUT HIGH-Z tLZWE UNDEFINED HIGH-Z UNDEFINED Notes: 1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least one of the LB and UB inputs being in the LOW state. 2. WRITE = (CE) [ (LB) = (UB) ] (WE). 8 Integrated Silicon Solution, Inc. Rev. D 10/20/00 ISSI IS61LV6416 ® ORDERING INFORMATION Commercial Range: 0°C to +70°C Speed (ns) Order Part No. Package 8 8 8 IS61LV6416-8B IS61LV6416-8T IS61LV6416-8K mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 10 10 10 IS61LV6416-10B IS61LV6416-10T IS61LV6416-10K mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 12 12 12 IS61LV6416-12B IS61LV6416-12T IS61LV6416-12K mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 15 15 15 IS61LV6416-15B IS61LV6416-15T IS61LV6416-15K mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 20 20 20 IS61LV6416-20B IS61LV6416-20T IS61LV6416-20K mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 1 2 3 4 5 6 7 8 9 10 11 12 Integrated Silicon Solution, Inc. Rev. D 10/20/00 9 ISSI IS61LV6416 ® ORDERING INFORMATION Industrial Range: –40°C to +85°C Speed (ns) Order Part No. Package 8 8 8 IS61LV6416-8BI IS61LV6416-8TI IS61LV6416-8KI mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 10 10 10 IS61LV6416-10BI IS61LV6416-10TI IS61LV6416-10KI mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 12 12 12 IS61LV6416-12BI IS61LV6416-12TI IS61LV6416-12KI mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 15 15 15 IS61LV6416-15BI IS61LV6416-15TI IS61LV6416-15KI mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ 20 20 20 IS61LV6416-20BI IS61LV6416-20TI IS61LV6416-20KI mini BGA (6mm x 8mm) Plastic TSOP 400-mil Plastic SOJ ISSI ® Integrated Silicon Solution, Inc. 2231 Lawson Lane Santa Clara, CA 95054 Tel: 1-800-379-4774 Fax: (408) 588-0806 E-mail: [email protected] www.issi.com 10 Integrated Silicon Solution, Inc. Rev. D 10/20/00