Extended PCM Interface Controller (EPIC-1) PEB 2055 General Description Information from subscriber lines needs to be transferred to time-slots on system internal PCM communication highways. The EPIC-1 concentrates the circuitry necessary to do this interfacing for a large number of transmission lines on a single IC. Therefore, it is not necessary to repeat this PCM interface circuitry for every line. Since the system cost of the EPIC-1 is divided by the number of lines it controls, powerful and comfortable functions can be economically performed. Type Package PEB 2055-N P-LCC-44-1 (SMD) PEF 2055-N P-LCC-44-1 (SMD) • Interfacing with four full-duplex PCM highways (up to 8 Mbit/s) • Data rates of PCM and configurable interfaces independent of each other • Change detection (“last look”) logic for C/l or signaling channels • 16-byte FIFO for monitor or feature control channels • Standard µP interface with multiplexed or demultiplexed address/data bus or separate address and data busses • Advanced low power CMOS technology • Also available with extended temperature range – 40 to 85 °C (PEF 2055-N) Features • PCM interface controller for up to 32 ISDN or 64 analog subscribers • Time-slot assignment freely programmable for all subscribers • Non-blocking switch for 128 channels • Switching of 16-, 32-, 64-kbit/s channels (128 kbit/s via two consecutive 64 kbit/s channels) • Two serial interfaces: PCM and configurable (IOM-2, IOM-1, SLD, PCM). RES DCL / SCLK PDC Timing FSC / DIR PFS DD0 / SIP0 DU0 / SIP4 DD1 / SIP1 DU1 / SIP5 DD2 / SIP2 DU2 / SIP6 Configurable Interface Data Memory DD3 / SIP3 DU3 / SIP7 PCM Interface RxD 0 TxD 0 TSC 0 RxD 1 TxD 1 TSC 1 RxD 2 TxD 2 TSC 2 RxD 3 TxD 3 TSC 3 Control Memory Layer-1 Controller Buffer Block Diagram Siemens Aktiengesellschaft µP Interface AD0-AD7 WR RD CS ALE INT 1 ITB00687