Precision Gain of 5 Instrumentation Amplifier AD8225 APPLICATIONS Patient Monitors Current Transmitters Multiplexed Systems 4 to 20 mA Converters Bridge Transducers Sensor Signal Conditioning FUNCTIONAL BLOCK DIAGRAM NC 1 AD8225 8 NC –IN 2 7 +VS +IN 3 6 VOUT –VS 4 5 REF NC = NO CONNECT 140 130 120 110 CMRR – dB FEATURES No External Components Required Highly Stable, Factory Trimmed Gain of 5 Low Power, 1.2 mA Max Supply Current Wide Power Supply Range (1.7 V to 18 V) Single- and Dual-Supply Operation Excellent Dynamic Performance High CMRR 86 dB Min @ DC 80 dB Min to 10 kHz Wide Bandwidth 900 kHz 4 V to 36 V Single Supply High Slew Rate 5 V/s Min Outstanding DC Precision Low Gain Drift 5 ppm/C Max Low Input Offset Voltage 150 V Max Low Offset Drift 2 V/C Max Low Input Bias Current 1.2 nA Max 100 AD8225 90 HIGH PERFORMANCE IN AMP @ GAIN OF 5 80 70 60 50 40 30 1 10 100 1k FREQUENCY – Hz 10k 100k Figure 1. Typical CMRR vs. Frequency GENERAL DESCRIPTION The AD8225 is an instrumentation amplifier with a fixed gain of 5, which sets new standards of performance. The superior CMRR of the AD8225 enables rejection of high frequency common-mode voltage (80 dB Min @ 10 kHz). As a result, higher ambient levels of noise from utility lines, industrial equipment, and other radiating sources are rejected. Extended CMV range enables the AD8225 to extract low level differential signals in the presence of high common-mode dc voltage levels even at low supply voltages. Ambient electrical noise from utility lines is present at 60 Hz and harmonic frequencies. Power systems operating at 400 Hz create high noise environments in aircraft instrument clusters. Good CMRR performance over frequency is necessary if power system generated noise is to be rejected. The dc to 10 kHz CMRR performance of the AD8225 rejects noise from utility systems, motors, and repair equipment on factory floors, switching power supplies, and medical equipment. Low input bias currents combined with a high slew rate of 5 V/µs make the AD8225 ideally suited for multiplexed applications. The AD8225 provides excellent dc precision, with maximum input offset voltage of 150 µV and drift of 2 µV/°C. Gain drift is 5 ppm/°C or less. Operating on either single or dual supplies, the fixed gain of 5 and wide input common-mode voltage range make the AD8225 well suited for patient monitoring applications. The AD8225 is packaged in an 8-lead SOIC package and is specified over the standard industrial temperature range, –40°C to +85°C. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. AD8225–SPECIFICATIONS (T = 25C, V = 15 V, R = 2 k, unless otherwise noted.) A Parameter S Conditions Min GAIN Gain Gain Error Nonlinearity vs. Temperature –0.1 OFFSET VOLTAGE (RTI) Offset Voltage vs. Temperature vs. Supply (PSRR) 90 INPUT Input Operating Impedance Differential Common Mode Input Voltage Range (Common-Mode) vs. Temperature Input Bias Current vs. Temperature Input Offset Current vs. Temperature Common-Mode Rejection Ratio DYNAMIC RESPONSE Small Signal –3 dB Bandwidth Full Power Bandwidth Settling Time (0.01%) Settling Time (0.001%) Slew Rate NOISE (RTI) Voltage Current REFERENCE INPUT RIN IIN Voltage Range Gain to Output Typ Max Unit 5 +0.05 2 1 +0.1 10 5 V/V % ± ppm ± ppm/°C 150 2 ±µV ±µV/°C dB 50 0.3 100 10储2 10储2 –VS + 1.6 +VS – 1.0 –VS + 2.2 86 83 80 TA = TMIN to TMAX f = 10 kHz* OUTPUT Operating Voltage Range vs. Temperature Operating Voltage Range vs. Temperature Short Circuit Current L RL = 2 kΩ 0.5 3 0.15 1.5 94 –VS + 1.4 –VS + 1.5 –VS + 1.0 –VS + 1.2 RL = 10 kΩ +VS – 1.2 1.2 0.5 +VS – 1.4 +VS – 1.6 +VS – 1.1 +VS – 1.0 18 GΩ储pF GΩ储pF V V nA pA/°C nA pA/°C dB dB dB V V V V mA 900 75 3.4 4.8 kHz kHz µs µs V/µs 0.1 Hz to 10 Hz Spectral Density, 1 kHz 0.1 Hz to 10 Hz Spectral Density, 1 kHz 1.5 45 4 50 µV p-p nV/√Hz pA p-p fA/√Hz VIN+, VREF = 0 18 60 kΩ µA V VOUT = 20 V p-p 10 V Step 10 V Step 5 –VS + 1.4 0.999 POWER SUPPLY Operating Range Quiescent Current 1 +VS – 1.4 1.001 1.05 18 1.2 ±V mA +85 °C 1.7 TEMPERATURE RANGE For Specified Performance –40 *Pin 1 connected to Pin 4. See Applications section. Specifications subject to change without notice. –2– REV. A AD8225 SPECIFICATIONS (T = 25C, V = 5 V, R = 2 k, unless otherwise noted.) A Parameter S L Conditions Min GAIN Gain Gain Error Nonlinearity vs. Temperature –0.1 VOLTAGE OFFSET (RTI) Offset Voltage vs. Temperature vs. Supply 90 NOISE (RTI) Voltage Current REFERENCE INPUT RIN IIN Voltage Range Gain to Output 5 +0.05 2 1 +0.1 10 5 V/V % ± ppm ± ppm/°C 325 2 100 –VS + 1.6 –VS + 2.1 86 83 80 RL = 2 kΩ 0.5 3 0.15 1.5 94 –VS + 0.9 –VS + 1.0 –VS + 0.8 –VS + 0.9 RL = 10 kΩ +VS – 1.0 +VS – 1.5 1.2 0.5 +VS – 1.0 +VS – 1.2 +VS – 1.0 +VS – 1.0 18 ±µV ±µV/°C dB GΩ储pF GΩ储pF V V nA pA/°C nA pA/°C dB dB dB V V V V mA 900 170 3 4.3 kHz kHz µs µs V/µs 0.1 Hz to 10 Hz Spectral Density, 1 kHz 0.1 Hz to 10 Hz Spectral Density, 1 kHz 1.5 45 4 50 µV p-p nV/√Hz pA p-p fA/√Hz VINT, VREF = 0 18 60 kΩ µA V VOUT = 7.8 V p-p 7 V Step 7 V Step 5 –VS + 0.9 0.999 POWER SUPPLY Operating Range Quiescent Current 1 +VS – 1.0 1.001 1.05 18 1.2 ±V mA +85 °C 1.7 TEMPERATURE RANGE For Specified Performance –40 *Pin 1 connected to Pin 4. See Applications section. Specifications subject to change without notice. REV. A Unit 10储2 10储2 TA = TMIN to TMAX f = 10 kHz* DYNAMIC RESPONSE Small Signal –3 dB Bandwidth Full Power Bandwidth Settling Time (0.01%) Settling Time (0.001%) Slew Rate Max 125 INPUT Input Operating Impedance Differential Common-Mode Input Operating Voltage Range vs. Temperature Input Bias Current vs. Temperature Input Offset Current vs. Temperature Common-Mode Rejection Ratio OUTPUT Operating Voltage Range vs. Temperature Operating Voltage Range vs. Temperature Short Circuit Current Typ –3– AD8225 SPECIFICATIONS (T = 25C, V = 5 V, R = 2 k, unless otherwise noted.) A Parameter S L Conditions Min GAIN Gain Gain Error Nonlinearity vs. Temperature –0.1 OFFSET VOLTAGE (RTI) Offset Voltage vs. Temperature vs. Supply 90 NOISE (RTI) Voltage Current Unit 5 +0.05 2 1 +0.1 10 5 V/V % ± ppm ± ppm/°C 375 2 100 10储2 10储2 VS – 1.05 1.6 1.7 86 83 80 TA = TMIN to TMAX f = 10 kHz* DYNAMIC RESPONSE Small Signal –3 dB Bandwidth Full Power Bandwidth Settling Time (0.01%) Settling Time (0.001%) Slew Rate Max 150 INPUT Input Operating Impedance Differential Common Mode Input Voltage Range (Common-Mode) vs. Temperature Input Bias Current vs. Temperature Input Offset Current vs. Temperature Common-Mode Rejection Ratio OUTPUT Operating Voltage Range vs. Temperature Operating Voltage Range vs. Temperature Short Circuit Current Typ RL = 2 kΩ 0.5 3 0.15 1.5 94 0.8 0.9 0.8 0.9 RL = 10 kΩ VS – 1.0 1.2 0.5 VS – 1.05 VS – 1.2 VS – 1.0 VS – 1.0 18 VOUT = 3.2 V p-p 2 V Step 2 V Step REFERENCE INPUT RIN IIN Voltage Range Gain to Output 0.4 0.999 POWER SUPPLY Operating Range Quiescent Current –40 V nA pA/°C nA pA/°C dB dB dB V V V V mA kHz kHz µs µs V/µs 1.5 45 4 50 µV p-p nV/√Hz pA p-p fA/√Hz 18 60 kΩ µA V 1 VS – 0.9 1.001 1.05 36 1.2 V mA +85 °C 3.4 TEMPERATURE RANGE For Specified Performance GΩ储pF GΩ储pF V 900 420 3.3 5.1 5 0.1 Hz to 10 Hz Spectral Density, 1 kHz 0.1 Hz to 10 Hz Spectral Density, 1 kHz ±µV ±µV/°C dB *Pin 1 connected to Pin 4. See Applications section. Specifications subject to change without notice. –4– REV. A AD8225 ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 650 mW Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 25 V Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Storage Temperature . . . . . . . . . . . . . . . . . . –65ºC to +125ºC Operating Temperature Range . . . . . . . . . . . –40ºC to +85ºC Lead Temperature Range (10 sec Soldering) . . . . . . . . . 300ºC *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Pin Number Mnemonic Function 1 NC May be Connected to Pin 4 to Balance CIN 2 –IN Inverting Input 3 +IN Noninverting Input 4 –VS Negative Supply Voltage 5 REF Connect to Desired Output CMV 6 VOUT Output 7 +VS Positive Supply Voltage 8 NC 1.5 POWER DISSIPATION – W TJ = 150 C 8-LEAD SOIC PACKAGE 1.0 0.5 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE – C 70 80 90 Figure 2. Maximum Power Dissipation vs. Temperature ORDERING GUIDE Model Temperature Range Package Description Package Options AD8225AR AD8225AR-REEL AD8225AR-REEL7 AD8225-EVAL –40ºC to +85ºC –40ºC to +85ºC –40ºC to +85ºC 8-Lead SOIC 8-Lead SOIC 8-Lead SOIC Evaluation Board RN-8 13" REEL 7" REEL RN-8 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8225 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. A –5– AD8225–Typical Performance Characteristics (T = 25C, R = 2 k, V A 50 L S = 15 V, unless otherwise noted.) 250 LOT SIZE = 3775 45 200 40 BIAS CURRENT – pA % OF UNITS 35 30 25 20 15 150 +BIAS CURRENT 100 –BIAS CURRENT 50 10 0 5 0 –140 –120 –100 –80 –60 –40 –20 0 20 40 60 INPUT OFFSET VOLTAGE – V –50 –60 80 100 120 –40 –20 0 20 40 TEMPERATURE – C 60 80 100 TPC 4. Bias Current vs. Temperature TPC 1. Typical Distribution of Input Offset Voltage, VS = ± 15 V 8 50 LOT SIZE = 7550 CHANGE IN OFFSET VOLTAGE – V 45 40 % OF UNITS 35 30 25 20 15 10 6 4 2 5 0 –200 –100 0 0 100 200 300 400 500 INPUT BIAS CURRENT – pA 600 700 800 0 1 2 3 WARM-UP TIME – Min 4 5 TPC 5. Offset Voltage vs. Warm-Up Time TPC 2. Typical Distribution of Input Bias Current, VS = ± 15 V 1000 50 LOT SIZE = 3775 VOLTAGE NOISE DENSITY – nV/ Hz 45 40 % OF UNITS 35 30 100 25 20 15 10 5 0 –500 0 –400 –300 –200 –100 0 100 200 INPUT OFFSET CURRENT – pA 300 400 1 10 100 1k FREQUENCY – Hz 10k 100k TPC 6. Voltage Noise Spectral Density vs. Frequency (RTI) TPC 3. Typical Distribution of Input Offset Current, VS = ± 15 V –6– REV. A AD8225 1000 130 VOLTAGE NOISE DENSITY – nV/ Hz 120 110 CMR – dB 100 100 90 80 70 60 50 40 0 1 10 100 FREQUENCY – Hz 30 10k 1k 1 TPC 7. Input Current Noise Spectral Density vs. Frequency 10 100 1k FREQUENCY – Hz 100k 10k TPC 10. CMR vs. Frequency, RTI 0.10 4 0.08 1S 3 0.06 100 90 CMRR DRIFT – ppm/ C NOISE – RTI – V 2 1 0 –1 –2 10 0 0.04 0.02 0 –0.02 –0.04 –0.06 –3 –0.08 –4 0 5 TIME – sec –0.10 –40 10 –20 0 80 100 10 15 20 40 60 TEMPERATURE – C TPC 11. CMRR vs. Temperature TPC 8. 0.1 Hz to 10 Hz Voltage Noise, RTI 15 8 1S 10 COMMON-MODE VOLTAGE – V CURRENT NOISE – 2pA/div 6 100 4 90 2 0 –2 –4 10 0 5 VS = 5V 0 –5 –10 –6 –8 0 5 TIME – sec –15 –15 10 –10 0 –5 5 OUTPUT VOLTAGE – V TPC 12. CMV Range vs. VOUT, Dual Supplies TPC 9. 0.1 Hz to 10 Hz Current Noise REV. A VS = 15V –7– AD8225 40 5 30 20 COMMON-MODE VOLTAGE – V 4 VS = 5V 10 0 GAIN – dB 3 –10 –20 2 –30 –40 1 –50 0 0 1 2 3 OUTPUT VOLTAGE – V 4 –60 100 5 TPC 13. CMV vs. VOUT, Single Supply 10M +VS –0.0 INPUT VOLTAGE 5 – V (REFERRED TO SUPPLY VOLTAGES) 120 100 PSRR – dB 1M TPC 16. Large Signal Frequency Response, VOUT = 4 V p-p 140 80 +VS 60 –VS 40 20 0 0.1 10k 100k FREQUENCY – Hz 1k –0.5 –1.0 –1.5 –2.0 0 5 0 5 15 20 10 15 SUPPLY VOLTAGE – V 20 10 2.0 1.5 1.0 0.5 –VS +0.0 1 10 100 1k FREQUENCY – Hz 10k 1M 100k TPC 14. PSRR vs. Frequency, RTI TPC 17. Input Common Mode Voltage Range vs. Supply Voltage 40 +VS 0 OUTPUT VOLTAGE SWING – V (REFERENCED TO SUPPLY VOLTAGES) 30 20 GAIN – dB 10 0 –10 –20 –30 –40 –50 –60 100 1k 10k 100k FREQUENCY – Hz 1M –0.5 RL = 2k –1.5 –2.0 0 2 4 6 8 10 12 14 16 18 20 8 10 12 14 SUPPLY VOLTAGE – V 16 18 20 2.0 1.5 RL = 2k 1.0 RL = 10k 0.5 –VS 0 10M RL = 10k –1.0 0 2 4 6 TPC 18. Output Voltage Swing vs. Supply Voltage and Load Resistance TPC 15. Small Signal Frequency Response, VOUT = 200 mV p-p –8– REV. A AD8225 30 10 8 7 SETTLING TIME – s OUTPUT VOLTAGE SWING – V p-p 9 25 20 15 10 6 5 0.001% 4 3 0.01% 2 5 1 0 10 1k 100 LOAD RESISTANCE – 0 100k 0 TPC 19. Output Voltage Swing vs. Load Resistance 5 10 STEP SIZE – V 15 20 TPC 22. Settling Time vs. Step Size 4 CH 1 = 5V/DIV 100 100mV HORIZ (4s/DIV) 100 OUTPUT (5V/DIV) NONLINEARITY – ppm 90 CH 2 = 10mV/DIV 2V 3 TEST CIRCUIT OUTPUT (0.001%/DIV) 10 2 90 1 0 –1 –2 10 0 0 –3 –4 –10 0 10 OUTPUT VOLTAGE – V TPC 20. Large Signal Pulse Response and Settling Time to 0.001% TPC 23. Gain Nonlinearity 1.5 1.4 INPUT 1.3 SUPPLY CURRENT – mA 100 90 1 OUTPUT 10 1.2 1.1 +85 C 1.0 +25 C 0.9 0.8 –40 C 0.7 0 2 0.6 CH 1 = 10mV, CH 2 = 20mV, H = 2s 0.5 TPC 21. Small Signal Pulse Response, CL = 100 pF REV. A 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE – V 16 18 TPC 24. ISUPPLY vs. VSUPPLY and Temperature –9– 20 AD8225 Test Circuits 4k⍀ G = 100 AD797 G=5 AD8225 100⍀ G = 100 LPF G = 101 SCOPE G=5 AD829 20k⍀ AD8225 2k⍀ 20⍀ 2k⍀ Test Circuit 2. Settling Time to 0.01% Test Circuit 1. 1 Hz to 10 Hz Voltage Noise Test –10– REV. A AD8225 +VS APPLICATIONS Precision V-to-I Converter +VS +VS VB –IN A1 –VS +IN Q1 Q2 A2 C2 R2 –VS R1 C1 +VS 3k VREF 15k +VS A3 3k –VS 15k OUT When small analog voltages are transmitted across significant distances, errors may develop due to ambient electrical noise, stray capacitance, or series impedance effects. If the desired voltage is converted to a current, however, the effects of ambient noise are mitigated. All that is required is a voltage to current conversion at the source, and an I-to-V conversion at the other end to reverse the process. Figure 5 illustrates how the AD8225 may be used as the transmitter and receiver in a current loop system. The full-scale output is 5 mA. 3 –VS Figure 3. Simplified Schematic eIN 200mV pk FS IOUT AD8225 2 Referring to Figure 3, the input buffers consist of super-beta NPN transistors Q1 and Q2, and op amps A1 and A2. The transistors are compensated so that the bias currents are extremely low, typically 100 pA or less. As a result, current noise is also low, at 50 fA/√Hz. The unity gain input buffers drive a gain-of-five difference amplifier. Because the 3 kΩ and 15 kΩ resistors are ratio matched, gain stability is better than 5 ppm/°C over the rated temperature range. The AD8225 also has five times the gain bandwidth of a typical in amp. This wider GBW results from compensation at a fixed gain of 5, which can be one fifth of that required if the amplifier were compensated for unity gain. 2 6 5 V 0.5 eIN IOUT = SH = RSH RSH Figure 5. Precision Voltage-to-Current Converter As noted in Figure 5, an additional op amp and four resistors are required to complete the converter. The precision gain of 5 in the AD8225s, used in the transmit and receive sections, preserves the integrity of the desired signal, while the high frequency common-mode performance at the receiver rejects noise on the transmission line. The reference of the receiver may be connected to local ground or the reference pin of an A/D converter (ADC). Figure 6 shows bench measurements of the input and output voltages, and output current of the circuit of Figure 5. The transmission media is 10 feet of insulated hook-up wire for the current drive and return lines. eIN = 398mV p-p, eOUT = 398mV p-p, IOUT = 10.3mA p-p eIN eOUT 2 AD8225 8 NC 7 +VS 6 VOUT 5 REF eOUT 200mV pk FS GND OR REF V OP27 1 IOUT 3 AC GROUND CH 1 = 100mV, CH 2 = 100mV, CH 3 = 10mA, H = 200s Figure 6. V-to-I Converter Waveforms (CH1: VIN, CH2: VOUT, CH3: IOUT) PIN 1 HAS NO INTERNAL CONNECTION Figure 4. Pinout for Symmetrical Input Stray Capacitance REV. A AD8225 8 9k High frequency performance is also enhanced by the innovative pinout of the AD8225. Since Pins 1 and 8 are uncommitted, Pin 1 may be connected to Pin 4. Since Pin 4 is also ac common, the stray capacitance at Pins 2 and 3 is balanced. +IN 3 VSH 47pF The AD8225 is a monolithic, three op amp instrumentation amplifier. Laser wafer trimming and proprietary circuit techniques enable the AD8225 to boast the lowest output offset voltage and drift of any currently available in amp (150 µV RTI), as well as a higher common-mode voltage range. –IN FULL SCALE CURRENT = 5mA 5 THEORY OF OPERATION AC GROUND 6 1k RSH 20 –11– AD8225 100 pF of capacitance at its output, a 75 Ω series resistor is required at each in amp output to prevent oscillation. Driving a High Resolution ADC Most high precision ADCs feature differential analog inputs. Differential inputs offer an inherent 6 dB improvement in S/N ratio and resultant bit resolution. These advantages are easy to realize using a pair of AD8225s. Using the Reference Input Note in the example in Figure 7 that Pin 5, the reference input, is driven by a voltage source. This is because the reference pin is internally connected to a 15 kΩ resistor, which is carefully trimmed to optimize common-mode rejection. Any additional resistance connected to this node will unbalance the bridge network formed by the two 3 kΩ and two 15 kΩ resistors, resulting in an error voltage generated by common-mode voltages at the input pins. AD8225s can be configured to drive an ADC with differential inputs by using either single-ended or differential inputs to the AD8225s. Figure 7 shows the circuit connections for a differential input. A single-ended input may be configured by connecting the negative input terminal to ground. AD8225 Used as an EKG Front End 5V The topology of the instrumentation amplifier has made it the circuit configuration of choice for designers of EKG and other low level biomedical amplifiers. CMRR and common-mode voltage advantages of the instrumentation amplifier are tailor made to meet the challenges of detecting minuscule cardiac generated voltage levels in the presence of overwhelming levels of noise and dc offset voltage. The subtracter circuit of the in amp will extract and amplify low level signals that are virtually obscured by the presence of high common-mode dc and ac potentials. 3 6 AD8225 75 +IN 2 5 AD7675 100kSPS 3 AD8225 6 75 2 ALTERNATE CONNECTION FOR SE SOURCE 16 BITS 2.7nF –IN 2.7nF 5 4.99k 1.25V OP177 4.99k A typical circuit block diagram of an EKG amplifier is shown in Figure 8. Using discrete op amps in the in amp and gain stages, the signal chain usually includes several filters, high voltage protection, lead-select circuitry, patient lead buffering, and an ADC. Designers who roll their own instrumentation amplifiers must provide precision custom trimmed resistor networks and well matched op amps. 2.5V AD780 RERERENCE Figure 7. Driver for Differential ADC The AD8225 instrumentation amplifier not only replaces all the components shown in the highlighted block in Figure 8, but also provides a solution to many of the difficult design problems encountered in EKG front ends. Among these are patient generated errors from ac noise sources and errors generated by unequal electrode potentials. Alone, these error voltages can exceed the desired QRS complex by orders of magnitude. The AD7675 ADC illustrated in Figure 7 is a SAR type converter. When the input is sampled, the internal sample-and-hold capacitor is charged to the input voltage level. Since the output of the AD8225 cannot track the instantaneous current surge, a voltage glitch develops. To source the momentary current surge, a capacitor is connected from the A/D input terminal to ground. Since the AD8225 cannot tolerate greater than approximately PATIENT ISOLATION BARRIER INSTRUMENTATION AMPLIFIER G = 3 TO 10 A1 A3 GAIN AND ADC TOTAL G = 1000 DIGITAL DATA TO SYSTEM MAINFRAME LEAD SELECT, HV PROTECTION, FILTERING A2 Figure 8. Block Diagram, EKG Monitor Front End Using Discrete Components –12– REV. A AD8225 In the classical three op amp in amp topology shown in Figure 8, gain is developed differentially between the two input amplifiers A1 and A2, sacrificing CMV (common-mode voltage) range. The gain of the in amp is typically 10 or less, and an additional gain stage increases the overall gain to approximately 1000. Gain developed in the input stage results in a trade-off in commonmode voltage range, constraining the ability of the amplifier to tolerate high dc electrode errors. Although the AD8225 is also a three amplifier design, its gain of 5 is developed at the output amplifier, improving the CMV range at the input. Using ± 5 V supplies, the CMV range of the AD8225 is from –3.4 V to +4 V, compared to –3.1 V to +3.8 V, a 7% improvement in input headroom over conventional in amps with the same gain. G = 5 OP77 G = 200 19.6k LA-LL 2 RA-LL 3 CH 1 = 2V, CH 2 = 2V, CH 3 = 2V, H = 200ms Figure 10. EKG Waveform Using Circuit of Figure 9 Benefits of Fast Slew Rates At 5 V/µs, the slew rate of the AD8225 is as fast as many op amp circuits. This is an advantage in systems applications using multiple sensors. For example, an analog multiplexer (see Figure 11) may be used to select pairs of leads connected to several sensors. If the AD8225 drives an ADC, the acquisition time is constrained by the ability of the in amp to settle to a stable level after a new set of leads is selected. Fast slew rates contribute greatly to this function, especially if the difference in input levels is large. AD8225 100 RA-LA 1 301 S1A S1B 0.2V, 2V AD8225 S2A G = 5 OP77 G = 200 S3A 100 19.6k DA S2B 301 1 ADG409 AD8225 DB S3B REF S4A 4 S4B AD8225 G = 5 OP77 G = 200 Figure 11. Connection to an ADG409 Analog MUX 100 19.6k 301 Figure 9. EKG Monitor Front End Figure 9 illustrates how an AD8225 may be used in an EKG front end. In a low cost system, the AD8225 can be connected to the patient. If buffers are required, the AD8225 can replace the expensive precision resistor network and op amp. Figure 12 illustrates the response of an AD8225 connected to an ADG409 analog multiplexer in the circuit shown in Figure 11 at two signal levels. Two of the four MUX inputs are connected to test dc levels. The remaining two are at ground potential so that the output slews as the inputs A0 and A1 are addressed. As can be seen, the output response settles well within 4 µs of the applied level. Figure 10 shows test waveforms observed from the circuit of Figure 9. INPUT SIGNAL TRANSITION SMALL SIGNAL (200mV/DIV) LARGE SIGNAL (2V/DIV) CH 1 = 200mV, CH 2 = 2V, H = 500ns Figure 12. Slew Responses After MUX Selection REV. A –13– AD8225 Evaluation Board Figure 13 is a schematic of an evaluation board available for the AD8225. The board is shipped with an AD8225 already installed and tested. The user need only connect power and an input to conduct measurements. The supply may be configured for dual or single supplies, and the input may be dc- or ac-coupled. A circuit is provided on the board so that the user can zero the output offset. If desired, a reference may be applied from an external voltage source. +VS C1 0.1F +IN GND R2 100 R4 100 W3 3 W4 C3 0.1F –IN C4 0.1F R3 100k* 2 R5 100k* 7 6 A1 4 1 5 OUTPUT R8 W12 C2 0.1F W13 EXT_REF W11 W14 –VS USER-SUPPLIED +VAUX C12 10F, 25V C10 0.1F W7 +VAUX +VS GND W6 –VS –VAUX C11 10F, 25V 6 3 7 A1 OFFSET ADJ CS1 J500 240A R1 10k 2 4 C9 0.1F –VAUX NOTES REMOVE W3 AND W4 FOR AC COUPLING *INSTALL FOR AC COUPLING AD707JN C7 R9 0.1F 5.9k, 1% R10 5.9k, 1% C8 0.1F CS2 J500 240A –VAUX Figure 13. Evaluation Board Schematic –14– REV. A AD8225 OUTLINE DIMENSIONS 8-Lead Standard Small Outline Package (SOIC) (RN-8) Dimensions shown in millimeters and (inches) 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 8 5 1 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) COPLANARITY SEATING 0.10 PLANE 6.20 (0.2440) 5.80 (0.2284) 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.33 (0.0130) 0.50 (0.0196) 45 0.25 (0.0099) 8 0.25 (0.0098) 0 1.27 (0.0500) 0.41 (0.0160) 0.19 (0.0075) COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN REV. A –15– AD8225 Revision History Location Page 2/03—Data Sheet changed from REV. 0 to REV. A. Change to TPC 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Change to TPC 20 caption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Edit to Precision V-to-I Converter section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 PRINTED IN U.S.A. OUTLINE DIMENSIONS updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 C02771–0–2/03(A) Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 –16– REV. A