APT38F50J 500V, 38A, 0.10Ω Max, trr ≤280ns N-Channel FREDFET S S Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. D G SO 2 T- 27 "UL Recognized" file # E145592 ISOTOP ® D APT38F50J Single die FREDFET G S FEATURES TYPICAL APPLICATIONS • Fast switching with low EMI • ZVS phase shifted and other full bridge • Low trr for high reliability • Half bridge • Ultra low Crss for improved noise immunity • PFC and other boost converter • Low gate charge • Buck converter • Avalanche energy rated • Single and two switch forward • RoHS compliant • Flyback Absolute Maximum Ratings Symbol ID Parameter Ratings Continuous Drain Current @ TC = 25°C 38 Continuous Drain Current @ TC = 100°C 24 175 Unit A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1200 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 28 A 1 Thermal and Mechanical Characteristics Max Unit Total Power Dissipation @ TC = 25°C 355 W RθJC Junction to Case Thermal Resistance 0.35 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range -55 VIsolation RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) 2500 V WT Torque Package Weight Terminals and Mounting Screws. MicrosemiWebsite-http://www.microsemi.com 0.15 150 °C/W °C 1.03 oz 29.2 g 10 in·lbf 1.1 N·m 05-2009 PD Typ Rev C Min 050-8130 Characteristic Symbol Static Characteristics TJ = 25°C unless otherwise specified APT38F50J Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA 500 ∆VBR(DSS)/∆TJ Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics Forward Transconductance VDS = 500V TJ = 25°C VGS = 0V TJ = 125°C VGS = ±30V Min Test Conditions VDS = 50V, ID = 28A Typ Output Capacitance 42 8800 120 945 550 275 220 50 100 38 45 100 33 Min Typ Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Max 0.10 5 Unit V V/°C Ω V mV/°C 250 1000 ±100 µA nA TJ = 25°C unless otherwise specified Parameter gfs 0.60 0.085 2.5 4 -10 VGS = 10V, ID = 28A 3 IDSS Symbol Reference to 25°C, ID = 250µA Breakdown Voltage Temperature Coefficient RDS(on) Typ VGS = 0V, VDS = 25V f = 1MHz Co(cr) 4 Effective Output Capacitance, Charge Related Co(er) 5 Effective Output Capacitance, Energy Related Max Unit S pF VGS = 0V, VDS = 0V to 333V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tr td(off) tf VGS = 0 to 10V, ID = 28A, VDS = 250V Resistive Switching VDD = 333V, ID = 28A Current Rise Time RG = 4.7Ω 6 , VGG = 15V Turn-Off Delay Time Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) (Body Diode) 1 Qrr Reverse Recovery Charge Irrm Reverse Recovery Current Peak Recovery dv/dt S TJ = 25°C TJ = 125°C ISD = 28A 3 TJ = 25°C diSD/dt = 100A/µs TJ = 125°C VDD = 100V TJ = 25°C TJ = 125°C ISD ≤ 28A, di/dt ≤1000A/µs, VDD = Max 38 175 1.20 3.07 10.1 14.5 1.0 280 520 20 Unit A G ISD = 28A, TJ = 25°C, VGS = 0V Diode Forward Voltage Reverse Recovery Time D MOSFET symbol showing the integral reverse p-n junction diode (body diode) Pulsed Source Current trr dv/dt Test Conditions 333V, TJ = 125°C V ns µC A V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 050-8130 Rev C 05-2009 2 Starting at TJ = 25°C, L = 3.06mH, RG = 25Ω, IAS = 28A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.04E-7/VDS^2 + 4.76E-8/VDS + 1.36E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. V GS 100 = 10V TJ = -55°C 80 40 = 7 & 10V 70 6V 60 50 40 5.5V 30 20 TJ = 150°C 5V 10 TJ = 125°C 0 0 5 10 15 20 25 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 2.5 0 NORMALIZED TO VGS = 10V @ 28A VDS> ID(ON) x RDS(ON) MAX. 250µSEC. PULSE TEST @ <0.5 % DUTY CYCLE 150 ID, DRAIN CURRENT (A) 2.0 1.5 1.0 0.5 5 10 15 20 25 30 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics 175 125 TJ = -55°C 100 TJ = 25°C 75 TJ = 125°C 50 25 0 0 -55 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 3, RDS(ON) vs Junction Temperature 0 2 4 6 8 10 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics 20,000 70 Ciss 10,000 60 TJ = -55°C TJ = 25°C 50 C, CAPACITANCE (pF) TJ = 125°C 40 30 20 1000 Coss 100 Crss 10 10 50 100 200 300 400 500 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 12 VDS = 100V 10 VDS = 250V 8 6 VDS = 400V 4 2 0 0 175 ID = 28A 14 0 10 20 30 40 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 50 100 150 200 250 300 350 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 150 125 100 TJ = 25°C 75 TJ = 150°C 50 25 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 05-2009 VGS, GATE-TO-SOURCE VOLTAGE (V) 16 0 ISD, REVERSE DRAIN CURRENT (A) 0 Rev C gfs, TRANSCONDUCTANCE GS 6.5V Figure 1, Output Characteristics RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE ID, DRIAN CURRENT (A) ID, DRAIN CURRENT (A) TJ = 25°C V J 80 120 0 T = 125°C 90 160 APT38F50J 050-8130 200 APT38F50J 250 250 100 100 IDM 10 13µs 100µs 1ms Rds(on) 10ms 1 100ms 13µs 100µs 1ms 10ms Rds(on) TJ = 150°C TC = 25°C 1 0.1 10 100 600 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 1 10 DC line TJ = 125°C TC = 75°C 0.1 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) IDM 100ms Scaling for Different Case & Junction Temperatures: ID = ID(T = 25°C)*(TJ - TC)/125 DC line C 1 10 100 600 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 0.35 D = 0.9 0.30 0.7 0.25 0.20 0.5 Note: 0.15 0.3 0.10 0 t1 t2 t1 = Pulse Duration 0.05 PDM ZθJC, THERMAL IMPEDANCE (°C/W) 0.40 t 0.1 0.05 10-5 Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC SINGLE PULSE 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 11. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 1.0 SOT-227 (ISOTOP®) Package Outline 11.8 (.463) 12.2 (.480) 31.5 (1.240) 31.7 (1.248) 7.8 (.307) 8.2 (.322) 050-8130 Rev C 05-2009 r = 4.0 (.157) (2 places) W=4.1 (.161) W=4.3 (.169) H=4.8 (.187) H=4.9 (.193) (4 places) 8.9 (.350) 9.6 (.378) Hex Nut M4 (4 places) 25.2 (0.992) 0.75 (.030) 12.6 (.496) 25.4 (1.000) 0.85 (.033) 12.8 (.504) 4.0 (.157) 4.2 (.165) (2 places) 3.3 (.129) 3.6 (.143) 14.9 (.587) 15.1 (.594) 1.95 (.077) 2.14 (.084) * Source 30.1 (1.185) 30.3 (1.193) Drain * Emitter terminals are shorted internally. Current handling capability is equal for either Source terminal. 38.0 (1.496) 38.2 (1.504) * Source Gate Dimensions in Millimeters and (Inches) ISOTOP® is a registered trademark of ST Microelectronics NV. Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.