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Description
www.fairchildsemi.com
FAN1084
4.5A Adjustable/Fixed Low Dropout Linear Regulator
Description
•
•
•
•
•
The FAN1084 and FAN1084-1.5 are low dropout three-terminal regulators with 4.5A output current capability. These
devices have been optimized for low voltage applications
including VTT bus termination, where transient response and
minimum input voltage are critical. The FAN1084 is ideal for
low voltage microprocessor applications requiring a regulated output from 1.5V to 3.6A with an input supply of 5V or
less. The FAN1084-1.5 offers fixed 1.5V with 4.5A current
capabilities for GTL+ bus VTT termination.
Fast transient response
Low dropout voltage at up to 4.5A
Load regulation: 0.5% typical
On-chip thermal limiting
Standard TO-220 and TO-263 center cut packages
Applications
•
•
•
•
•
•
•
Desktop PCs, RISC and embedded processors’ supply
GTL, SSTL logic Reference bus supply
Low voltage VCC logic supply
Battery-powered circuitry
Post regulator for switching supply
Cable and ADSL modems’ DSP core supply
Set Top Boxes and Web Boxes modules’ supply
On-chip thermal limiting provides protection against any
combination of overload and ambient temperature that
would create excessive junction temperatures.
The FAN1084 series regulators are available in the industrystandard TO-220 and TO-263 center cut power packages.
Block Diagram
FAN1084
VIN
VIN = 5V
+
VOUT
ADJ
10µF
2.5V at 4.5A
+
124Ω
22µF
124Ω
FAN1084-1.5
VIN
VOUT
VIN = 3.3V
+
10µF
GND
1.5V at 4.5A
+
22µF
Rev. 0.8.1
Preliminary Specification describes products that are not in full production at the time of printing. Specifications are based on design goals and
limited characterization. They may change without notice. Contact Fairchild Semiconductor for current information.
Preliminary Information
Features
FAN1084
PRODUCT SPECIFICATION
Pin Assignments
FAN1084M-1.5
FRONT VIEW
FAN1084T
FAN1084T-1.5
FRONT VIEW
FRONT VIEW
FAN1084M
FRONT VIEW
1
2
3
1
2
3
Preliminary Information
Tab is OUT.
1
2
GND
3
1
IN
ADJ
2
3
IN
ADJ OUT IN
3-Lead Plastic TO-263
ΘJC=10°C/W*
GND OUT IN
3-Lead Plastic TO-220
ΘJC=3°C/W*
*With package soldered to 0.5 square inch copper area over backside ground plane or internal power plane, ΘJA can vary from
30°C/W to more than 40°C/W. Other mounting techniques may provide better power dissipation than 30°C/W.
Absolute Maximum Ratings
Parameter
Min.
Max.
Unit
7
V
0
125
°C
–65
150
°C
300
°C
VIN
Operating Junction Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 seconds)
2
PRODUCT SPECIFICATION
FAN1084
Electrical Characteristics
Operating Conditions: 4.75 ≤ VIN < 5.25V, Tj = 25°C unless otherwise specified.
Parameter
3
Reference Voltage
5
Output Voltage
1, 2
Conditions
Min.
Typ.
Max
Units
Adj connected to ground, IOUT = 10mA
1.23
1.250
1.27
V
IOUT = 10mA
1.475
1.5
1.525
V
Line Regulation
IOUT = 10mA
0.5
2
%
Load Regulation1, 2
10mA ≤ IOUT ≤ 4.5A
0.5
2.5
%
Dropout Voltage
∆VREF = 2%, IOUT = 4.5A
1.5
V
Current Limit
(VIN – VOUT) = 2V
Adjust Pin
5.5
Current3
35
A
100
µΑ
10
mA
VIN = 5V
4
mA
Thermal Resistance,
Junction to Case
TO-220
3
°C/W
TO-263
10
°C/W
150
°C
Mimimum Load
4
Thermal Shutdown
Notes:
1. See thermal regulation specifications for changes in output voltage due to heating effects. Load and line regulation are
measured at a constant junction temperature by low duty cycle pulse testing.
2. Line and load regulation are guaranteed up to the maximum power dissipation. Power dissipation is determined by input/
output differential and the output currrent. Guaranteed maximum output power will not be available over the full input/output
voltage range.
3. FAN1084 only.
4. Guaranteed by design.
5. FAN1084-1.5 only.
Typical Performance Characteristics
20
POWER (W)
TO-220
15
10
5
TO-263
0
25
45
65
85
105
125
CASE TEMPERATURE
Figure 1. Maximum Power Dissipation
3
Preliminary Information
1.5V ≤ (VIN – VOUT) ≤ 5.75V
Quiescent Current4
Current4
FAN1084
Applications Information
General
Preliminary Information
The FAN1084 and FAN1084-1.5 are three-terminal regulators optimized for GTL+ VTT termination and logic applications. These devices are short-circuit protected, and offer
thermal shutdown to turn off the regulator when the junction
temperature exceeds about 150°C. The FAN1084 series provides low dropout voltage and fast transient response. Frequency compensation uses capacitors with low ESR while
still maintaining stability. This is critical in addressing the
needs of low voltage high speed microprocessor buses like
GTL+.
PRODUCT SPECIFICATION
The adjust pin can be driven on a transient basis ±7V with
respect to the ouput, without any device degradation. As with
any IC regulator, exceeding the maximum input-to-output
voltage differential causes the internal transistors to break
down and none of the protection circuitry is then functional.
D1
1N4002
(OPTIONAL)
FAN1084
VIN
+
IN
C1
10µF
OUT
+
ADJ
R1
VOUT
C2
22µF
Stability
The FAN1084 series requires an output capacitor as a part of
the frequency compensation. It is recommended to use a 22µF
solid tantalum or a 100µF aluminum electrolytic on the output
to ensure stability. The frequency compensation of these devices
optimizes the frequency response with low ESR capacitors.
In general, it is suggested to use capacitors with an ESR of
<1Ω. It is also recommended to use bypass capacitors such
as a 22µF tantalum or a 100µF aluminum on the adjust pin of
the FAN1084 for low ripple and fast transient response.
When these bypassing capacitors are not used at the adjust
pin, smaller values of output capacitors provide equally good
results.
+ CADJ
R2
D1
1N4002
(OPTIONAL)
FAN1084-1.5
VIN
+
IN
C1
10µF
OUT
GND
+
VOUT
C2
22µF
Protection Diodes
In normal operation, the FAN1084 series does not require
any protection diodes. For the FAN1084, internal resistors
limit internal current paths on the adjust pin. Therefore, even
with bypass capacitors on the adjust pin, no protection diode
is needed to ensure device safety under short-circuit conditions.
A protection diode between the input and output pins is usually not needed. An internal diode between the input and the
output pins on the FAN1084 series can handle microsecond
surge currents of 50A to 100A. Even with large value output
capacitors it is difficult to obtain those values of surge currents in normal operation. Only with large values of output
capacitance, such as 1000µF to 5000µF, and with the input
pin instantaneously shorted to ground can damage occur. A
crowbar circuit at the input can generate those levels of current; a diode from output to input is then recommended, as
shown in Figure 2. Usually, normal power supply cycling or
system “hot plugging and unplugging” will not generate current large enough to do any damage.
4
Figure 2. Optional Protection
Ripple Rejection
In applications that require improved ripple rejection, a bypass
capacitor from the adjust pin of the FAN1084 to ground
reduces the output ripple by the ratio of VOUT/1.25V. The
impedance of the adjust pin capacitor at the ripple frequency
should be less than the value of R1 (typically in the range of
100Ω to 120Ω) in the feedback divider network in Figure 2.
Therefore, the value of the required adjust pin capacitor is a
function of the input ripple frequency. For example, if R1
equals 100Ω and the ripple frequency equals 120Hz, the
adjust pin
capacitor should be 22µF. At 10kHz, only 0.22µF is needed.
Output Voltage
The FAN1084 regulator develops a 1.25V reference voltage
between the ouput pin and the adjust pin (see Figure 3). Placing
a resistor R1 between these two terminals causes a constant
current to flow through R1 and down through R2 to set the
overall output voltage. Normally, this current is the specified
minimum load current of 10mA.
PRODUCT SPECIFICATION
FAN1084
The current out of the adjust pin adds to the current from R1.
Its output voltage contribution is small and only needs consideration when a very precise output voltage setting is required.
RP
Parasitic
Line Resistance
FAN1084
VIN
FAN1084
VIN
+
IN
C1
10µF
OUT
+
ADJ
VREF
IADJ
35µA
R1
IN
OUT
ADJ
VOUT
C2
22µF
R1*
*Connect R1 to case
Connect R2 to load
R2
RL
R2*
VOUT = VREF (1 + R2/R1) + IADJ (R2)
Figure 3. Basic Regulation Circuit
Figure 5. Connection for Best load Regulation
It is not possible to provide true remote load sensing because
the FAN1084 series are three-terminal devices. Load regulation is limited by the resistance of the wire connecting the regulator to the load. Load regulation per the data sheet
specification is measured at the bottom of the package.
For fixed voltage devices, negative side sensing is a true
Kelvin connection with the ground pin of the device returned
to the negative side of the load. This is illustrated in Figure 4.
RP
Parasitic
Line Resistance
FAN1084-1.5
VIN
IN
OUT
GND
RL
Thermal Conditions
The FAN1084 series protect themselves under overload conditions with internal power and thermal limiting circuitry.
However, for normal continuous load conditions, do not
exceed maximum junction temperature ratings. It is important to consider all sources of thermal resistance from junction-to-ambient. These sources include the junction-to-case
resistance, the case-to-heatsink interface resistance, and the
heat sink resistance. Thermal resistance specifications have
been developed to more accurately reflect device temperature and ensure safe operating temperatures. The electrical
characteristics section provides a separate thermal resistance
and maximum junction temperature for both the control circuitry and the power transistor. Calculate the maximum junction temperature for both sections to ensure that both thermal
limits are met.
For example, look at using an FAN1084T to generate 4.5A
@ 1.5V from a 3.3V source (3.2V to 3.6V).
Figure 4. Connection for Best Load Regulation
Assumptions
For adjustable voltage devices, negative side sensing is a true
Kelvin connection with the bottom of the output divider
returned to the negative side of the load. The best load regulation is obtained when the top of the resistor divider R1 connects
directly to the regulator output and not to the load. Figure 5
illustrates this point.
If R1 connects to the load, then the effective resistance
between the regulator and the load would be:
RP X (1 + R2/R1), RP = Parasitic Line Resistance
The connection shown in Figure 5 does not multiply RP by the
divider ration. As an example, RP is about four milliohms per
foot with 16-gauge wire. This translates to 4mV per foot at 1A
load current. At higher load currents, this drop represents a
significant percentage of the overall regulation. It is important
to keep the positive lead between the regulator and the load as
short as possible and to use large wire or PC board traces.
•
•
•
•
•
VIN = 3.6V worst case
VOUT = 1.475V worst case
IOUT = 4.5A continuous
TA = 60°C
θCase-to-Ambient = 5°C/W (assuming both a heatsink and
a thermally conductive material)
The power dissipation in this application is:
PD = (VIN – VOUT) * (IOUT) = (3.6 – 1.475) * (4.5) = 9.6W
From the specification table:
TJ = TA + (PD) * (θCase-to-Ambient + θJC)
= 60 + (9.6) * (5 + 3) = 137°C
The junction temperature is below the maximum thermal
limit.
5
Preliminary Information
Load Regulation
FAN1084
PRODUCT SPECIFICATION
Junction-to-case thermal resistance is specified from the IC
junction to the bottom of the case directly below the die. This
is the lowest resistance path for heat flow. Proper mounting
ensures the best thermal flow from this area of the package to
the heat sink. Use of a thermally conductive material at the
case-to-heat sink interface is recommended. Use a thermally
conductive spacer if the case of the device must be electrically isolated and include its contribution to the total thermal
resistance. The cases of the FAN1084 series are directly connected to the output of the device.
U1
FAN1084
VIN = 3.3V
+
VIN
C1
10µF
VOUT
R1
124Ω
ADJ
Preliminary Information
+ C2
100µF
+
VOUT
C3 2.5V
100µF
R2
124Ω
Figure 6. Application Circuit
Table 1. Bill of Materials for Application Circuit for the FAN1084
Item
Quantity
Manufacturer
Part Number
Description
C1
1
Xicon
L10V10
10µF, 10V Aluminum
C2, C3
2
Xicon
L10V100
100µF, 10V Aluminum
R1, R2
2
Generic
U1
1
Fairchild
124Ω, 1%
FAN1084T
4.5A Regulator
U1
FAN1084-1.5
VIN = 3.3V
VIN
C1
10µF
+
VOUT 1.5V
VOUT
+
GND
C2
100µF
Figure 7. Application Circuit (FAN1084-1.5)
Table 2. Bill of Materials for Application Circuit for the FAN1084-1.5
6
Item
Quantity
Manufacturer
Part Number
Description
C1
1
Xicon
L10V10
10µF, 10V Aluminum
C2
1
Xicon
L10V100
100µF, 10V Aluminum
U1
1
Fairchild
FAN1084T-1.5
4.5A Regulator
FAN1084
PRODUCT SPECIFICATION
Mechanical Dimensions
3-Lead TO-263 Center Cut Package
Symbol
Inches
Min.
Preliminary Information
A
b
b2
c2
D
E
e
L
Max.
.160
.190
.020
.039
.049
.051
.045
.055
.340
.380
.380
.405
.100 BSC
.575
.625
.090
.110
—
.055
.017
.019
0°
8°
L1
L2
R
α
Millimeters
Min.
Max.
4.06
4.83
0.51
0.99
1.25
1.30
1.14
1.40
8.64
9.65
9.65
10.29
2.54 BSC
14.61
15.88
2.29
2.79
—
1.40
0.43
0.48
0°
8°
E
@PKG/
@HEATSINK
Notes:
Notes
1.
Dimensions are exclusive of mold flash and metal burrs.
2.
Standoff-height is measured from lead tip with ref. to Datum -B-.
3.
Foot length ismeasured with ref. to Datum -A- with lead surface (at
inner R).
4.
Dimension exclusive of dambar protrusion or intrusion.
5.
Formed leads to be planar with respect to one another at seating
place -C-.
L2
c2
D
E-PIN
L
R (2 PLCS)
b2
L1
b
e
-B-
A
-C-
7
-A-
FAN1084
PRODUCT SPECIFICATION
Mechanical Dimensions (continued)
3-Lead TO-220 Package
Inches
Symbol
Preliminary Information
A
b
b1
c1
øP
D
E
e
e1
e3
F
H1
J1
L
L1
Q
α
Millimeters
Min.
Max.
Min.
Max.
.140
.015
.045
.014
.139
.560
.380
.090
.190
.045
.020
.230
.060
.190
.040
3.56
.38
1.14
.36
3.53
14.22
9.65
2.29
4.83
1.14
.51
5.94
2.04
4.83
1.02
.070
.022
.161
.650
.420
.110
.210
—
.055
.270
.115
.500
.580
.250 BSC
1.00
1.35
3°
7°
Notes
1.78
.56
4.09
16.51
10.67
2.79
5.33
—
1.40
6.87
2.92
12.70
14.73
6.35 BSC
2.54
3.43
3°
7°
Notes:
1. Dimension c1 apply for lead finish.
H1
Q
L
e3
b1
e
e1
E
b
L1
E-PIN
øP
α (5X)
c1
A
J1
F
D
8
FAN1084
PRODUCT SPECIFICATION
Ordering Information
Package
FAN1084MC
TO-263
FAN1084T
TO-220
FAN1084MC-1.5
TO-263
FAN1084T-1.5
TO-220
Preliminary Information
Product Number
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
8/6/99 0.0m 003
Stock#DS30001584
 1998 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN1086
Features
Description
•
•
•
•
•
•
The FAN1086 and FAN1086-2.5, -2.85, -3.3 and -5 are low
dropout three-terminal regulators with 1.5A output current
capability. These devices have been optimized for low voltage
where transient response and minimum input voltage are
critical. The 2.85V version is designed specifically to be
used in Active Terminators for SCSI bus.
Low dropout voltage
Load regulation: 0.05% typical
Trimmed current limit
On-chip thermal limiting
Standard SOT-223 and TO-263 packages
Three-terminal adjustable or fixed 2.5V, 2.85V, 3.3V, 5V
Current limit is trimmed to ensure specified output current
and controlled short-circuit current. On-chip thermal limiting
provides protection against any combination of overload and
ambient temperatures that would create excessive junction
temperatures.
Applications
•
•
•
•
•
•
Active SCSI terminators
High efficiency linear regulators
Post regulators for switching supplies
Battery chargers
5V to 3.3V linear regulators
Motherboard clock supplies
Unlike PNP type regulators where up to 10% of the output
current is wasted as quiescent current, the quiescent current
of the FAN1086 flows into the load, increasing efficiency.
The FAN1086 series regulators are available in the industrystandard SOT-223 and TO-263 power packages.
Typical Applications
FAN1086
VIN = 3.3V
VIN
+
VOUT
1.5V at 1.5A
+
10µF
22µF
124Ω
ADJ
24.9Ω
FAN1086-2.85
VIN = 5V
+
VIN
VOUT
10µF
2.85V at 1.5A
+
22µF
GND
Target Specification describes products that are in the definition stage. Specifications may
change in any manner without notice. Contact Fairchild Semiconductor for current information.
REV. 0.0.2
Target Specification
1.5A Adjustable/Fixed Low Dropout Linear Regulator
TARGET SPECIFICATION
FAN1086
Pin Assignments
Tab is
VOUT
Front View
Tab is
VOUT
3
IN
2
OUT
1
ADJ/GND
Target Specification
4-Lead Plastic SOT-223
ΘJC = 15°C/W*
1
2
3
ADJ/
GND
OUT
IN
3-Lead Plastic TO-263
ΘJC = 10°C/W*
*With package soldered to 0.5 square inch copper area over backside ground plane or internal power plane., ΘJA can vary from
30°C/W to more than 50°C/W. Other mounting techniques may provide better thermal resistance than 30°C/W.
Absolute Maximum Ratings
Parameter
Min.
Max.
Unit
7.5
V
0
125
°C
-65
150
°C
300
°C
VIN
Operating Junction Temperature Range
Storage Temperature Range
Lead Temperature (Soldering, 10 sec.)
2
REV. 0.0.2 11/23/99
FAN1086
TARGET SPECIFICATION
Electrical Characteristics
Parameter
Conditions
Voltage3
Min.
Typ.
Max.
Units
1.5V ≤ (VIN - VOUT) ≤ 5.75V,
10mA ≤ IOUT ≤ 1A
•
1.225
(-2%)
1.250
1.275
(+2%)
V
10mA ≤ IOUT ≤ 1A
FAN1086-2.5, 4V ≤ VIN ≤ 7V
FAN1086-2.85, 4.35V ≤ VIN ≤ 7V
FAN1086-3.3, 4.8V ≤ VIN ≤ 7V
FAN1086-5, 6.5V ≤ VIN ≤ 7V
•
•
•
•
2.450
2.793
3.234
4.900
2.5
2.85
3.3
5.0
2.550
2.907
3.366
5.100
V
V
V
V
(VOUT + 1.5V) ≤ VIN ≤ 7V, IOUT = 10mA
•
0.005
0.2
%
Load Regulation
(VIN – VOUT) = 2V, 10mA ≤ IOUT ≤ 1A
•
0.05
0.5
%
Dropout Voltage
∆VREF = 1%, IOUT = 1.5A
•
1.300
1.500
V
Current Limit
(VIN – VOUT) = 2V
•
Reference
Output Voltage
Line Regulation1,2
1,2
Adjust Pin Current3
µA
0.2
5
µA
•
Minimum Load Current
1.5V ≤ (VIN – VOUT) ≤ 5.75
•
•
VIN = VOUT + 1.25V
f = 120Hz, COUT = 22µF Tantalum,
(VIN – VOUT) = 3V, IOUT = 1.5A
Thermal Regulation
TA = 25°C, 30ms pulse
10
mA
4
60
13
72
0.004
•
Temperature Stability
A
120
1.5V ≤ (VIN – VOUT) ≤ 5.75,
10mA ≤ IOUT ≤ 1A
Quiescent Current
2.0
35
Adjust Pin Current Change3
Ripple Rejection
1.6
•
mA
dB
0.02
0.5
%/W
%
Long-Term Stability
TA = 125°C, 1000hrs.
0.03
RMS Output Noise
(% of VOUT)
TA = 25°C, 10Hz ≤ f ≤ 10kHz
0.003
%
Thermal Resistance,
Juncation to Case
SOT-223
15
°C/W
TO-263
10
°C/W
Thermal Shutdown
Junction Temperature
155
°C
10
°C
Thermal Shutdown
Hysteresis
1.0
%
Notes:
1. See thermal regulation specifications for changes in output voltage due to heating effects. Load and line regulation are
measured at a constant junction temperature by low duty cycle pulse testing.
2. Line and load regulation are guaranteed up to the maximum power dissipation (18W). Power dissipation is determined by
input/output differential and the output current. Guaranteed maximum output power will not be available over the full input/
output voltage range.
3. FAN1086 only.
REV. 0.0.2 11/23/99
3
Target Specification
Operating Conditions: VIN ≤ 7V, TJ = 25°C unless otherwise specified.
The • denotes specifications which apply over the specified operating temperature range.
TARGET SPECIFICATION
FAN1086
Typical Performance Characteristics
0.10
DROPOUT VOLTAGE DEVIATION (%)
DROPOUT VOLTAGE (V)
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
Target Specification
0
0
0.3
0.6
0.9
1.2
0
-0.05
-0.10
-0.15
-0.20
-75 -50 -25 0
1.5
OUTPUT CURRENT (A)
Figure 2. Load Regulation vs. Temperature
1.250
3.70
1.245
3.65
1.240
1.235
1.230
1.225
1.220
1.215
1.210
VOUT = 3.6V1
3.60
3.55
3.50
3.45
3.40
3.35
VOUT = 3.3V
3.30
3.25
1.200
-75 -50 -25 0
3.20
-75 -50 -25 0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Figure 4. Output Voltage vs. Temperature
100
Note:
1. FAN1086 Only
90
ADJUST PIN CURRENT (µA)
MINIMUM LOAD CURRENT (mA)
Note:
1. FAN1086 Only
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
5
4
3
2
1
80
70
60
50
40
30
20
10
0
-75 -50 -25 0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Figure 5. Minimum Load Current vs. Temperature
4
VOUT SET WITH 1% RESISTORS
1.205
Figure 3. Reference Voltage vs. Temperature
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
Figure 1. Dropout Voltage vs. Output Current
∆I = 1A
0.05
0
-75 -50 -25 0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Figure 6. Adjust Pin Current vs. Temperature
REV. 0.0.2 11/23/99
FAN1086
TARGET SPECIFICATION
Typical Performance Characteristics (continued)
90
80
1.75
1.5
1.25
70
60
50
40
30
20
10
1.0
-75 -50 -25 0
(VIN - VOUT) = 3V
0.5 < VRIPPLE < 2V
IOUT = 1A
0
10
25 50 75 100 125 150 175
100
JUNCTION TEMPERATURE (°C)
1K
10K
100K
Target Specification
RIPPLE REJECTION (dB)
SHORT-CIRCUIT CURRENT (A)
2.0
FREQUENCY (Hz)
Figure 7. Short-Circuit Current vs. Temperature
Figure 8. Ripple Rejection vs. Frequency
10
POWER (W)
7.5
TO-263
5
SOT-223
2.5
0
25
45
65
85
105
125
CASE TEMPERATURE (°C)
Figure 9. Maximum Power Dissipation
REV. 0.0.2 11/23/99
5
TARGET SPECIFICATION
FAN1086
Mechanical Dimensions
3-Lead TO-263 Package
Symbol
Inches
Min.
Target Specification
A
b
b2
c2
D
E
e
L
Max.
.160
.190
.020
.039
.049
.051
.045
.055
.340
.380
.380
.405
.100 BSC
.575
.625
.090
.100
—
.055
.017
.019
0°
8°
L1
L2
R
α
Millimeters
Min.
Max.
4.06
4.83
0.51
0.99
1.25
1.30
1.14
1.40
8.64
9.65
9.65
10.29
2.54 BSC
14.61
10.88
2.29
2.79
—
1.40
0.43
0.48
0°
8°
E
@PKG/
@HEATSINK
Notes:
Notes
1.
Dimensions are exclusive of mold flash and metal burrs.
2.
Stand off-height is measured from lead tip with ref. to Datum -B-.
3.
Foot length is measured with ref. to Datum -A- with lead surface
(at inner R).
4.
Dimension exclusive of dambar protrusion or intrusion.
5.
Formed leads to be planar with respect to one another at seating
place -C-.
L2
c2
D
E-PIN
L
R (2 PLCS)
b2
L1
b
e
-B-
-A-
A
-C-
6
REV. 0.0.2 11/23/99
FAN1086
TARGET SPECIFICATION
Mechanical Dimensions
4-Lead SOT-223 Package
A
A1
B
c
D
E
e
F
H
I
J
K
L
M
N
Millimeters
Min.
Max.
Min.
Max.
—
—
.025
—
.248
.130
.071
.181
1.80
4.80
.033
.090
.264
.148
—
—
.640
—
6.30
3.30
.840
2.29
6.71
3.71
.115
.033
.264
.012
—
10°
.0008
10°
.010
.124
.041
.287
—
10°
16°
.0040
16°
.014
2.95
.840
6.71
.310
—
10°
.0203
10°
.250
3.15
1.04
7.29
—
10°
16°
.1018
16°
.360
Notes
D
e
K
A
H
E
N
J
M
B
I
L
A1
c
REV. 0.0.2 11/23/99
F
7
Target Specification
Inches
Symbol
TARGET SPECIFICATION
FAN1086
Ordering Information
Package
FAN1086M
TO-263
FAN1086S
SOT-223
FAN1086M-2.5
TO-263
FAN1086S-2.5
SOT-223
FAN1086M-2.85
TO-263
FAN1086S-2.85
SOT-223
FAN1086M-3.3
TO-263
FAN1086S-3.3
SOT-223
FAN1086M-5
TO-263
FAN1086S-5
SOT-223
Target Specification
Product Number
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
11/23/99 0.0m 004
Stock#DS30001117
 1998 Fairchild Semiconductor Corporation
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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
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QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
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CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
SyncFET™
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
www.fairchildsemi.com
FAN1581
5A Adjustable/Fixed Ultra Low Dropout
Linear Regulator
Description
•
•
•
•
•
•
•
The FAN1581, FAN1581-1.5, and FAN1581-2.5 are ultra-low
dropout regulators with 5A output current capability. These
devices have been optimized for low voltage applications
including VTT bus termination, where transient response and
minimum input voltage are critical. The FAN1581 is ideal
for low voltage microprocessor applications requiring a regulated output from 1.3V to 5.7V with a power input supply
of 1.75V to 6.5V. The FAN1581-1.5 offers fixed 1.5V with
5A current capabilities for GTL+ bus VTT termination. The
FAN1581-2.5 offers fixed 2.5V with 5A current capability
for logic IC operation and processors while minimizing the
overall power dissipation.
Ultra Low dropout voltage, 0.4V typical at 5A
Remote sense operation
Fast transient response
Load regulation: 0.05% typical
0.5% initial accuracy
On-chip thermal limiting
5 Pin standard TO-220 and TO-263 packages
Applications
•
•
•
•
•
•
•
Pentium® Processors
PowerPC™, AMD K5 and K6 processors
Pentium support of GTL+ bus supply
Low voltage logic supply
Embedded Processor supplies
Split plane regulator
New 2.5V and 1.8V Logic Families
Current limit ensures controlled short-circuit current. On-chip
thermal limiting provides protection against any combination
of overload and ambient temperature that would create excessive junction temperatures.
The FAN1581 series regulators are available in the industrystandard 5-Pin TO-220 and TO-263 power packages.
Typical Applications
VIN = 3.0V
+
10µF
VIN = 3.3V
+
10µF
VCNTL = 5V
VIN
+
22µF
2.1V at 5A
VCNTL
Adj
2.5V at 5A
+
GND
1µF
FAN1581
VOUT
VSENSE
FAN1581–2.5
VOUT
VCNTL
VCNTL = 3.3V
VSENSE
VIN
+
86.6Ω
22µF
VIN = 5.75V
+
124Ω
10µF
VCNTL = 12V
VIN
VSENSE
FAN1581
VOUT
5V at 5A
VCNTL
Adj
+
374Ω
22µF
124Ω
Pentium is a registered trademark of Intel Corporation. PowerPC is a trademark of IBM Corporation.
Rev. 0.8.0
PRELIMINARY SPECIFICATION describes products that are not in full production at time of printing. Specifications are based on design goals and
limited characterization. In the process of final production release, specifications may change. Contact Fairchild Semiconductor for current information.
Preliminary Specification
Features
FAN1581
PRODUCT SPECIFICATION
Pin Assignments
FAN1581T
FAN1581T-1.5, -2.5
FRONT VIEW
FAN1581M-1.5, -2.5
FAN1581M
FRONT VIEW
FRONT VIEW
Preliminary Specification
1 2
1 2 3 4 5
1 2 3 4 5
S
S
OUT
GND
IN
CNTL
OUT
Adj
S
IN
5-Lead Plastic TO-263
ΘJC=3°C/W*
3 4 5
OUT
Adj
CNTL
FRONT VIEW
3 4 5
1 2
S
IN
OUT
GND
CNTL
IN
CNTL
5-Lead Plastic TO-220
ΘJC=3°C/W*
*With package soldered to 0.5 square inch copper area over backside ground plane or internal
power plane. ΘJA can vary fom 20°C/W to >40°C/W with other mounting techniques.
Pin Definitions
Pin Number
Pin Name
1
VSense
2
ADJ/GND
Pin Function Descrition
Remote Voltage Sense. Connect this pin to the load to permit true
remote sensing and avoid trace drops.
Adjust or Ground. On the FAN1581, this pin forms the feedback to
determine the output voltage. On the FAN1581-1.5 and -2.5, connect this
pin to ground.
3
VOUT
Output Voltage. This pin and the tab are output.
4
VCNTL
Control Voltage. This pin draws small-signal power to control the
FAN1581 circuitry. Connect to a voltage higher than VIN, as shown in the
applications circuits.
5
VIN
Input Voltage.
Internal Block Diagram
4
VCNTL, Control
5 Vin, Power
Thermal
Shutdown
Current
Limit
Vref
2
Voltage Loop
Amplifier
3 Output
1 Sense
2 Adj
PRODUCT SPECIFICATION
FAN1581
Absolute Maximum Ratings
Parameter
Min.
VIN
VCNTL
Operating Junction Temperature Range
0
Lead Temperature (Soldering, 10 sec.)
Storage Temperature Range
-65
Max.
Unit
7
V
13.2
V
125
°C
300
°C
150
°C
Electrical Characteristics
Parameter
Reference Voltage3
Reference Voltage3
Adjustable Output Voltage
Output Voltage4
Output Voltage5
Line Regulation1,2
Load Regulation1,2
Dropout Voltage Minimum VCNTL
Dropout Voltage Minimum VIN
Dropout Voltage Minimum VIN
Current Limit
Control Pin Current
Adjust Pin Current3
Minimum Load Current
Ripple Rejection
Thermal Resistance, Junction to
Case
Thermal Regulation
Thermal Shutdown
Conditions
VIN = 2.0V, VCNTL = 2.75V,
IOUT = 10mA
2.05V ≤ VIN ≤ 5.5V,
2.7V ≤ VCNTL ≤ 12V,
10mA ≤ IOUT ≤ 5A
3V ≤ VIN ≤ 7V (function of Vout),
10mA ≤ IOUT ≤ 5A
3V ≤ VIN ≤ 7V, 10mA ≤ IOUT ≤ 5A
5.1V ≤ VIN ≤ 7V, 10mA ≤ IOUT ≤ 5A
1.75V ≤ VIN ≤ 5.5V, 2.5V ≤ VCNTL ≤ 12V,
IOUT = 10mA
VIN = 2.1V, VCNTL = 2.75V,
10mA ≤ IOUT ≤ 5A
VIN = 2.05V, ∆VREF = 1%, IOUT = 5A
VCNTL = 2.75V, ∆VREF = 1%,
IOUT = 5A
VCNTL = 2.75V, ∆VREF = 1%,
IOUT = 5A
VIN = 2.05V, VCNTL = 2.75V
VIN = 2.05V, VCNTL = 2.75V,
IOUT = 10mA
VIN = 2.05V, VCNTL = 2.75V
VIN = 3.3V, VCNTL = 5V
VIN = 3.75V, VCNTL = 3.75V, f = 120Hz,
COUT = 22µF Tantalum, IOUT = 2.5A
Min.
1.243
Typ.
1.250
Max.
1.257
Units
V
•
1.237
1.250
1.263
V
•
Vref
1.5
5.7
V
•
•
•
1.47
2.474
1.5
2.5
1
1.53
2.526
3
V
V
mV
•
1
5
mV
•
1.05
0.4
1.18
0.5
V
V
•
0.5
0.6
V
30
120
A
µA
50
5.0
80
120
10
•
•
5.2
•
•
60
3
TA = 25°C, 30ms pulse
0.002
150
mA
mA
dB
°C/W
0.02
%/W
°C
Notes:
1. See thermal regulation specifications for changes in output voltage due to heating effects. Load and line regulation are
measured at a constant junction temperature by low duty cycle pulse testing.
2. Line and load regulation are guaranteed up to the maximum power dissipation (18W). Power dissipation is determined by
input/output differential and the output current. Guaranteed maximum output power will not be available over the full input/
output voltage range.
3. FAN1581 only.
4. FAN1581-1.5 only.
5. FAN1581-2.5 only.
3
Preliminary Specification
TJ=25°C, VOUT = VS, VADJ = 0V unless otherwise specified.
The • denotes specifications which apply over the specified operating temperature range.
FAN1581
PRODUCT SPECIFICATION
1.0
DROPOUT VOLTAGE (V)
0.9
0.8
0.7
0.6
T=0°C
0.5
0.4
T=25°C
0.3
0.2
0.1
0.0
0
Preliminary Specification
T=125°C
1
2
3
4
OUTPUT VOLTAGE DEVIATION (%)
Typical Perfomance Characteristics
5
OUTPUT CURRENT (A)
0.10
0
-0.05
-0.10
-0.15
-0.20
-75 -50 -25
0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Load Regulation vs. Temperature
1.275
3.70
1.270
1.265
1.260
1.255
3.65
3.60
3.55
3.50
OUTPUT VOLTAGE (V)
REFERENCE VOLTAGE
Dropout Voltage vs. Output Current
1.250
1.245
1.240
1.235
1.230
1.225
∆Ι=5A
0.05
VOUT set with
1% resistors
3.45
3.40
3.35
3.30
3.25
3.20
-75 -50 -25
0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
VOUT = 3.3V1
-75 -50
100
10
8
6
4
2
0
-75 -50 -25 0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Mimimum Load Current vs. Temperature
4
-25 0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Output Voltage vs. Temperature
ADJUST PIN CURRENT (µA)
MINIMUM LOAD CURRENT (mA)
Reference Voltage vs. Temperature
Note:
1. FAN1581 Only
Note:
1. FAN1581 Only
90
80
70
60
50
40
30
20
10
0
-75 -50
-25
0
25 50
75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Adjust Pin Current vs. Temperature
PRODUCT SPECIFICATION
FAN1581
Typical Perfomance Characteristics (continued)
90
RIPPLE REJECTIONS (dB)
90
9
7
5
70
60
50
40
30
(VIN—VOUT) ≤ 3V
20
0.5V ≤ VRIPPLE ≤ 2V
10
3
IOUT = 5A
0
-75 -50 -25 0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
10
Short-Circuit Current vs.Temeperature
100
1K
10K
FREQUENCY (HZ)
100K
Ripple Rejection vs. Frequency
20
POWER (W)
15
10
5
0
25
45
65
85
105
CASE TEMPERATURE
125
Maximum Power Dissipation
General
The FAN1581, FAN1581-1.5, and FAN1581-2.5 are threeterminal regulators optimized for GTL+ VTT termination and
logic applications. These devices are short-circuit protected,
and offer thermal shutdown to turn off the regulator when the
junction temperature exceeds about 150°C. The FAN1581
series provides low dropout voltage and fast transient
response. Frequency compensation uses capacitors with low
ESR while still maintaining stability. This is critical in
addressing the needs of low voltage high speed microprocessor buses like GTL+.
Stability
The FAN1581 series requires an output capacitor as a part of
the frequency compensation. It is recommended to use a 22µF
solid tantalum or a 100µF aluminum electrolytic on the output
to ensure stability. The frequency compensation of these
devices optimizes the frequency response with low ESR capacitors. In general, it is suggested to use capacitors with an ESR
of <1Ω. It is also recommended to use bypass capacitors such
as a 22µF tantalum or a 100µF aluminum on the adjust pin of
the FAN1581 for low ripple and fast transient response. When
these bypassing capacitors are not used at the adjust pin, smaller
values of output capacitors provide equally good results.
Protection Diodes
In normal operation, the FAN1581 series does not require any
protection diodes. For the FAN1581, internal resistors limit
internal current paths on the adjust pin. Therefore, even with
bypass capacitors on the adjust pin, no protection diode is
needed to ensure device safety under short-circuit conditions.
5
Preliminary Specification
SHORT-CIRCUIT CURRENT (A)
11
FAN1581
PRODUCT SPECIFICATION
Preliminary Specification
A protection diode between the input and output pins is usually not needed. An internal diode between the input and the
output pins on the FAN1581 series can handle microsecond
surge currents of 50A to 100A. Even with large value output
capacitors it is difficult to obtain those values of surge currents in normal operation. Only with large values of output
capacitance, such as 1000µF to 5000µF, and with the input
pin instantaneously shorted to ground can damage occur. A
crowbar circuit at the input can generate those levels of current;
a diode from output to input is then recommended, as shown
in Figure 1. Usually, normal power supply cycling or system
“hot plugging and unplugging” will not generate current
large enough to do any damage.
The adjust pin can be driven on a transient basis ±7V with
respect to the output, without any device degradation. As with
any IC regulator, exceeding the maximum input-to-output
voltage differential causes the internal transistors to break
down and none of the protection circuitry is then functional.
100Ω and the ripple frequency equals 120Hz, the adjust pin
capacitor should be 22µF. At 10kHz, only 0.22µF is needed.
Output Voltage
The FAN1581 regulator develops a 1.25V reference voltage
between the output pin and the adjust pin (see Figure 2).
Placing a resistor R1 between these two terminals causes a
constant current to flow through R1 and down through R2 to
set the overall output voltage. Normally, this current is the
specified minimum load current of 10mA.
The current out of the adjust pin adds to the current from R1
and is typically 35µA. Its output voltage contribution is small
and only needs consideration when a very precise output
voltage setting is required.
Vcntl
Vcntl
Vsense
FAN1581
Vin Adj Vout
VIN
+
D1
1N4002
(OPTIONAL)
VOUT
VIN
Vcntl
+
C1
10µF
IADJ
50µA
Vin
+
R1
C2
22µF
R2
VOUT = VREF (1+R2/R1) + IADJ (R2)
Vsense
FAN1581
C1
10µF
VOUT
VREF
+
Adj Vout
R1
VOUT
C2
22µF
Figure 2. Basic Regulator Circuit
Load Regulation
+
R2
CADJ
The FAN1581 family provides true remote sensing, eliminating output voltage errors due to trace resistance. To utilize
remote sensing, connect the VSENSE pin directly to the
load, rather than at the VOUT pin. If the load is more than 1"
away from the FAN1581, it may be necessary to increase the
load capacitance to ensure stability.
D1
1N4002
(OPTIONAL)
Thermal Considerations
VCNTL
VIN
Vcntl
+
Vsense
FAN1581–1.5, 2.5
C1
10µF
Vin
Gnd Vout
+
VOUT
C2
22µF
Figure 1. Optional Protection Diode
Ripple Rejection
In applications that require improved ripple rejection, a bypass
capacitor from the adjust pin of the FAN1581 to ground
reduces the output ripple by the ratio of VOUT/1.25V. The
impedance of the adjust pin capacitor at the ripple frequency
should be less than the value of R1 (typically in the range of
100Ω to 120Ω) in the feedback divider network in Figure 1.
Therefore, the value of the required adjust pin capacitor is a
function of the input ripple frequency. For example, if R1 equals
6
The FAN1581 series protect themselves under overload conditions with internal power and thermal limiting circuitry.
However, for normal continuous load conditions, do not exceed
maximum junction temperature ratings. It is important to
consider all sources of thermal resistance from junction-toambient. These sources include the junction-to-case resistance,
the case-to-heat sink interface resistance, and the heat sink
resistance. Thermal resistance specifications have been
developed to more accurately reflect device temperature and
ensure safe operating temperatures. The electrical characteristics section provides a separate thermal resistance and
maximum junction temperature for both the control circuitry
and the power transistor. Calculate the maximum junction
temperature for both sections to ensure that both thermal
limits are met.
For example, look at using an FAN1581T-1.5 to generate 5A
@ 1.5V ± 2% from a 3.3V source (3.2V to 3.6V).
PRODUCT SPECIFICATION
FAN1581
Assumptions:
From the specification table,
•
•
•
•
•
TJ = TA + (PD) * (Θ Case-to-Ambient + ΘJC)
= 40 + (10.65) * (5 + 3) = 125°C
Vin = 3.6V worst case
VOUT = 1.47V worst case
IOUT = 5A continuous
TA = 40°C
Θ Case-to-Ambient = 5°C/W (assuming both a heatsink and
a thermally conductive material)
The power dissipation in this application is:
PD = (VIN - VOUT) * (IOUT) = (3.6-1.47) * (5) = 10.65W
The junction temperature is within the maximum rating.
U1
VIN = 3.3V
10µF
VIN
+
C1
VSENSE
FAN1581
VOUT
2.1V at 5A
VCNTL
VCNTL = 5V
1µF
C4
Adj
10µF
C3
+
R1
86.6Ω
R2
124Ω
100µF
C2
Figure 3. Application Circuit (FAN1581)
Table 1. Bill of Materials for Application Circuit for the FAN1581
Item
Quantity
Manufacturer
Part Number
Description
C1, C3
2
Xicon
L10V10
10µF, 10V Aluminum
C2
1
Xicon
L10V100
100µF, 10V Aluminum
C4
1
Any
1µF Ceramic
R1
1
Generic
86.6Ω, 1%
R2
1
Generic
124Ω, 1%
U1
1
Fairchild
FAN1581T
5A Regulator
7
Preliminary Specification
Junction-to-case thermal resistance is specified from the IC
junction to the bottom of the case directly below the die. This
is the lowest resistance path for heat flow. Proper mounting
ensures the best thermal flow from this area of the package to
the heat sink. Use of a thermally conductive material at the
case-to-heat sink interface is recommended. Use a thermally
conductive spacer if the case of the device must be electrically isolated and include its contribution to the total thermal
resistance.
FAN1581
PRODUCT SPECIFICATION
U1
VIN = 2.5V
10µF
C1
VIN
+
FAN1581–1.5
VOUT
VCNTL
VCNTL = 3.3V
1µF
VSENSE
1.5V at 5A
+
Adj
C2
100µF
C3
Preliminary Specification
Figure 4. Application Circuit (FAN1581-1.5)
Table 2. Bill of Materials for Application Circuit for the RC1581-1.5
Item
Quantity
Manufacturer
Part Number
Description
C1
1
Xicon
L10V10
10µF, 10V Aluminum
C2
1
Any
C3
1
Xicon
L10V100
100µF, 10V Aluminum
U1
1
Fairchild
FAN1581T-1.5
5A Regulator
1µF Ceramic
U1
VIN = 2.5V
+
10µF
C1
VIN
VSENSE
FAN1581–2.5
VOUT
VCNTL
VCNTL = 3.3V
+
2.5V at 5A
+
Adj
1µF
C2
100µF
C3
Figure 5. Application Circuit (FAN1581-2.5)
Table 3. Bill of Materials for Application Circuit for the RC1581-2.5
Item
8
Quantity
Manufacturer
Part Number
Description
C1
1
Xicon
L10V10
10µF, 10V Aluminum
C2
1
Any
C3
1
Xicon
L10V100
100µF, 10V Aluminum
U1
1
Fairchild
FAN1581T-2.5
5A Regulator
1µF Ceramic
PRODUCT SPECIFICATION
FAN1581
Mechanical Dimensions
5-Lead TO-263 Package
Symbol
Inches
Notes:
1. Dimensions are exclusive of mold flash and metal burrs.
2. Standoff-height is measured from lead tip with ref. to Datum –B-.
3. Foot length is measured with ref. to Datum –A- with lead surface
(at inner R).
4. Dimension exclusive of dambar protrusion or intrusion.
5. Formed leads to be planar with respect to one another at seating
place –C-.
Millimeters
Max.
Min.
Max.
.380
.405
9.65
10.29
B
.575
.625
14.60
15.88
C
.325
.380
8.25
9.66
D
–
.055
–
1.40
E
.020
.039
.50
.99
F
.060
.072
1.52
1.83
G
0.45
.055
1.14
1.40
H
.160
.190
4.06
4.83
J
.090
0.110
2.28
2.80
K
.018
.029
.457
.736
R
.017
.019
0.43
0.48
Preliminary Specification
Min.
A
A
D
G
C
E-PIN
B
E
R (2PLCS)
F
J
-B-
-A-
H
-C-
9
FAN1581
PRODUCT SPECIFICATION
Mechanical Demensions (continued)
5-Lead TO-220 Package
Inches
Preliminary Specification
Symbol
Millimeters
Min.
Max.
Min.
Max.
A
b
c1
øP
D
E
e
.140
.025
.190
.040
3.56
.63
4.83
1.02
.140
.139
.560
.380
.062
.220
.161
.650
.420
.072
.356
3.53
14.22
9.65
1.57
.559
4.09
16.51
10.67
1.83
e1
F
H1
J1
L
Q
α
.263
.045
.230
.080
.273
.055
.270
.115
6.68
1.14
5.84
2.04
6.94
1.40
6.87
2.92
.500
.100
3°
.580
.135
7°
12.70
.254
3°
14.73
.343
7°
Notes
Notes:
1. Dimension c1 apply for lead finish.
H1
Q
L
e
e1
E
b
E-PIN
øP
α (5X)
c1
A
J1
F
D
10
FAN1581
PRODUCT SPECIFICATION
Ordering Information
Package
FAN1581M
TO-263
FAN1581T
TO-220
FAN1581M-1.5
TO-263
FAN1581T-1.5
TO-220
FAN1581M-2.5
TO-263
FAN1581T-2.5
TO-220
Preliminary Specification
Product Number
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
1/20/00 0.0m 001
Stock#DS30001584
 1998 Fairchild Semiconductor Corporation
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
www.fairchildsemi.com
FAN1582
3A Adjustable/Fixed Ultra Low Dropout
Linear Regulator
Description
•
•
•
•
•
•
•
The FAN1582, FAN1582-1.5, and FAN1582-2.5 are ultra-low
dropout regulators with 3A output current capability. These
devices have been optimized for low voltage applications
including VTT bus termination, where transient response and
minimum input voltage are critical. The FAN1582 is ideal
for low voltage microprocessor applications requiring a regulated output from 1.3V to 5.7V with a power input supply
of 1.75V to 6.5V. The FAN1582-1.5 offers fixed 1.5V with
3A current capabilities for GTL+ bus VTT termination. The
FAN1582-2.5 offers fixed 2.5V with 3A current capability
for logic IC operation and processors while minimizing the
overall power dissipation.
Ultra Low dropout voltage, 0.4V typical at 3A
Remote sense operation
Fast transient response
Load regulation: 0.05% typical
0.5% initial accuracy
On-chip thermal limiting
5 Pin standard TO-220 and TO-263 packages
Applications
•
•
•
•
•
•
•
Pentium® Processors
PowerPC™, AMD K5 and K6 processors
Pentium support of GTL+ bus supply
Low voltage logic supply
Embedded Processor supplies
Split plane regulator
New 2.5V and 1.8V Logic Families
Current limit ensures controlled short-circuit current. On-chip
thermal limiting provides protection against any combination
of overload and ambient temperature that would create excessive junction temperatures.
The FAN1582 series regulators are available in the industrystandard 5-Pin TO-220 and TO-263 power packages.
Typical Applications
VIN = 3.0V
+
10µF
VIN = 3.3V
+
10µF
VCNTL = 5V
VIN
+
22µF
2.1V at 3A
VCNTL
Adj
2.5V at 3A
+
GND
1µF
FAN1582
VOUT
VSENSE
FAN1582–2.5
VOUT
VCNTL
VCNTL = 3.3V
VSENSE
VIN
+
86.6Ω
22µF
VIN = 5.75V
+
124Ω
10µF
VCNTL = 12V
VIN
VSENSE
FAN1582
VOUT
5V at 3A
VCNTL
Adj
+
374Ω
22µF
124Ω
Pentium is a registered trademark of Intel Corporation. PowerPC is a trademark of IBM Corporation.
Rev. 0.8.0
PRELIMINARY SPECIFICATION describes products that are not in full production at time of printing. Specifications are based on design goals and
limited characterization. In the process of final production release, specifications may change. Contact Fairchild Semiconductor for current information.
Preliminary Specification
Features
FAN1582
PRODUCT SPECIFICATION
Pin Assignments
FAN1582T
FAN1582T-1.5, -2.5
FRONT VIEW
FAN1582M-1.5, -2.5
FAN1582M
FRONT VIEW
FRONT VIEW
Preliminary Specification
1 2
1 2 3 4 5
1 2 3 4 5
S
S
OUT
GND
IN
CNTL
OUT
Adj
S
IN
5-Lead Plastic TP-263
ΘJC=3°C/W*
3 4 5
OUT
Adj
CNTL
FRONT VIEW
3 4 5
1 2
S
IN
OUT
GND
CNTL
IN
CNTL
5-Lead Plastic TP-220
ΘJC=3°C/W*
*With package soldered to 0.5 square inch copper area over backside ground plane or internal
power plane. ΘJA can vary fom 20°C/W to >40°C/W with other mounting techniques.
Pin Definitions
Pin Number
Pin Name
1
VSense
2
ADJ/GND
Pin Function Descrition
Remote Voltage Sense. Connect this pin to the load to permit true
remote sensing and avoid trace drops.
Adjust or Ground. On the FAN1582, this pin forms the feedback to
determine the output voltage. On the FAN1582-1.5 and -2.5, connect this
pin to ground.
3
VOUT
Output Voltage. This pin and the tab are output.
4
VCNTL
Control Voltage. This pin draws small-signal power to control the
FAN1582 circuitry. Connect to a voltage higher than VIN, as shown in the
applications circuits.
5
VIN
Input Voltage.
Internal Block Diagram
4
VCNTL, Control
5 Vin, Power
Thermal
Shutdown
Current
Limit
Vref
2
Voltage Loop
Amplifier
3 Output
1 Sense
2 Adj
PRODUCT SPECIFICATION
FAN1582
Absolute Maximum Ratings
Parameter
Min.
VIN
VCNTL
Operating Junction Temperature Range
0
Lead Temperature (Soldering, 10 sec.)
Storage Temperature Range
-65
Max.
Unit
7
V
13.2
V
125
°C
300
°C
150
°C
Electrical Characteristics
Parameter
Reference Voltage3
Reference Voltage3
Adjustable Output Voltage
Output Voltage4
Output Voltage5
Line Regulation1,2
Load Regulation1,2
Dropout Voltage Minimum VCNTL
Dropout Voltage Minimum VIN
Dropout Voltage Minimum VIN
Current Limit
Control Pin Current
Adjust Pin Current3
Minimum Load Current
Ripple Rejection
Thermal Resistance, Junction to
Case
Thermal Regulation
Thermal Shutdown
Conditions
VIN = 2.0V, VCNTL = 2.75V,
IOUT = 10mA
2.05V ≤ VIN ≤ 5.5V,
2.7V ≤ VCNTL ≤ 12V,
10mA ≤ IOUT ≤ 3A
3V ≤ VIN ≤ 7V (function of Vout),
10mA ≤ IOUT ≤ 3A
3V ≤ VIN ≤ 7V, 10mA ≤ IOUT ≤ 3A
5.1V ≤ VIN ≤ 7V, 10mA ≤ IOUT ≤ 3A
1.75V ≤ VIN ≤ 5.5V, 2.5V ≤ VCNTL ≤ 12V,
IOUT = 10mA
VIN = 2.1V, VCNTL = 2.75V,
10mA ≤ IOUT ≤ 3A
VIN = 2.05V, ∆VREF = 1%, IOUT = 3A
VCNTL = 2.75V, ∆VREF = 1%,
IOUT = 3A
VCNTL = 2.75V, ∆VREF = 1%,
IOUT = 3A
VIN = 2.05V, VCNTL = 2.75V
VIN = 2.05V, VCNTL = 2.75V,
IOUT = 10mA
VIN = 2.05V, VCNTL = 2.75V
VIN = 3.3V, VCNTL = 5V
VIN = 3.75V, VCNTL = 3.75V, f = 120Hz,
COUT = 22µF Tantalum, IOUT = 1.5A
Min.
1.243
Typ.
1.250
Max.
1.257
Units
V
•
1.237
1.250
1.263
V
•
Vref
1.5
5.7
V
•
•
•
1.47
2.474
1.5
2.5
1
1.53
2.526
3
V
V
mV
•
1
5
mV
•
1.05
0.4
1.18
0.5
V
V
•
0.5
0.6
V
30
120
A
µA
50
5.0
80
120
10
•
•
3.1
•
•
60
3
TA = 25°C, 30ms pulse
0.002
150
mA
mA
dB
°C/W
0.02
%/W
°C
Notes:
1. See thermal regulation specifications for changes in output voltage due to heating effects. Load and line regulation are
measured at a constant junction temperature by low duty cycle pulse testing.
2. Line and load regulation are guaranteed up to the maximum power dissipation (18W). Power dissipation is determined by
input/output differential and the output current. Guaranteed maximum output power will not be available over the full input/
output voltage range.
3. FAN1582 only.
4. FAN1582-1.5 only.
5. FAN1582-2.5 only.
3
Preliminary Specification
TJ=25°C, VOUT = VS, VADJ = 0V unless otherwise specified.
The • denotes specifications which apply over the specified operating temperature range.
FAN1582
PRODUCT SPECIFICATION
OUTPUT VOLTAGE DEVIATION (%)
Typical Perfomance Characteristics
1.0
DROPOUT VOLTAGE (V)
0.9
0.8
0.7
0.6
T=0°C
0.5
0.4
T=25°C
0
Preliminary Specification
T=125°C
0.3
0.2
0.1
0.0
0.5
1
1.5
2
2.5
3
OUTPUT CURRENT (A)
0.10
0
-0.05
-0.10
-0.15
-0.20
-75 -50 -25
0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Load Regulation vs. Temperature
1.275
3.70
1.270
1.265
3.65
3.60
OUTPUT VOLTAGE (V)
REFERENCE VOLTAGE
Dropout Voltage vs. Output Current
1.260
1.255
1.250
1.245
1.240
1.235
1.230
1.225
∆Ι=3A
0.05
VOUT set with
1% resistors
3.55
3.50
3.45
3.40
3.35
3.30
3.25
3.20
-75 -50 -25
0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
VOUT = 3.3V1
-75 -50
100
10
8
6
4
2
0
-75 -50 -25 0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Mimimum Load Current vs. Temperature
4
-25 0
25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Output Voltage vs. Temperature
ADJUST PIN CURRENT (µA)
MINIMUM LOAD CURRENT (mA)
Reference Voltage vs. Temperature
Note:
1. FAN1582 Only
Note:
1. FAN1582 Only
90
80
70
60
50
40
30
20
10
0
-75 -50
-25
0
25 50
75 100 125 150 175
JUNCTION TEMPERATURE (°C)
Adjust Pin Current vs. Temperature
PRODUCT SPECIFICATION
FAN1582
Typical Perfomance Characteristics (continued)
90
RIPPLE REJECTIONS (dB)
90
5
4
3
70
60
50
40
30
(VIN—VOUT) ≤ 3V
20
0.5V ≤ VRIPPLE ≤ 2V
10
2
IOUT = 3A
0
-75 -50 -25 0 25 50 75 100 125 150 175
JUNCTION TEMPERATURE (°C)
10
Short-Circuit Current vs.Temeperature
100
1K
10K
FREQUENCY (HZ)
100K
Ripple Rejection vs. Frequency
20
POWER (W)
15
10
5
0
25
45
65
85
105
CASE TEMPERATURE
125
Maximum Power Dissipation
General
The FAN1582, FAN1582-1.5, and FAN1582-2.5 are threeterminal regulators optimized for GTL+ VTT termination and
logic applications. These devices are short-circuit protected,
and offer thermal shutdown to turn off the regulator when the
junction temperature exceeds about 150°C. The FAN1582
series provides low dropout voltage and fast transient
response. Frequency compensation uses capacitors with low
ESR while still maintaining stability. This is critical in
addressing the needs of low voltage high speed microprocessor buses like GTL+.
Stability
The FAN1582 series requires an output capacitor as a part of
the frequency compensation. It is recommended to use a 22µF
solid tantalum or a 100µF aluminum electrolytic on the output
to ensure stability. The frequency compensation of these
devices optimizes the frequency response with low ESR capacitors. In general, it is suggested to use capacitors with an ESR
of <1Ω. It is also recommended to use bypass capacitors such
as a 22µF tantalum or a 100µF aluminum on the adjust pin of
the FAN1582 for low ripple and fast transient response. When
these bypassing capacitors are not used at the adjust pin, smaller
values of output capacitors provide equally good results.
Protection Diodes
In normal operation, the FAN1582 series does not require any
protection diodes. For the FAN1582, internal resistors limit
internal current paths on the adjust pin. Therefore, even with
bypass capacitors on the adjust pin, no protection diode is
needed to ensure device safety under short-circuit conditions.
5
Preliminary Specification
SHORT-CIRCUIT CURRENT (A)
6
FAN1582
PRODUCT SPECIFICATION
Preliminary Specification
A protection diode between the input and output pins is usually not needed. An internal diode between the input and the
output pins on the FAN1582 series can handle microsecond
surge currents of 50A to 100A. Even with large value output
capacitors it is difficult to obtain those values of surge currents in normal operation. Only with large values of output
capacitance, such as 1000µF to 5000µF, and with the input
pin instantaneously shorted to ground can damage occur. A
crowbar circuit at the input can generate those levels of current;
a diode from output to input is then recommended, as shown
in Figure 1. Usually, normal power supply cycling or system
“hot plugging and unplugging” will not generate current
large enough to do any damage.
The adjust pin can be driven on a transient basis ±7V with
respect to the output, without any device degradation. As with
any IC regulator, exceeding the maximum input-to-output
voltage differential causes the internal transistors to break
down and none of the protection circuitry is then functional.
100Ω and the ripple frequency equals 120Hz, the adjust pin
capacitor should be 22µF. At 10kHz, only 0.22µF is needed.
Output Voltage
The FAN1582 regulator develops a 1.25V reference voltage
between the output pin and the adjust pin (see Figure 2).
Placing a resistor R1 between these two terminals causes a
constant current to flow through R1 and down through R2 to
set the overall output voltage. Normally, this current is the
specified minimum load current of 10mA.
The current out of the adjust pin adds to the current from R1
and is typically 35µA. Its output voltage contribution is small
and only needs consideration when a very precise output
voltage setting is required.
Vcntl
Vcntl
VIN
+
D1
1N4002
(OPTIONAL)
VOUT
VIN
Vcntl
+
Vin
VOUT
VREF
C1
10µF
IADJ
50µA
Vsense
+
R1
C2
22µF
R2
VOUT = VREF (1+R2/R1) + IADJ (R2)
FAN1582
C1
10µF
Vsense
FAN1582
Vin Adj Vout
+
Adj Vout
R1
VOUT
C2
22µF
Figure 2. Basic Regulator Circuit
Load Regulation
+
R2
CADJ
The FAN1582 family provides true remote sensing, eliminating output voltage errors due to trace resistance. To utilize
remote sensing, connect the VSENSE pin directly to the
load, rather than at the VOUT pin. If the load is more than 1"
away from the FAN1582, it may be necessary to increase the
load capacitance to ensure stability.
D1
1N4002
(OPTIONAL)
Thermal Considerations
VCNTL
VIN
Vcntl
+
Vsense
FAN1582–1.5, 2.5
C1
10µF
Vin
Gnd Vout
+
VOUT
C2
22µF
Figure 1. Optional Protection Diode
Ripple Rejection
In applications that require improved ripple rejection, a bypass
capacitor from the adjust pin of the FAN1582 to ground
reduces the output ripple by the ratio of VOUT/1.25V. The
impedance of the adjust pin capacitor at the ripple frequency
should be less than the value of R1 (typically in the range of
100Ω to 120Ω) in the feedback divider network in Figure 1.
Therefore, the value of the required adjust pin capacitor is a
function of the input ripple frequency. For example, if R1 equals
6
The FAN1582 series protect themselves under overload conditions with internal power and thermal limiting circuitry.
However, for normal continuous load conditions, do not exceed
maximum junction temperature ratings. It is important to
consider all sources of thermal resistance from junction-toambient. These sources include the junction-to-case resistance,
the case-to-heat sink interface resistance, and the heat sink
resistance. Thermal resistance specifications have been
developed to more accurately reflect device temperature and
ensure safe operating temperatures. The electrical characteristics section provides a separate thermal resistance and
maximum junction temperature for both the control circuitry
and the power transistor. Calculate the maximum junction
temperature for both sections to ensure that both thermal
limits are met.
For example, look at using an FAN1582T-1.5 to generate 3A
@ 1.5V ± 2% from a 3.3V source (3.2V to 3.6V).
PRODUCT SPECIFICATION
FAN1582
Assumptions:
From the specification table,
•
•
•
•
•
TJ = TA + (PD) * (Θ Case-to-Ambient + ΘJC)
= 70 + (6.39) * (5 + 3) = 121°C
Vin = 3.6V worst case
VOUT = 1.47V worst case
IOUT = 3A continuous
TA = 70°C
Θ Case-to-Ambient = 5°C/W (assuming both a heatsink and
a thermally conductive material)
The power dissipation in this application is:
PD = (VIN - VOUT) * (IOUT) = (3.6-1.47) * (3) = 6.39W
The junction temperature is below the maximum rating.
U1
VIN = 3.3V
10µF
VIN
+
C1
VSENSE
FAN1582
VOUT
2.1V at 3A
VCNTL
VCNTL = 5V
1µF
C4
Adj
10µF
C3
+
R1
86.6Ω
R2
124Ω
100µF
C2
Figure 3. Application Circuit (FAN1582)
Table 1. Bill of Materials for Application Circuit for the FAN1582
Item
Quantity
Manufacturer
Part Number
Description
C1, C3
2
Xicon
L10V10
10µF, 10V Aluminum
C2
1
Xicon
L10V100
100µF, 10V Aluminum
C4
1
Any
1µF Ceramic
R1
1
Generic
86.6Ω, 1%
R2
1
Generic
124Ω, 1%
U1
1
Fairchild
FAN1582T
3A Regulator
7
Preliminary Specification
Junction-to-case thermal resistance is specified from the IC
junction to the bottom of the case directly below the die. This
is the lowest resistance path for heat flow. Proper mounting
ensures the best thermal flow from this area of the package to
the heat sink. Use of a thermally conductive material at the
case-to-heat sink interface is recommended. Use a thermally
conductive spacer if the case of the device must be electrically isolated and include its contribution to the total thermal
resistance.
FAN1582
PRODUCT SPECIFICATION
U1
VIN = 2.5V
10µF
C1
VIN
+
FAN1582–1.5
VOUT
VCNTL
VCNTL = 3.3V
1µF
VSENSE
1.5V at 3A
+
Adj
C2
100µF
C3
Preliminary Specification
Figure 4. Application Circuit (FAN1582-1.5)
Table 2. Bill of Materials for Application Circuit for the RC1582-1.5
Item
Quantity
Manufacturer
Part Number
Description
C1
1
Xicon
L10V10
10µF, 10V Aluminum
C2
1
Any
C3
1
Xicon
L10V100
100µF, 10V Aluminum
U1
1
Fairchild
FAN1582T-1.5
3A Regulator
1µF Ceramic
U1
VIN = 2.5V
+
10µF
C1
VIN
VSENSE
FAN1582–2.5
VOUT
VCNTL
VCNTL = 3.3V
+
1.5V at 3A
+
Adj
1µF
C2
100µF
C3
Figure 5. Application Circuit (FAN1582-2.5)
Table 3. Bill of Materials for Application Circuit for the RC1582-2.5
Item
8
Quantity
Manufacturer
Part Number
Description
C1
1
Xicon
L10V10
10µF, 10V Aluminum
C2
1
Any
C3
1
Xicon
L10V100
100µF, 10V Aluminum
U1
1
Fairchild
FAN1582T-2.5
3A Regulator
1µF Ceramic
PRODUCT SPECIFICATION
FAN1582
Mechanical Dimensions
5-Lead TO-263 Package
Symbol
Inches
Notes:
1. Dimensions are exclusive of mold flash and metal burrs.
2. Standoff-height is measured from lead tip with ref. to Datum –B-.
3. Foot length is measured with ref. to Datum –A- with lead surface
(at inner R).
4. Dimension exclusive of dambar protrusion or intrusion.
5. Formed leads to be planar with respect to one another at seating
place –C-.
Millimeters
Max.
Min.
Max.
.380
.405
9.65
10.29
B
.575
.625
14.60
15.88
C
.325
.380
8.25
9.66
D
–
.055
–
1.40
E
.020
.039
.50
.99
F
.060
.072
1.52
1.83
G
0.45
.055
1.14
1.40
H
.160
.190
4.06
4.83
J
.090
0.110
2.28
2.80
K
.018
.029
.457
.736
R
.017
.019
0.43
0.48
Preliminary Specification
Min.
A
A
D
G
C
E-PIN
B
E
R (2PLCS)
F
J
-B-
-A-
H
-C-
9
FAN1582
PRODUCT SPECIFICATION
Mechanical Demensions (continued)
5-Lead TO-220 Package
Inches
Preliminary Specification
Symbol
Millimeters
Min.
Max.
Min.
Max.
A
b
c1
øP
D
E
e
.140
.025
.190
.040
3.56
.63
4.83
1.02
.140
.139
.560
.380
.062
.220
.161
.650
.420
.072
.356
3.53
14.22
9.65
1.57
.559
4.09
16.51
10.67
1.83
e1
F
H1
J1
L
Q
α
.263
.045
.230
.080
.273
.055
.270
.115
6.68
1.14
5.84
2.04
6.94
1.40
6.87
2.92
.500
.100
3°
.580
.135
7°
12.70
.254
3°
14.73
.343
7°
Notes
Notes:
1. Dimension c1 apply for lead finish.
H1
Q
L
e
e1
E
b
E-PIN
øP
α (5X)
c1
A
J1
F
D
10
FAN1582
PRODUCT SPECIFICATION
Ordering Information
Package
FAN1582M
TO-263
FAN1582T
TO-220
FAN1582M-1.5
TO-263
FAN1582T-1.5
TO-220
FAN1582M-2.5
TO-263
FAN1582T-2.5
TO-220
Preliminary Specification
Product Number
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/20/99 0.0m 001
Stock#DS30001584
 1998 Fairchild Semiconductor Corporation
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
www.fairchildsemi.com
FAN4040
Precision Micropower Shunt Voltage Reference
Description
•
•
•
•
•
•
The FAN4040 series of precision shunt references are ideal
for space- and cost-sensitive applications. They are available
in a variety of fixed output voltages (2.500V, 3.300V, 4.096V,
5.000V, 8.192V, and 10.000V) and with a variety of output
voltage tolerances (0.1%, 0.2%, 0.5%, 1%, and 2%). They
also have excellent temperature coefficients, to 100ppm/°C
for the tighter tolerance grades. The FAN4040 series has an
extended operating current range, sinking as much as 25mA.
Fixed 2.500V, 3.300V, 4.096V, 5.000V, 8.192V, 10.000V
Tolerances to +0.1% (25°C)
Low output noise
Low temperature coefficient
Small packages
Extended operating current range
Applications
•
•
•
•
•
Portable equipment
Disk drives
Instrumentation
Audio equipment
Data acquisition systems
The FAN4040 series is available in SOT-23, SO-8, and TO-92
packages.
Connection Diagrams
SO-8
SOT-23
+
1
3*
–
*This pin must be left floating
or connected to pin 2.
2
Top View
NC
1
8 +
NC
2
7 NC
NC
3
6 NC
–
4
5 NC
Top View
TO-92
NC
+
–
3
2
1
Bottom View
Rev. 0.8.4
PRELIMINARY INFORMATION describes products that are not in full production at the time of printing. Specifications are based on design goals
and limited characterization. They may change without notice. Contact Fairchild Semiconductor for current information.
Preliminary Information
Features
www.fairchildsemi.com
FAN4050
Precision Micropower Shunt Voltage Reference
Features
Description
•
•
•
•
•
•
The FAN4050 series of precision shunt references are ideal
for space- and cost-sensitive applications. They are available
in a variety of fixed output voltages (2.500V, 4.096V, 5.000V,
8.192V, and 10.000V) and with a variety of output voltage
tolerances (0.1%, 0.2%, and 0.5%). They also have excellent
temperature coefficients, 50ppm/°C.
Fixed 2.500V, 4.096V, 5.000V, 8.192V, 10.000V
Tolerances to +0.1% (25°C)
Low output noise
Low temperature coefficient
Small packages: SSOT-23
Extended operating current range
•
•
•
•
•
Portable equipment
Disk drives
Instrumentation
Audio equipment
Data acquisition systems
Connection Diagram
SSOT-23
+
1
3*
–
*This pin must be left floating
or connected to pin 2.
2
Top View
Rev. 0.6.0
ADVANCE SPECIFICATION describes products that are in the design stage. Specifications may change in any manner whatever without notice.
Contact Fairchild Semiconductor for current information.
Advance Specification
The FAN4050 series is available in the SSOT-23 package.
Applications
FAN4050
Absolute Maximum Ratings1
Ratings are over full operating free-air temperature range unless otherwise noted.
Parameter
Continuous cathode current, IK
Min.
Max.
Unit
-10
20
mA
280
mW
150
°C
300
°C
2
Power dissipation
Storage Temperature Range
-65
Lead Temperature (Soldering, 10 sec.)
Notes:
1. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected to
conditions outside these ratings.
2. It is recommended to connect pin 3 to pin 2 in the SSOT23 package to ensure optimal thermal performance.
Min.
Max.
Unit
Continuous cathode current, IK
Parameter
0.1
15
mA
Operating temperature range in free air, TA
-40
85
°C
Advance Specification
Recommended Operating Conditions
Equivalent Schematic
CATHODE
+
_
Vref = 1.24V
ANODE
2
FAN4050
Guaranteed Electrical Characteristics, FAN4050-2.5
(TA = 25°C unless otherwise specified, in free air)
The • denotes specifications which apply over the full operating temperature range.
Advance Specification
Symbol
VR
TCVR
Parameter
Reverse Breakdown Voltage
Reverse Breakdown Voltage
Tolerance
IRMIN
Minimum Operating Current
Reverse Breakdown Voltage
∆VR/∆T
Temperature Coefficient
∆VR (∆IK) Reverse Breakdown Voltage
Change with Operating
Current
ZKA
Reverse Dynamic
Impedance
eN
Wideband Noise
∆VR
IK = 100µA
•
•
•
A
2.500
±2.5
±11
65
±50
Limits
B
2.500
±5.0
±14
65
±50
C
2.500
±13
±21
65
±50
V*
mV
mV
µA
ppm/°C
IRMIN ≤ IK ≤1mA
1mA ≤ IK ≤ 15mA
•
•
1.2
8.0
1.2
8.0
1.2
8.0
mV
mV
0.3
0.3
0.3
Ω*
41
41
41
µVRMS*
120
120
120
ppm*
Conditions
IK = 100µA
IK = 100µA
IK=1mA, f=120Hz, IAC=0.1IK
IK=100µA,
10Hz ≤ f ≤ 10kHz
Reverse Breakdown Voltage t=1000hrs, T=25°C, IK=100µA
Long-term Stability
Units
*Typical.
Guaranteed Electrical Characteristics, FAN4050-4.1
(TA = 25°C unless otherwise specified, in free air)
The • denotes specifications which apply over the full operating temperature range.
Symbol
VR
TCVR
Parameter
Reverse Breakdown Voltage
Reverse Breakdown Voltage
Tolerance
Minimum Operating Current
IRMIN
∆VR/∆T
Reverse Breakdown Voltage
Temperature Coefficient
∆VR (∆IK) Reverse Breakdown Voltage
Change with Operating Current
ZKA
Reverse Dynamic Impedance
eN
Wideband Noise
∆VR
Reverse Breakdown Voltage
Long-term Stability
*Typical.
3
Conditions
IK = 100µA
IK = 100µA
IK = 100µA
•
•
•
IRMIN ≤ IK ≤1mA
•
1mA ≤ IK ≤ 15mA
•
IK=1mA, f=120Hz, IAC=0.1IK
IK=100µA, 10Hz ≤ f ≤ 10kHz
t=1000hrs, T=25°C, IK=100µA
A
4.096
±4.1
±18
73
±50
1.2
10
0.5
93
120
Limits
Units
B
C
4.096 4.096
V*
±8.2
±21
mV
±22
±34
mV
73
73
µA
±50
±50 ppm/°C
1.2
10
0.5
93
120
1.2
10
0.5
93
120
mV
mV
Ω*
µVRMS*
ppm*
FAN4050
Guaranteed Electrical Characteristics, FAN4050-5.0
(TA = 25°C unless otherwise specified, in free air)
The • denotes specifications which apply over the full operating temperature range.
Symbol
VR
TCVR
∆VR
Reverse Breakdown Voltage
Long-term Stability
Conditions
IK = 100µA
IK = 100µA
IK = 100µA
IRMIN ≤ IK ≤1mA
1mA ≤ IK ≤ 15mA
IK=1mA, f=120Hz, IAC=0.1IK
IK=100µA,
10Hz ≤ f ≤ 10kHz
t=1000hrs, T=25°C, IK=100µA
Limits
A
B
5.000 5.000
±5.0 ±10
• ±22
±27
•
80
80
• ±50
±50
•
•
Units
C
5.000
±25
±42
80
±50
V*
mV
mV
µA
ppm/°C
1.4
12
0.5
93
1.4
12
0.5
93
1.4
12
0.5
93
mV
mV
Ω*
µVRMS*
120
120
120
ppm*
A
8.192
±8.2
• ±35
•
95
• ±50
Limits
B
8.192
±16
±43
95
±50
C
8.192
±41
±68
95
±50
V*
mV
mV
µA
ppm/°C
2.5
18
0.6
150
2.5
18
0.6
150
2.5
18
0.6
150
mV
mV
Ω*
µVRMS*
120
120
120
ppm*
*Typical.
Guaranteed Electrical Characteristics, FAN4050-8.2
(TA = 25°C unless otherwise specified, in free air)
The • denotes specifications which apply over the full operating temperature range.
Symbol
VR
TCVR
Parameter
Reverse Breakdown Voltage
Reverse Breakdown Voltage
Tolerance
IRMIN
Minimum Operating Current
∆VR/∆T
Reverse Breakdown Voltage
Temperature Coefficient
∆VR (∆IK) Reverse Breakdown Voltage
Change with Operating Current
ZKA
Reverse Dynamic Impedance
eN
Wideband Noise
∆VR
Reverse Breakdown Voltage
Long-term Stability
Conditions
IK = 150µA
IK = 150µA
IK = 150µA
IRMIN ≤ IK ≤1mA
1mA ≤ IK ≤ 15mA
IK=1mA, f=120Hz, IAC=0.1IK
IK=150µA,
10Hz ≤ f ≤ 10kHz
t=1000hrs, T=25°C, IK=150µA
•
•
Units
*Typical.
4
Advance Specification
Parameter
Reverse Breakdown Voltage
Reverse Breakdown Voltage
Tolerance
IRMIN
Minimum Operating Current
Reverse Breakdown Voltage
∆VR/∆T
Temperature Coefficient
∆VR (∆IK) Reverse Breakdown Voltage
Change with Operating Current
Reverse Dynamic Impedance
ZKA
eN
Wideband Noise
FAN4050
Guaranteed Electrical Characteristics, FAN4050-10
(TA = 25°C unless otherwise specified, in free air)
The • denotes specifications which apply over the full operating temperature range.
Symbol
VR
TCVR
∆VR
Reverse Breakdown Voltage
Long-term Stability
Conditions
IK = 150µA
IK = 150µA
IK = 150µA
IRMIN ≤ IK ≤1mA
1mA ≤ IK ≤ 15mA
IK=1mA, f=120Hz, IAC=0.1IK
IK=150µA,
10Hz ≤ f ≤ 10kHz
t=1000hrs, T=25°C, IK=150µA
Limits
Units
A
B
C
10.00 10.00 10.00
V*
±10 ±20 ±50
mV
• ±43 ±53 ±83
mV
• 103 103 103
µA
• ±50 ±50 ±50 ppm/°C
•
•
3.5
23
0.7
150
3.5
23
0.7
150
3.5
mV
23
mV
0.7
Ω*
150 µVRMS*
120
120
120
ppm*
*Typical.
5
Advance Specification
Parameter
Reverse Breakdown Voltage
Reverse Breakdown Voltage
Tolerance
Minimum Operating Current
IRMIN
Reverse Breakdown Voltage
∆VR/∆T
Temperature Coefficient
∆VR (∆IK) Reverse Breakdown Voltage
Change with Operating Current
ZKA
Reverse Dynamic Impedance
Wideband Noise
eN
FAN4050
Mechanical Dimensions
SSOT-23 Package
Symbol
Millimeters
Min.
Max.
Min.
Max.
.035
.0005
.015
.003
.110
.047
.044
.004
1.02
.10
.020
.007
.120
.055
.89
.013
.37
.085
2.80
1.20
.51
.18
3.04
1.40
.035
.070
.083
.041
.080
.104
.89
1.78
2.10
1.03
2.05
2.64
.027 BSC
.018
.024
Notes:
Notes
1. Dimensions are inclusive of plating.
2. Dimensions are exclusive of mold flash & metal burr.
3. Comply to JEDEC TO-236.
4. This drawing is for matrix leadframe only.
Advance Specification
A
A1
B
c
D
E
e
e1
H
L
S
Inches
.69 BSC
.45
.60
D
e1
S
c
e
L
E
H
B
A1
A
6
FAN4050
Ordering Information
Example: FAN4050 A I S3-5.0
FAN4050
A
I
Advance Specification
Grade
0.1% = A
0.2% = B
0.5% = C
S3
Package
SSOT23 = S3
–
5.0
Voltage
2.5V = 2.5
4.096V = 4.1
5.0V = 5.0
8.192V = 8.2
10V = 10.0
SSOT-23 Package Marking Information
Only 3 fields of marking are possible on an SSOT-23. This table gives the meaning of these fields.
Example: F5A
F
5
A
Voltage
2.5V = 2
4.096V = 4
5.0V = 5
8.192V = 8
10V = 0
Grade
0.1% = A
0.2% = B
0.5% = C
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/15/99 0.0m 002
Stock#DS30004040
 1999 Fairchild Semiconductor Corporation
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench 
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
www.fairchildsemi.com
FAN5061
High Performance Programmable Synchronous
DC-DC Controller for Multi-Voltage Platforms
Applications
¥ Programmable output for Vcore from 1.3V to 3.5V using
an integrated 5-bit DAC
¥ Controls adjustable linears for Vtt (1.5V), and Vclock
(2.5V)
¥ Meets VRM speciÞcation with as few as 5 capacitors
¥ Meets 1.550V +40/-70mV over initial tolerance,
temperature and transients
¥ Remote sense
¥ Active Droop
¥ Drives N-Channel MOSFETs
¥ Overcurrent protection using MOSFET sensing
¥ 85% efÞciency typical at full load
¥
¥
¥
¥
¥ Integrated Power Good and Enable/Soft Start functions
¥ 20 pin SOIC package
Power supply for Pentium¨ II Camino Platform
Power supply for Pentium II Whitney Platform
VRM for Pentium III processor
Programmable multi-output power supply
Description
The FAN5061 is a synchronous mode DC-DC controller IC
which provides a highly accurate, programmable set of output
voltages for multi-voltage platforms such as the Intel Camino,
and provides a complete solution for the Intel Whitney and other
high-performance processors. The FAN5061 features remote
voltage sensing, independently adjustable current limit, and
Active Droop for optimal converter transient response. The
FAN5061 uses a 5-bit D/A converter to program the output
voltage from 1.3V to 3.5V. The FAN5061 uses a high level of
integration to deliver load currents in excess of 16A from a 5V
Block Diagram
+5V
VCCA 17
+3.3V
9
+1.5V
+
-
10
VCCP
11
+
-
REF
PWRGD,
OCL
OCL
REF
+12V
PWRGD,
OCL
12
+2.5V
+
OSC
RS
16
20 VCCP
1 HIDRV
+
+
+5V
15
Digital
Control
+
2
VCC
19 LODRV
18
GNDP
5-Bit
DAC
1.24V
Reference
8 7 65 4
VID0 VID2 VID4
VID1 VID3
Pentium is a registered trademark of Intel Corporation.
Power
Good
3
GNDA
14
PWRGD
13
ENABLE/SS
Rev. 0.8.1
Preliminary Specification describes products that are not in full production at the time of printing. Specifications are based on design goals and
limited characterization. In the process of final product release, specification. Contact Fairchild Semiconductor for current information.
Preliminary Specification
Features
FAN5061
Preliminary Specification
source with minimal external circuitry. Synchronous-mode
operation offers optimum efficiency over the entire specified
output voltage range. An on-board precision low TC reference
achieves tight tolerance voltage regulation without expensive
external components, while Active Droop permits exact tailoring of voltage for the most demanding load transients. The
FAN5061 includes linear regulator controllers for Vtt termination (1.5V), and Vclock (2.5V), each adjustable with an external divider. The FAN5061 also offers integrated functions
including Power Good, Output Enable/Soft Start and current
limiting, and is available in a 20 pin SOIC package.
Pin Assignments
HIDRV
SW
GNDA
VID4
VID3
VID2
VID1
VID0
VTTGATE
VTTFB
1
2
3
4
5
6
7
8
9
10
FAN5061
20
19
18
17
16
15
14
13
12
11
VCCP
LODRV
GNDP
VCCA
VFB
IGB
PWRGD
SS/ENABLE
VCUFB
VCUGATE
Pin Definitions
Pin
Number Pin Name
2
Pin Function Description
1
HIDRV
High Side FET Driver. Connect this pin through a resistor to the gate of an N-channel
MOSFET. The trace from this pin to the MOSFET gate should be <0.5".
2
SW
High side Driver Source and Low side Driver Drain Switching Node. Together with
DROOP and ILIM pins allows FET sensing for Vcc current.
3
GNDA
Analog Ground. Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
4-8
VID0-4
Voltage Identification Code Inputs. These open collector/TTL compatible inputs will
program the output voltage over the ranges specified in Table 2. Pull-up resistors are
internal to the controller.
9
VTTGATE
Gate Driver for VTT Transistor. For 1.5V output.
10
VTTFB
Voltage Feedback for VTT.
11
VCKGATE
Gate Driver for VCK Transistor. For 2.5V output.
12
VCKFB
Voltage Feedback for VCK.
13
ENABLE/SS
Output Enable. A logic LOW on this pin will disable all outputs. An internal current source
allows for open collector control. This pin also doubles as soft start for all outputs.
14
PWRGD
Power Good Flag. An open collector output that will be logic LOW if any output voltage
is not within ±12% of the nominal output voltage setpoint.
15
IFB
Vcc Current Feedback. Pin 15 is used in conjunction with pin 2 as the input for the Vcc
current feedback control loop. Layout of these traces is critical to system performance.
See Application Information for details.
16
VFB
Vcc Voltage Feedback. Pin 16 is used as the input for the Vcc voltage feedback control
loop. See Application Information for details regarding correct layout.
17
VCCA
Analog VCC. Connect to system 5V supply and decouple with a 0.1µF ceramic capacitor.
18
GNDP
Power Ground. Return pin for high currents flowing in pin 20 (VCCP).
19
LODRV
Vcc Low Side FET Driver. Connect this pin through a resistor to the gate of an N-channel
MOSFET for synchronous operation. The trace from this pin to the MOSFET gate should
be <0.5".
20
VCCP
Power VCC. For all FET drivers. Connect to system 12V supply through a 33Ω, and
decouple with a 1µF ceramic capacitor.
FAN5061
Absolute Maximum Ratings
Supply Voltages VCCA, VCCP to GND
13.5V
Voltage Identification Code Inputs, VID0-VID4
VCCA
All Other Pins
13.5V
Junction Temperature, TJ
150°C
Storage Temperature
-65 to 150°C
Lead Soldering Temperature, 10 seconds
Thermal Resistance Junction-to-ambient, ΘJA
300°C
1
75°C/W
Note:
1. Component mounted on demo board in free air.
Preliminary Specification
Recommended Operating Conditions
Parameter
Conditions
Min.
Typ.
Max.
Units
Supply Voltage VCCA
4.75
5
5.25
V
Input Logic HIGH
2.0
V
Input Logic LOW
Ambient Operating Temperature
0
Output Driver Supply, VCCP
10.8
12
0.8
V
70
°C
13.2
V
Electrical Specifications
(VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25°C using circuit in Figure 1 unless otherwise noted.)
The • denotes specifications which apply over the full operating temperature range.
Parameter
Conditions
Min.
Typ.
Max.
Units
3.5
V
VCC Regulator
Output Voltage
See Table 1
•
1.3
Output Current
18
2.397
2.000
1.550
Initial Voltage Setpoint
ILOAD = 0.8A,VOUT = 2.400V
VOUT = 2.000V
VOUT = 1.550V
Output Temperature Drift
TA = 0 to 70°C,VOUT =
2.000V
VOUT =
1.550V
•
•
+8
+6
mV
mV
Line Regulation
VIN = 4.75V to 5.25V
•
-4
mV/V
Internal Droop Impedance
ILOAD = 0.8A to 12.5A
13.0
Maximum Droop
2.424
2.020
1.565
A
14.4
2.454
2.040
1.580
15.8
V
V
V
KΩ
60
mV
11
mVpk
Output Ripple
20MHz BW, ILOAD = 18A
Total Output Variation,
Steady State1
VOUT = 2.000V
VOUT = 1.550V3
•
•
1.940
1.480
2.070
1.590
V
Total Output Variation,
Transient2
ILOAD = 0.8A to 18A, VOUT =
2.000V
VOUT =
1.550V3
•
•
1.900
1.480
2.100
1.590
V
•
45
60
µA
Short Circuit Detect Current
Efficiency
ILOAD = 18A, VOUT = 2.0V
50
85
%
3
FAN5061
Electrical Specifications (Continued)
(VCCA = 5V, VCCP = 12V, VOUT = 2.0V, and TA = +25°C using circuit in Figure 1 unless otherwise noted.)
The • denotes specifications which apply over the full operating temperature range.
Parameter
Conditions
Output Driver Rise & Fall Time
See Figure 3
Output Driver Deadtime
See Figure 3
Min.
Typ.
Max.
50
nsec
50
Duty Cycle
0
Units
nsec
100
%
5V UVLO
•
3.74
4
4.26
V
12V UVLO
•
7.65
8.5
9.35
V
Soft Start Current
•
5
10
17
µA
•
1.425
1.5
1.575
V
Preliminary Specification
VTT Linear Regulator
Output Voltage
ILOAD ≤ 2A
Under Voltage Trip Level
Over Current
80
%VO
VCLK Linear Regulator
Output Voltage
ILOAD ≤ 2A
Under Voltage Trip Level
Over Current
•
2.375
2.5
2.625
80
V
%VO
Common Functions
Oscillator Frequency
PWRGD Threshold
Logic HIGH, All Outputs
Logic LOW, Any Output
Linear Regulator Under Voltage Delay
Time
Over Current
•
255
•
•
93
88
310
30
345
kHz
107
112
%VOUT
µsec
Notes:
1. Steady State Voltage Regulation includes Initial Voltage Setpoint, Droop, Output Ripple and Output Temperature Drift and is
measured at the converter’s VFB sense point.
2. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than
0.5mΩ trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal
performance.
4
FAN5061
Table 1. Output Voltage Programming Codes
VID3
VID2
VID1
VID0
Nominal VOUT
0
1
1
1
1
1.30V
0
1
1
1
0
1.35V
0
1
1
0
1
1.40V
0
1
1
0
0
1.45V
0
1
0
1
1
1.50V
0
1
0
1
0
1.55V
0
1
0
0
1
1.60V
0
1
0
0
0
1.65V
0
0
1
1
1
1.70V
0
0
1
1
0
1.75V
0
0
1
0
1
1.80V
0
0
1
0
0
1.85V
0
0
0
1
1
1.90V
0
0
0
1
0
1.95V
0
0
0
0
1
2.00V
0
0
0
0
0
2.05V
1
1
1
1
1
2.0V
1
1
1
1
0
2.1V
1
1
1
0
1
2.2V
1
1
1
0
0
2.3V
1
1
0
1
1
2.4V
1
1
0
1
0
2.5V
1
1
0
0
1
2.6V
1
1
0
0
0
2.7V
1
0
1
1
1
2.8V
1
0
1
1
0
2.9V
1
0
1
0
1
3.0V
1
0
1
0
0
3.1V
1
0
0
1
1
3.2V
1
0
0
1
0
3.3V
1
0
0
0
1
3.4V
1
0
0
0
0
3.5V
Preliminary Specification
VID4
Note:
1. 0 = processor pin is tied to GND.
1 = processor pin is open.
5
FAN5061
Typical Operating Characteristics
(VCCA = 5V, VCCP = 12V, and TA = +25°C using circuits in Figure 1, unless otherwise noted.)
Droop, VCPU = 2.0V, RD = 8K Ω
VCPU Efficiency vs. Output Current
2.04
Preliminary Specification
2.03
VOUT = 2.000V
86
84
82
80
78
76
2.02
2.01
2.00
VOUT = 1.550V
VOUT (V)
Efficiency (%)
88
74
72
70
68
66
64
1.99
1.98
1.97
1.96
1.95
1.94
0
3
6
9
12
15
18
Output Current (A)
0
3
6
9
12
Output Current (A)
15
18
CPU Output Voltage vs. Output Current
3.5
3.0
VOUT (V)
2.5
2.0
1.5
1.0
0.5
0
0
5
10
15
20
25
Output Current (A)
Output Programming, VID4 = 1
2.1
3.5
1.9
3.0
1.7
2.5
VCPU(V)
VCPU(V)
Output Programming, VID4 = 0
1.5
1.3
1.5
1.1
1.0
1.30 1.40
1.50
1.60
1.70
DAC Setpoint
6
2.0
1.80
1.90
2.00
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2. 3.3 3.4 3.5
DAC Setpoint
FAN5061
Typical Operating Characteristics (continued)
Transient Response, 12.5A to 0.5A
VCPU (50mV/div)
VCPU (20mV/div)
Output Ripple, 2.0V @ 18A
1.590V
1.550V
1.480V
Switching Waveforms, 18A Load
5V/div
Transient Response, 0.5A to 12.5A
VCPU (50mV/div)
Preliminary Specification
Time (100µs/div)
Time (1µs/div)
HIDRV
pin
1.550V
5V/div
1.590V
LODRV
pin
1.480V
Time (1µs/div)
Time (100µs/div)
Output Startup from Enable
VCPU (1V/div)
VIN (2V/div)
VCPU (1V/div) ENABLE (2V/div)
Output Startup, System Power-up
Time (10ms/div)
Time (10ms/div)
7
FAN5061
Typical Operating Characteristics (continued)
Linear Regulator Noise
AC COUPLED VOUT (10mV/div)
2.042
2.040
VCPU (V)
2.038
2.036
2.034
2.030
Preliminary Specification
2.028
2.026
0
25
70
100
Time (100µs/div)
Temperature (°C)
Application Circuit
L1
(Optional)
+5V
CIN*
C1
R6
R7
C2
Q1
L2
R2
1
2
3
VO
COUT*
Q2
D1
3.3V IN
Q3
C10
R3
VID4
VID3
VID2
VID1
VID0
4
5
6
7
8
9
10
U1
FAN5061
20
19
18
17
16
15
14
13
12
11
R1
+12V
C5
VCC
C3
R4
PWRGD
ENABLE/SS
Q4
C11
C6
C4
1.5V†
2.5V†
C8
C7
* Refer to Table 4 for values
of COUT and CIN.
† Adjustable with an external
divider.
Figure 1. Application Circuit for Katmai/Camino/BX/ZX Motherboards
(Worst Case Analyzed! See Appendix for Details)
8
FAN5061
Table 2. FAN5061 Application Bill of Materials for Intel Katmai/Camino/BX/ZX Motherboards
(Components based on Worst Case Analysis—See Appendix for Details)
Manufacturer Part #
Quantity
Description
Requirements/Comments
C1
AVX
TAJB475M010R5
1
4.7µF, 10V Capacitor
C2, C5
Panasonic
ECU-V1C105ZFX
2
1µF, 16V Capacitor
C3-4,C6
Panasonic
ECU-V1H104ZFX
3
100nF, 50V Capacitor
C8-9
Sanyo
6MV1000FA
2
1000µF, 6.3V Electrolytic
C10-11
Any
2
22µF, 6.3V Capacitor
Low ESR
CIN
Sanyo
10MV1200GX
*
1200µF, 10V Electrolytic
IRMS = 2A
COUT
Sanyo
6MV1500GX
*
1500µF, 6.3V Electrolytic
ESR ≤ 44mΩ
D1
Motorola
MBRD835L
1
8A Schottky Diode
L1
Any
Optional
2.5µH, 8A Inductor
L2
Any
1
1.3µH, 20A Inductor
DCR ~ 2mΩ
Q1
Fairchild
FDP6030L or
FDB6030L
1
N-Channel MOSFET
(TO-220 or TO-263)
RDS(ON) = 20mΩ @
VGS = 4.5V See Note 2.
Q2
Fairchild
FDP7030BL or
FDB7030BL
1
N-Channel MOSFET
(TO-220 or TO-263)
RDS(ON) = 10mΩ @
VGS = 4.5V See Note 2.
Q3-4
Fairchild
FDB4030L
2
N-Channel MOSFET
R1
Any
1
33Ω
R2-3
Any
2
4.7Ω
R4
Any
1
10KΩ
R6
Any
1
10Ω
R7
Any
1
*
U1
Fairchild
FAN5061M
1
DC/DC Controller
Preliminary Specification
Reference
DCR ~ 10mΩ
See Note 1.
Notes:
1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply
with Intel dI/dt requirements. L1 may be omitted if desired.
2. For 17.4A designs using the TO-220 MOSFETs, heatsinks with thermal resistance ΘSA < 20°C/Ω should be used. For designs
using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections,
refer to Applications Bulletins AB-8 and AB-15.
*Refer to table for values.
9
FAN5061
L1
(Optional)
+5V
CIN*
C1
R6
C2
R2
Q1
Preliminary Specification
R7
R8
1
2
3
R10
L2
VO
COUT*
Q2
D1
3.3V IN
Q3
C10
R3
VID4
VID3
VID2
VID1
VID0
4
5
6
7
8
9
10
U1
FAN5061
20
19
18
17
16
15
14
13
12
11
R1
+12V
C5
VCC
C3
R4
PWRGD
ENABLE/SS
C4
Q5
C11
1.5V†
C8
2.5V†
C7
*Refer to Table 3 for values
of COUT, and CIN.
† Adjustable with an external
divider.
Figure 2. Application Circuit for Coppermine/Camino Motherboards
(Typical Design)
10
C6
FAN5061
Table 3. FAN5061 Application Bill of Materials for Intel Coppermine/Camino Motherboards
(Typical Design)
Manufacturer Part #
C1
AVX
TAJB475M010R5
Quantity
1
4.7µF, 10V Capacitor
Description
Requirements/Comments
C2, C5
Panasonic
ECU-V1C105ZFX
2
1µF, 16V Capacitor
C3-4,C6
Panasonic
ECU-V1H104ZFX
3
100nF, 50V Capacitor
C8-9
Sanyo
6MV1000FA
2
1000µF, 6.3V Electrolytic
C10-11
Any
2
22µF, 6.3V Capacitor
Low ESR
CIN
Sanyo
10MV1200GX
3
1200µF, 10V Electrolytic
IRMS = 2A
COUT
Sanyo
6MV1500GX
12
1500µF, 6.3V Electrolytic
ESR ≤ 44mΩ
D1
Motorola
MBRD835L
1
8A Schottky Diode
L1
Any
Optional
2.5µH, 5A Inductor
DCR ~ 10mΩ
See Note 1.
L2
Any
1
1.3µH, 15A Inductor
DCR ~ 3mΩ
Q1
Fairchild
FDP6030L or
FDB6030L
1
N-Channel MOSFET
(TO-220 or TO-263)
RDS(ON) = 20mΩ @
VGS = 4.5V See Note 2.
Q2
Fairchild
FDP7030BL or
FDB7030BL
1
N-Channel MOSFET
(TO-220 or TO-263)
RDS(ON) = 10mΩ @
VGS = 4.5V See Note 2.
Q3-4
Fairchild
FDB4030L
2
N-Channel MOSFET
R1
Any
1
33Ω
R2-3
Any
2
4.7Ω
R4
Any
1
10KΩ
R6
Any
1
10Ω
R7
Any
1
6.24KΩ
R8
N/A
1
30mΩ
U1
Fairchild
FAN5061M
1
DC/DC Controller
Preliminary Specification
Reference
PCB Trace Resistor
Notes:
1. Inductor L1 is recommended to isolate the 5V input supply from noise generated by the MOSFET switching, and to comply
with Intel dI/dt requirements. L1 may be omitted if desired.
2. For 12.5A designs using the TO-220 MOSFETs, heatsinks with thermal resistance ΘSA < 20°C/Ω should be used. For designs
using the TO-263 MOSFETs, adequate copper area should be used. For details and a spreadsheet on MOSFET selections,
refer to Applications Bulletins AB-8 and AB-15.
11
FAN5061
Application Circuit Summary
Table 4 summarizes the worst-case design schematics presented in this section. The basic choices are: A) The processor, B) the
chipset used, and C) the use or not of a sense resistor. Depending on board layout and component selection, it may be possible to
use fewer output capacitors than shown here. For configurations not shown in this datasheet, consult the Appendix for selection
of component values.
Preliminary Specification
Table 4. Recommended Values for CPU-based Applications
Processor
Chipset
CIN
COUT*
R5, R7 (KΩ)
Coppermine
Whitney
3
4
8.45
Katmai
Camino
4
6
13.0
Mendocino
Whitney
4
5
11.3
Katmai
BX
5
6
11.8
*Output capacitance requirements depend critically on layout and processor type. Consult Application Bulletin AB-14 for details.
See the Appendix to this datasheet for the method of calculation of these components. Pin 4 must be used to remote sense the
voltage at the processor to achieve the specified performance.
Test Parameters
tR
tF
5V
2V
HIDRV
to SW
5V
2V
t DT
2V
tDT
2V
LODRV
Figure 3. Ouput Drive Timing Diagram
Application Information
The FAN5061 Controller
The FAN5061 is a programmable synchronous DC-DC controller IC. When designed around the appropriate external
components, the FAN5061 can be configured to deliver more
than 16A of output current, as appropriate for the Katmai and
Coppermine and other processors. The FAN5061 functions
as a fixed frequency PWM step down regulator.
Main Control Loop
Refer to the FAN5061 Block Diagram on page 1. The FAN5061
implements “summing mode control”, which is different from
both classical voltage-mode and current-mode control. It
provides superior performance to either by allowing a large
converter bandwidth over a wide range of output loads.
The control loop of the regulator contains two main sections:
the analog control block and the digital control block. The
analog section consists of signal conditioning amplifiers feeding
into a comparator which provides the input to the digital control
block. The signal conditioning section accepts input from the
DROOP (current feedback) and VFB (voltage feedback) pins
and sets up two controlling signal paths. The first, the voltage
control path, amplifies the difference between the VFB signal
and the reference voltage from the DAC and presents the
12
output to one of the summing amplifier inputs. The second,
current control path, takes the difference between the DROOP
and SW pins when the high-side MOSFET is on, reproducing
the voltage across the MOSFET and thus the input current; it
presents the resulting signal to another input of the summing
amplifier. These two signals are then summed together. This
output is then presented to a comparator looking at the oscillator
ramp, which provides the main PWM control signal to the
digital control block.
The digital control block takes the analog comparator input
and the main clock signal from the oscillator to provide the
appropriate pulses to the HIDRV and LODRV output pins.
These two outputs control the external power MOSFETs.
There is an additional comparator in the analog control section
whose function is to set the point at which the FAN5061 current limit comparator disables the output drive signals to the
external power MOSFETs.
High Current Output Drivers
The FAN5061 contains two identical high current output drivers that utilize high speed bipolar transistors in a push-pull
configuration. The drivers’ power and ground are separated
from the chip’s power and ground for switching noise immunity. The power supply pin, VCCP, is supplied from an external 12V source through a series 33Ω resistor. The resulting
voltage is sufficient to provide the gate to source drive to the
external MOSFETs required in order to achieve a low RDS,ON.
Internal Voltage Reference
The reference included in the FAN5061 is a precision band-gap
voltage reference. Its internal resistors are precisely trimmed
to provide a near zero temperature coefficient (TC). Based on
the reference is the output from an integrated 5-bit DAC. The
DAC monitors the 5 voltage identification pins, VID0-4. When
the VID4 pin is at logic HIGH, the DAC scales the reference
voltage from 2.0V to 3.5V in 100mV increments. When VID4
FAN5061
is pulled LOW, the DAC scales the reference from 1.30V to
2.05V in 50mV increments. All VID codes are available, including those below 1.80V.
affects the efficiency of the DC-DC Converter. For details
and a spreadsheet on MOSFET selection, refer to Applications Bulletin AB-8.
Power Good (PWRGD)
Inductor Selection
The FAN5061 Power Good function is designed in accordance with the Pentium II DC-DC converter specifications
and provides a continuous voltage monitor on the VFB pin.
The circuit compares the VFB signal to the VREF voltage
and outputs an active-low interrupt signal to the CPU should
the power supply voltage deviate more than ±12% of its
nominal setpoint. The Power Good flag provides no other
control function to the FAN5061.
Choosing the value of the inductor is a tradeoff between
allowable ripple voltage and required transient response. The
system designer can choose any value within the allowed
minimum to maximum range in order to either minimize ripple
or maximize transient performance. The first order equation
(close approximation) for minimum inductance is:
Lmin =
(Vin – Vout)
The FAN5061 will accept an open collector/TTL signal for
controlling the output voltage. The low state disables the output
voltage. When disabled, the PWRGD output is in the low state.
Even if an enable is not required in the circuit, this pin should
have attached a capacitor (typically 100nF) to softstart the
switching.
Over-Voltage Protection
The FAN5061 constantly monitors the output voltage for protection against over-voltage conditions. If the voltage at the
VFB pin exceeds the selected program voltage, an over-voltage condition is assumed and the FAN5061 disables the output drive signal to the external high-side MOSFET. The DCDC converter returns to normal operation after the output
voltage returns to normal levels.
Oscillator
The FAN5061 oscillator section uses a fixed frequency of
operation of 300KHz.
Design Considerations and Component
Selection
Additional information on design and component selection
may be found in Fairchild’s Application Note 57.
MOSFET Selection
This application requires N-channel Logic Level Enhancement
Mode Field Effect Transistors. Desired characteristics are as
follows:
¥ Low Static Drain-Source On-Resistance, RDS,ON < 20mΩ
(lower is better)
¥ Low gate drive voltage, VGS = 4.5V rated
¥ Power package with low Thermal Resistance
¥ Drain-Source voltage rating > 15V.
The on-resistance (RDS,ON) is the primary parameter for
MOSFET selection. The on-resistance determines the power
dissipation within the MOSFET and therefore significantly
Vout
Vin
ESR
x
Vripple
where:
Vin = Input Power Supply
Vout = Output Voltage
f = DC/DC converter switching frequency
ESR = Equivalent series resistance of all output capacitors in
parallel
Vripple = Maximum peak to peak output ripple voltage budget.
The first order equation for maximum allowed inductance is:
Lmax = 2CO
(Vin – Vout) Dm Vtb
Ipp2
where:
Co = The total output capacitance
Ipp = Maximum to minimum load transient current
Vtb = The output voltage tolerance budget allocated to load
transient
Dm = Maximum duty cycle for the DC/DC converter (usually
95%).
Some margin should be maintained away from both Lmin and
Lmax. Adding margin by increasing L almost always adds
expense since all the variables are predetermined by system
performance except for CO, which must be increased to
increase L. Adding margin by decreasing L can be done by
purchasing capacitors with lower ESR. The FAN5061 provides significant cost savings for the newer CPU systems
that typically run at high supply current.
FAN5061 Short Circuit Current Characteristics
The FAN5061 protects against output short circuit on the
core supply by turning off both the high-side and low-side
MOSFETs. The FAN5061 short circuit current characteristic
includes a hysteresis function that prevents the DC-DC
converter from oscillating in the event of a short circuit. The
short circuit limit is set with the RS resistor, as given by the
formula
RS =
ISC *RDS, on
IDetect
13
Preliminary Specification
f
Output Enable/Soft Start (ENABLE/SS)
x
FAN5061
with IDetect ≈ 50µA, ISC is the desired current limit, and
RDS,on the high-side MOSFET’s on resistance. Remember to
make the RS large enough to include the effects of initial tolerance and temperature variation on the MOSFET’s RDS,on.
Alternately, use of a sense resistor in series with the source
of the MOSFET eliminates this source of inaccuracy in the
current limit.
0
5
10
15
20
25
Output Current (A)
Figure 4. FAN5061 Short Circuit Characteristic
The converter exhibits a normal load regulation characteristic
until the voltage across the MOSFET exceeds the internal
short circuit threshold of 50µA * 8.2KΩ = 410mV, which
occurs at 410mV/25mΩ = 16.4A. (Note that this current limit
level can be as high as 410mV/15mΩ = 27A, if the MOSFET
has typical RDS,on rather than maximum, and is at 25°C).
If the current exceeds this limit for more than 30µsec, the
FAN5061 shuts down all of its outputs, including its linear
regulators. They remain shut down until power is recycled.
Similarly, if any of the linear regulator outputs are loaded
heavily enough that their output voltage drops below 80% of
nominal, all FAN5061 outputs, including the switcher, are
shut off and remain off until power is recycled.
Schottky Diode Selection
The application circuit of Figure 1 shows a Schottky diode,
D1, which is used as a free-wheeling diode to assure that the
body-diode in Q2 does not conduct when the upper MOSFET
is turning off and the lower MOSFET is turning on. It is
undesirable for this diode to conduct because its high forward
voltage drop and long reverse recovery time degrades efficiency,
and so the Schottky provides a shunt path for the current.
Since this time duration is very short, the selection criterion
for the diode is that the forward voltage of the Schottky at
the output current should be less than the forward voltage of
the MOSFET’s body diode.
14
The output bulk capacitors of a converter help determine its
output ripple voltage and its transient response. It has already
been seen in the section on selecting an inductor that the ESR
helps set the minimum inductance, and the capacitance value
helps set the maximum inductance. For most converters,
however, the number of capacitors required is determined by
the transient response and the output ripple voltage, and these
are determined by the ESR and not the capacitance value.
That is, in order to achieve the necessary ESR to meet the
transient and ripple requirements, the capacitance value
required is already very large.
The most commonly used choice for output bulk capacitors is
aluminum electrolytics, because of their low cost and low ESR.
The only type of aluminum capacitor used should be those that
have an ESR rated at 100kHz. Consult Application Bulletin
AB-14 for detailed information on output capacitor selection.
VOUT (V)
Preliminary Specification
As an example, Figure 4 shows the typical characteristic of
the DC-DC converter circuit with an FDB6030L high-side
MOSFET (RDS = 20mΩ maximum at 25°C * 1.25 at 75°C =
25mΩ) and a 8.2KΩ RS.
Output Filter Capacitors
The output capacitance should also include a number of
small value ceramic capacitors placed as close as possible to
the processor; 0.1µF and 0.01µF are recommended values.
Input Filter
The DC-DC converter design may include an input inductor
between the system +5V supply and the converter input as
shown in Figure 5. This inductor serves to isolate the +5V
supply from the noise in the switching portion of the DC-DC
converter, and to limit the inrush current into the input capacitors during power up. A value of 2.5µH is recommended.
It is necessary to have some low ESR aluminum electrolytic
capacitors at the input to the converter. These capacitors
deliver current when the high side MOSFET switches on.
Figure 5 shows 3 x 1000µF, but the exact number required
will vary with the speed and type of the processor. For the
top speed Katmai and Coppermine, the capacitors should be
rated to take 9A and 6A of ripple current respectively.
Capacitor ripple current rating is a function of temperature,
and so the manufacturer should be contacted to find out the
ripple current rating at the expected operational temperature.
For details on the design of an input filter, refer to Applications Bulletin AB-15.
2.5µH
Vin
5V
1000µF, 10V
Electrolytic
0.1µF
Figure 8. Input Filter
FAN5061
Active Droop™
Using the FAN5061 for Vnorthbridge = 1.8V
The FAN5061 includes active droop; as the ouptut current
increases, the output voltage drops. This is done in order to
allow maximum headroom for transient response of the converter. The current is sensed by measuring the voltage across
the high-side MOSFET during its on time. Note that this makes
the droop dependent on the temperature of the MOSFET. However, when the formula given for selecting RS (current limit) is
used, there is a maximum droop possible (-40mV), and when
this value is reached, additional drop across the MOSFET will
not cause any increase in droop—until current limit is reached.
Similarly, the FAN5061 can also be used to generate Vnorthbridge = 1.8V by utilizing the AGP regulator as shown in
Figure 6: tie the TYPEDET pin to ground, and use R = 2KΩ.
Remote Sense
The FAN5061 offers remote sense of the output voltage to
minimize the output capacitor requirements of the converter.
It is highly recommended that the remote sense pin, Pin 16,
be tied directly to the processor power pins, so that the
effects of power plane impedance are eliminated. Further
details on use of the remote sense feature of the FAN5061
may be found in Applications Bulletin AB-24.
Adjusting the Linear Regulators’ Output Voltages
Any or all of the linear regulators’ outputs may be adjusted
high to compensate for voltage drop along traces, as shown
in Figure 6.
VGATE
VOUT
R
VFB
10KΩ
Figure 6. Adjusting the Output Voltage of the Linear
Regulator
R = 10KΩ*
Vnom
¥ In general, all of the noisy switching lines should be kept
away from the quiet analog section of the FAN5061. That
is, traces that connect to pins 1, 2, 19, and 20 (HIDRV, SW,
LODRV and VCCP) should be kept far away from the
traces that connect to pins 3, 16 and 17.
¥ Place the 0.1µF decoupling capacitors as close to the
FAN5061 pins as possible. Extra lead length on these
reduces their ability to suppress noise.
¥ Each VCC and GND pin should have its own via to the
appropriate plane. This helps provide isolation between pins.
¥ Place the MOSFETs, inductor, and Schottky as close
together as possible for the same reasons as in the Þrst
bullet above. Place the input bulk capacitors as close to
the drains of the high side MOSFETs as possible. In
addition, placement of a 0.1µF decoupling cap right on
the drain of each high side MOSFET helps to suppress
some of the high frequency switching noise on the input
of the DC-DC converter.
¥ Place the output bulk capacitors as close to the CPU as
possible to optimize their ability to supply instantaneous
current to the load in the event of a current transient.
Additional space between the output capacitors and the
CPU will allow the parasitic resistance of the board traces
to degrade the DC-DC converterÕs performance under
severe load transient conditions, causing higher voltage
deviation. For more detailed information regarding
capacitor placement, refer to Application Bulletin AB-5.
¥ A PC Board Layout Checklist is available from Fairchild
Applications. Ask for Application Bulletin AB-11.
PC Motherboard Sample Layout and Gerber File
The resistor value should be chosen as
Vout
¥ Placement of the MOSFETs relative to the FAN5061 is
critical. Place the MOSFETs such that the trace length of
the HIDRV and LODRV pins of the FAN5061 to the FET
gates is minimized. A long lead length on these pins will
cause high amounts of ringing due to the inductance of the
trace and the gate capacitance of the FET. This noise radiates
throughout the board, and, because it is switching at such
a high voltage and frequency, it is very difÞcult to suppress.
–1
A reference design for motherboard implementation of the
FAN5061 along with the PCAD layout Gerber file and silk
screen can be obtained from our marketing department at
650-962-7833.
For example, to get the VTT voltage to be 1.55V instead of
1.50V, use R = 10KΩ * [(1.55/1.50) – 1] = 333Ω.
15
Preliminary Specification
Additional droop can be added to the active droop using a
discrete resistor (typically a PCB trace) outside the control
loop, as shown in Figure 2. This is typically only required for
the most demanding applications, such as for the next generation Intel processor (tolerance = +40/-70mV), as shown in
Figure 2.
PCB Layout Guidelines
FAN5061
FAN5061 Evaluation Board
Number of capacitors needed fo Cout = the greater of:
Fairchild provides an evaluation board to verify the system
level performance of the FAN5061. It serves as a guide to
performance expectations when using the supplied external
components and PCB layout. Please call the marketing
department at 650-962-7833 for an evaluation board.
VT-
or
Additional Information
Preliminary Specification
Worst-Case Formulae for the Calculation of
Cout, R5, and Cin (Circuit of Figure 1 only)
The following formulae design the FAN5061 for worst-case
operation, including initial tolerance and temperature dependence of all of the IC parameters (initial setpoint, reference
tolerance and tempco, active droop tolerance, current sensor
gain), the initial tolerance and temperature dependence of
the MOSFET, and the ESR of the capacitors. The following
information must be provided:
VT+, the value of the positive transient voltage limit;
ESR * IO
Y=
For additional information contact Fairchild Semiconductor’s
Analog & Mixed Signal Products Group Marketing Department
at 650-962-7833.
Appendix
ESR * IO
X =
VT+ –0.004 * Vnom +
14400 * IO * RD
18 * R5 * 1.1
Example: Suppose that the transient limits are ±134mV, current I is 14.2A, and the nominal voltage is 2.000V, using
MOSFET current sensing and the usual caps. We have VT+ =
|VT-| = 0.134, IO = 14.2, Vnom = 2.000, and ∆RD = 0.67. We
calculate:
2.000
–
14.2 *
2.000
5
5
Cin =
2
= 3.47 ⇒ 4 caps
2
R5 =
14.2 * 0.020 * (1 + 0.67) * 1.0
= 10.4KΩ
50 * 10-6
|VT-|, the absolute value of the negative transient voltage
limit;
0.044 * 14.2
X =
IO, the maximum output current;
0.044 * 14.2
Vnom, the nominal output voltage;
Y =
0.134 – 0.004 * 2.000 +
Vin, the input voltage (typically 5V);
ESR, the ESR of the ouput caps, per cap (44mΩ for the
Sanyo parts shown in this datsheet);
RD, the on-resistance of the MOSFET (20mΩ for the
FDB6030);
∆RD, the tolerance of the current sensor (usually about 67%
for MOSFET sensing, including temperature).
Irms, the rms current rating of the input caps (2A for the
sanyo parts shown in this datasheet.)
2
IO *
Vnom
–
Vin
Vnom
Vin
Cin =
Irms
R5 =
IO* RD * (1 + ∆RD) * 1.10
50 * 10-6
16
= 4.66
0.134
= 4.28
14400 * 14.2 * 0.020
18 * 10400 * 1.1
Since X > Y, we choose X, and round up to find we need 5
capacitors for COUT.
FAN5061
Mechanical Dimension
20-Lead SOIC
Inches
Symbol
Min.
Max.
Min.
Notes
.093
.104
.004
.012
.013
.020
.009
.013
.496
.512
.291
.299
.050 BSC
2.35
2.65
0.10
0.30
0.33
0.51
0.23
0.32
12.60
13.00
7.40
7.60
1.27 BSC
.394
.010
.016
10.00
0.25
0.40
.419
.029
.050
20
10.65
0.75
1.27
20
0°
8°
0°
8°
—
.004
—
0.10
20
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
Max.
2. "D" and "E" do not include mold flash. Mold flash or
protrusions shall not exceed .010 inch (0.25mm).
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5
2
2
5. "C" dimension does not include solder finish thickness.
6. Symbol "N" is the maximum number of terminals.
Preliminary Specification
A
A1
B
C
D
E
e
H
h
L
N
α
ccc
Notes:
Millimeters
3
6
11
E
1
H
10
h x 45°
D
C
A1
A
e
B
SEATING
PLANE
–C–
LEAD COPLANARITY
α
L
ccc C
17
FAN5061
Ordering Information
Package
FAN5061M
20 pin SOIC
Preliminary Specification
Product Number
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
8/11/99 0.0m 009
Stock#DS30005057
 1998 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN5201
Chemistry Independent Intelligent Battery Charger
Applications
¥
¥
¥
¥
¥
¥
¥
¥
¥
¥
¥
¥
¥
¥
¥
¥ NotebooksÕ fast chargers
¥ PDAs
¥ Hand-held portable instruments
¥
¥
¥
¥
¥
Chemistry independent charging
SMBusª 2-wire serial interface controlled
Independent Voltage, Current and Power DACs
6A maximum charging current
4Ð19V battery voltage range
24V maximum input voltage
5V Òkeep aliveÓ regulator controller onboard
100% maximum duty-cycle
Synchronous rectiÞcation
System soft start protects during hot plug-ins
Latched current limit protection
Output over-voltage protection (crowbar)
Input under-voltage lockout
Battery backfeed prevented
Optimized response for each control loop (current,
voltage and power)
Power down driven by SMBus or by adapter not available
or by softstart pin
Controlled drive of discrete FETs minimizes power
dissipation
Logic signal ACAV indicates presence of AC adapter
(adjustable threshold)
Output current ÒmotorboatingÓ prevented
True power multiplier
Description
The FAN5201 is a smart battery charger IC controller for
Li+ and Ni based battery chemistries. The charger (slave)
together with the host controller and smart battery constitutes
a smart battery system that communicates via the SMBus
protocol, a two wire serial communication system.
An innovative power control loop allows operation from line
power and battery charging (with residual power) without
exceeding the maximum input power programmed according
to the AC adapter power rating.
The FAN5201 is available in one SSOP24 package.
IthILIM
22 Vth
10
7
8
AM5V
3
IthINISO
DIG5V
4
PSIN
LODRV
2
VFB
HIDRV
9
IFB
11
BAT
13
DRV
18
INISO
SSIN/ILIM
16 17
PSIN-
15
PSIN+
14
DCIN
Block Diagram
SGND
-+
19
+ VTRIANG
PGND
-+
+-
+I_DAC
23 ACAV
V_DAC
12
P_DAC
X
SMBUS
SCL
24
SDA
CompP
20
SMBus is a trademark of Intel Corporation
CompV
6
CompI
5
SS
1
21
Rev. 0.8.2
Preliminary Specification describes products that are not in full production at the time of printing. Specifications are based on design goals and
limited characterization. They may change without notice. Contact Fairchild Semiconductor for current information.
Preliminary Specification
Features
FAN5201
SMBus Functional Description
To Control
Signals
To DACs:
Voltage
Current
Power
Oscillator
Reset (POR)
Preliminary Specification
SMBus
24
SCL
VOLTAGE_NOTREG
CURRENT_NOTREG
VOLTAGE_OR
CURRENT_OR
POWER_FAIL
ZERO CURRENT DETECT
1
SDA
Figure 1. Internal SMBus Configuration
Pin Assignments
2
SDA
1
24
IFB
2
23
ACAV
VFB
3
22
Vth
BAT
4
21
SS
CompI
5
20
CompP
CompV
6
19
SGND
DIG5V
7
18
INISO
AM5V
8
17
PSIN-
DRV
9
16
PSIN+
PSIN
10
15
SSIN/ILIM
LODRV
11
14
DCIN
PGND
12
13
HIDRV
FAN5201
SCL
FAN5201
Pin Descriptions
Pin Number
Pin Name
Pin Function Description
SDA
Serial Data. SMBus data I/O.
IFB
Current Feedback. Output current sense +. Connect this pin to the positive side of
a battery current sense resistor.
3
VFB
Voltage Feedback. Voltage remote sense feedback. Connect this pin to the battery
terminals.
4
BAT
Battery. Output current sense -. Connect this pin to the negative side of a battery
current sense resistor.
5
CompI
Current Compensation. Frequency compensation for current loop.
6
CompV
Voltage Compensation. Frequency compensation for voltage loop.
7
DIG5V
5V Digital Input. 5V internal power.
8
AM5V
5V Analog Input. Connect to 5V power. See Figure 4.
9
DRV
Drive. Base (gate) drive for external PNP (P-channel MOSFET).
10
PSIN
Power Supply. Power source node, powered either by the AC adapter or by the
battery.
11
LODRV
Low Side FET Driver. Drive for low side switching MOSFET Q4.
12
PGND
Power Ground.
13
HIDRV
High Side FET Driver. Drive for high side switching MOSFET Q3.
14
DCIN
15
SSIN/ILIM
Soft Start and Current Limit. Connect to an external MOSFET for limiting inrush
and fault current.
16
PSIN+
Input Power Sense +. Connect this pin to the positive side of an adapter current
sense resistor.
17
PSIN-
Input Power Sense -. Connect this pin to the negative side of an adapter current
sense resistor.
18
INISO
Input Isolation Drive. Q2 gate drive. Attach to a P-channel MOSFET to prevent
battery backfeed.
19
SGND
Signal Ground. Attach all small signal grounds to this pin, and attach the pin to the
ground plane with a single connection.
20
CompP
Power Compensation. Frequency compensation for power loop.
21
SS
Soft Start. Connect to a capacitor to softstart.
22
Vth
Voltage Threshold. Sets the level at which ACAV trips.
23
ACAV
24
SCL
DC Power Input. Connect to the AC adapter input.
AC Available. Open collector output signaling that the AC adapter is present.
Serial Clock. SMBus clock input.
3
Preliminary Specification
1
2
FAN5201
Absolute Maximum Ratings1
Parameter
Conditions
Min.
Max.
Unit
DCIN
30
V
PSIN+, PSIN-
30
V
70
°C
Ambient Temperature, TA
Typ.
0
Maximum Power Dissipation
SSOP24, TJ = 125°C
TBD
W
Preliminary Specification
Note:
1. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if Operating
Conditions are not exceeded.
Operating Conditions
DCIN = 19V, TA = 0-70°C, unless otherwise specified.
Parameter
Conditions
Min.
Internal 5V
External 5V
Typ.
Max.
Unit
8
24
V
6
24
V
Supply and Reference
DCIN Input Supply Voltage
DCIN Quiescent Current
PSIN Current
3
mA
Power Down, Note 1
Operation
200
µA
Operation
300
Power Down, Note 1
5V Accuracy
I < 10mA
DRV Output Sink Current
140
-4
200
µA
4
%
1
mA
4
V
Maximum Duty Cycle
100
%
Oscillator Frequency
225
Switching Regulator
Vbat,min
HIDRV ON Resistance
IOUT = 32mA
275
kHz
High
4
7
Ω
Low
4
7
Ω
100
mV
HIDRV High Output, VDCIN – VHI
I = 10µA
HIDRV Low Output, VDCIN – VLO
I = 10µA
LODRV ON Resistance
High
5
Low
LODRV High Output
250
I = 10µA, AM5V = DIG5V = %5v
V
4
7
Ω
4
7
Ω
4.5
V
LODRV Low Output
100
mV
132
mV
Analog Functions
Input Current Limit Threshold
108
Input UVLO
5.4
V
400
mV
Vtriang Amplitude, pk-pk
950
mV
Vtriang Mean
2.5
V
Vtriang gain from DCIN
50
mV/V
Psense Amplifier CMRR
60
dB
Psense Amplifier CMRR @ 250kHz
32
dB
VFB Leakage
4
6.6
Input UVLO Hysteresis
Operation
30
Power Down, Note 1
1
µA
FAN5201
Operating Conditions (Continued) DCIN = 19V, TA = 0-70°C, unless otherwise specified.
Parameter
BAT, IFB Leakage
Conditions
Min.
Typ.
Operation
Power Down, Note 1
Output Overvoltage Threshold
107
Vthreshold ACAV
Rt1 = 9KΩ, Rt2 = 1KΩ
Vhysteresis ACAV
Rt1 = 9KΩ, Rt2 = 1KΩ
110
5.4
Max.
Unit
TBD
µA
10
µA
113
%Vout
6.6
V
400
mV
Battery POWER_FAIL Threshold
5.4
6.6
V
CURRENT_NOTREG
90
110
%Ireg
VOLTAGE_NOTREG
90
110
%Vreg
Ith = Vth/RS1
3.6
mV
Backfeed Current Threshold
Ith = Vth/RS2
3.6
mV
Zero Current Detect Threshold
9.7
mV
VOLTAGE_OR Threshold
110
%Vout
CURRENT_OR Threshold
110
112
mV
AC_PRESENT Threshold
5.4
6.6
V
AC_PRESENT Hysteresis
400
Soft Start Current
Soft Start Disable
mV
2
Output disabled
µA
800
Over-temperature Shutdown
Preliminary Specification
Input Isolation Current Threshold
150
mV
°C
Digital Functions
Current DAC Resolution
Current DAC Accuracy
Current DAC Differential Nonlinearity
Current DAC Integral Nonlinearity
Bits
-5
+5
%FS
-1/2
+1/2
LSB
-2
+2
LSB
2
msec
Current DAC Conversion Time
Current DAC Voltage Offset
8
0
Voltage DAC Resolution
Voltage DAC Accuracy
Voltage DAC Differential Nonlinearity
Voltage DAC Integral Nonlinearity
8
Bits
-5
+5
%Vout
-1/2
+1/2
LSB
-2
+2
LSB
2
msec
Voltage DAC Conversion Time
Power DAC Resolution
Power DAC Accuracy
Power DAC Differential Nonlinearity
Power DAC Integral Nonlinearity
mV
4
Bits
-5
+5
%FS
-1/2
+1/2
LSB
-2
+2
LSB
2
msec
Power DAC Conversion Time
Switches Q1, Q2
SSIN/ILIM Source Current, pk
10
SSIN/ILIM Sink Current, pk
35
SSIN/ILIM High Output, VDCIN – VHI
SSIN/ILIM Low Output, VDCIN – VLO
INISO ON Sink Current
VDCIN = 19V
10
VDCIN = 10V
8
mA
65
µA
100
mV
12
V
50
µA
V
5
FAN5201
Operating Conditions (Continued) DCIN = 19V, TA = 0-70°C, unless otherwise specified.
Parameter
Conditions
Min.
VDCIN = 19V
10
VDCIN = 10V
8
Typ.
INISO High Output, VDCIN – VHI
INISO Low Output, VDCIN –VLO
Max.
Unit
100
mV
12
V
V
SMBus
Data/Clock input low voltage, VIL
Data/Clock input high voltage, VIH
Data/Clock output low voltage, VOL
-0.3
0.6
V
1.4
5.5
V
0.4
V
At IPULLUP MIN
Preliminary Specification
Data/Clock hysteresis, VHYS
200
Input leakage, ILEAK
mV
-1
1
µA
Current through pullup resistor or
current source, IPULLUP
100
350
µA
SMB operating frequency, FSMB
10
100
kHz
Bus free time between Stop and Start
condition, TBUF
4.7
µsec
4.0
µsec
4.7
µsec
Hold time after (repeated) Start
condition, THD:STA
After this period, the first clock is
generated
Repeated Start condition setup time,
TSU:STA
Stop condition setup time, TSU:STO
4.0
µsec
Data hold time, THD:DAT
300
nsec
Data setup time, TSU:DAT
250
nsec
TTIMEOUT
Note 2
25
35
4.7
Clock low period, TLOW
Clock high period, THIGH
Note 3
Cumulative clock low extend time,
TLOW:SEXT
Note 4
4.0
msec
µsec
50
µsec
25
msec
Clock/Data fall time, TF
300
nsec
Clock/Data rise time, TR
1000
nsec
Notes:
1. 5V DRV Current = 0, SMBus off.
2. A device will timeout when any clock low exceeds this value.
3. THIGH Max provides a simple guaranteed method for devices to detect bus idle conditions.
4. TLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from the initial start to
the stop. If a slave device exceeds this time, it is expected to release both its clock and data times and reset itself.
6
FAN5201
Applications Discussion
Overview
Setting V0, I0 and P0
The FAN5201’s voltage-, current-, and power-limits can be
set via the Intel System Management Bus (SMBus™) 2-wire
serial interface. The FAN5201’s logic interprets the serialdata stream from the SMBus interface to set internal digitalto-analog converters (DACs) appropriately. See the
FAN5201 Logic section and SMBus Interface Specification
for more information.
The FAN5201analog section consists of 1) three transconductance error amplifiers, one for regulating current, one for
regulating voltage, and one for regulating system power, 2)
a PWM controller, with its associated gate drivers, and 3)
miscellaneous control and reference functions, consisting of
an AC present signal, 5V reference, inrush current limiter,
reverse feed protection, and a soft start circuit.
The FAN5201 uses DACs to set the current, voltage and
power levels, which are controlled via the SMBus interface.
Since separate amplifiers are used for each of these controls,
each of the control loops can be compensated separately for
optimum stability and response in each state.
Whether the FAN5201 is controlling the voltage, current or
power at any time depends on the battery’s state. If there is
adequate power available from the charger, and if the battery
has been discharged, the FAN5201’s output reaches the current-regulation limit before the voltage limit, causing the system to regulate current. As the battery charges, the voltage
rises until the voltage limit is reached, and the charger
switches to regulating voltage. On the other hand, if there is
not enough power available for both the notebook and the battery charging, the FAN5201 regulates charging current at
such a level as to respect the maximum power limit. When
the voltage limit is reached, the charger will similarly switch to
regulating voltage. The transitions from current to voltage
regulation, or from power to voltage regulation, are done by
the charger, and need not be controlled by the host.
VO = Voltage Setpoint
Battery
Voltage
IO = Current Setpoint
PO = Power Setpoint
VO
PO Limited
Average Current
IO
Through the
Resistor Between
IFB andBAT
Figure 2. V-I-P Characteristic of FAN5201. If power is available, the battery is charged at a rate I0 until it reaches V0.
As power becomes limiting, the charge current is reduced.
7
Preliminary Specification
The FAN5201 contains three control loops: a voltage-regulation loop, a current-regulation loop and a power-regulation
loop. All three loops operate independently of each other.
They are or’red internally to optimize the battery charging
while the notebook is drawing power in its normal operation.
The voltage-regulation loop monitors the battery to ensure
that its voltage is held at the voltage set point (V0). The current-regulation loop monitors current delivered to the battery
to ensure that it regulates at the current-limit set point (I0).
The power-regulation loop monitors total input power, to
both the battery and the notebook, to ensure that total power
drawn from the charger never exceeds the maximum power
set point (P0). Assuming that there is adequate power available from the charger, the current-regulation loop is in control as long as the battery voltage is below V0. When the
battery voltage reaches V0, the current loop no longer regulates, and the voltage-regulation loop takes over. If on the
other hand there is not adequate power available from the
charger, the power-regulation loop is in control, and limits the
charging of the battery in order to guarantee enough power for
the notebook. Figure 2 shows the V-I-P characteristic at the
battery.
Analog Section
FAN5201
Preliminary Specification
Voltage Control Loop
The internal transconductance voltage amplifier controls the
FAN5201’s output voltage. The battery voltage is fed to the
non-inverting input of the amplifier from the VFB pin. The
voltage at the amplifier’s inverting input is set by an 8-bit DAC,
which is controlled by a ChargingVoltage( ) command on the
SMBus (See the FAN5201 Logic section and SMBus Interface Specification for more information). The output of the
amplifier drives an inverting “or’ring” transistor; the or’ring
provides control of the PWM to the lowest of the three amplifiers, while the inversion provides the negative feedback
needed for proper control. The ChargingVoltage( ) command
of the SMBus provides a 10.000V offset, and 32mV steps, so
that the charging voltage can be anywhere from 10.000V to
10.000V + 255 * 32mV = 18.16V. Because a lithium-ion
(Li+) battery’s typical per-cell voltage is 4.2V maximum, this
charger is best suited for 3- and 4-cell batteries. It can also be
used for several different cell counts with NiMH batteries.
The voltage amplifier’s output is connected to the CompV pin,
which compensates the voltage-regulation loop. Typically, a
series-resistor/capacitor combination is used to form a polezero pair. The pole introduced rolls off the gain starting at low
frequencies. The zero provides AC gain at mid-frequencies.
The output capacitor of the switcher then rolls off the midfrequency gain to below 1 to guarantee stability, before
encountering the zero introduced by the output capacitor’s
ESR. Further information on loop stabilization is available
in Applications Bulletin AB-18.
Current Control Loop
The internal transconductance current amplifier controls the
battery current while the charger is regulating current. Battery
current is sensed by monitoring the voltage across a sense
resistor (pins IFB and BAT) with an amplifier that removes
the common mode battery voltage. The battery current is fed
to the non-inverting input of the amplifier. The voltage at the
amplifier’s inverting input is set by an 8-bit DAC, which is
controlled by a ChargingCurrent( ) command on the SMBus
(See the FAN5201 Logic section and SMBus Interface Specification for more information). The output of the amplifier
drives an inverting “or’ring” transistor; the or’ring provides
control of the PWM to the lowest of the three amplifiers,
while the inversion provides the negative feedback needed
for proper control. The ChargingCurrent( ) command of the
SMBus provides 32mA steps with an 18mΩ sense resistor,
so that the charging current can be anywhere from 0.000A to
255 * 32mA = 8.16A.
The current amplifier’s output is connected to the CompI pin,
which compensates the current-regulation loop. Typically, a
series-resistor/capacitor combination is used to form a polezero pair. The pole introduced rolls off the gain starting at low
frequencies. The zero provides AC gain at mid-frequencies.
The output capacitor of the switcher then rolls off the midfrequency gain to below 1 to guarantee stability, before
encountering the zero introduced by the output capacitor’s
8
ESR. Further information on loop stabilization is available
in Applications Bulletin AB-18.
Power Control Loop
The internal transconductance power amplifier controls the
system’s total power consumption (notebook plus battery
charging). Input voltage is monitored on pin DCIN, and
input current is sensed by monitoring the voltage across a
sense resistor (pins PSIN+ and PSIN-) with an amplifier that
removes the common mode input voltage. These two signals
are then multiplied together with an analog multiplier, and
the result is fed to the non-inverting input of the amplifier.
The voltage at the amplifier’s inverting input is set by a 4-bit
DAC, which is controlled by a ChargingPower( ) command
on the SMBus (See the FAN5201 Logic section and SMBus
Interface Specification for more information). The output of
the amplifier drives an inverting “or’ring” transistor; the
or’ring provides control of the PWM to the lowest of the
three amplifiers, while the inversion provides the negative
feedback needed for proper control. The ChargingPower( )
command of the SMBus provides a 25W offset, and 5W
steps, so that the total power drawn can be anywhere from
25W to 25W + 15 * 5W = 100W.
The power amplifier’s output is connected to the CompP pin,
which compensates the power-regulation loop. Typically, a
series-resistor/capacitor combination is used to form a polezero pair. The pole introduced rolls off the gain starting at low
frequencies. The zero provides AC gain at mid-frequencies.
The output capacitor of the switcher then rolls off the midfrequency gain to below 1 to guarantee stability, before
encountering the zero introduced by the output capacitor’s
ESR. Further information on loop stabilization is available
in Applications Bulletin AB-18.
A sudden surge in power required by the notebook will result
in a momentary overload on the AC adapter. This has no ill
effects, because the power loop recovery time is much shorter
than the adapter's thermal time constant, and the minimum
adapter output voltage equals the battery voltage, which is
sufficient to run the notebook.
PWM Controller
The battery voltage or current or input power is controlled by
the pulse-width-modulated (PWM) DC-DC converter controller. This controller drives two external MOSFETs, an N- and
a P-channel, which switch the voltage from the input source.
This switched voltage feeds an inductor, which filters the
switched rectangular wave. The controller sets the pulse width
of the switched voltage so that it supplies the desired voltage
or current to the battery. The heart of the PWM controller is
its multi-input comparator. This comparator compares the
lowest of three input signals with a ramp, to determine the
pulse width of the switched signal, setting the battery voltage
or current. The three signals being or’red together are the
current-sense amplifier’s output, the voltage-error amplifier’s
output, and the power-error amplifier’s output.
FAN5201
When the voltage error amplifier is in control of the PWM,
the comparator adjusts the duty cycle of the switches, regulating the battery voltage and keeping it proportional to the
error voltage. In this mode, the control loop is a standard
voltage-mode control, and the only requirement to guarantee
stability is that the loop gain be rolled off below 0dB before
the LC resonant frequency.
When the power error amplifier is in control of the PWM,
the comparator adjusts the duty cycle of the switches, regulating the total power drawn from the charger. The loop
determines whether the total power available from the wall
adapter is sufficient to provide both the load and battery
charging needs. If not, the charging power to the battery is
reduced by the amount needed to keep the total demand
within the AC-DC output power limit of the adapter.
The PWM controller also implements voltage feedforward.
This means that the gain of the control loops are adjusted
inversely proportionally to the input voltage: as the input
voltage increases, loop gain is decreased. This improves the
audio susceptibility of the converter, and in particular, means
that the bandwidth of each of the loops is relatively independent of the AC adapter voltage. Feedforward is accomplished
by modulating the amplitude of the ramp signal.
MOSFET Drivers
The FAN5201 drives external MOSFETs to regulate battery
voltage or current, a high-side P-channel and a low-side
N-channel for synchronous rectification. Use of a P-channel
MOSFET for the high-side switch permits operation without
charge-pumping and its attendant external components. The
synchronous rectifier behaves like a diode, but with a smaller
voltage drop to improve efficiency. A small dead time is
added between the time that the high-side MOSFET turns off
and the synchronous rectifier turns on, and vice versa. This
prevents shootthrough currents (currents that flow through
both MOSFETs during the brief time that one is turning on
and the other is turning off). A schottky rectifier from the
source to the drain of Q4 prevents the synchronous rectifier’s
body diode from conducting. The body diode typically has
slower switching-recovery times, so allowing it to conduct
would degrade efficiency.
Control and Reference Functions
The FAN5201 has a number of additional analog functions
to enhance overall system performance. The ACAV is an
open collector signal that can be used to determine the presence of the AC charger; its threshold is set by an external
resistor divider attached the Vth pin.
A 5V keep alive linear regulator receives power either from
the AC adapter via Q1 or from the battery (PSIN pin). This
regulator can provide up to 10mA to power memory during
a system shutdown.
Protection Circuitry
The FAN5201 protects against a variety of possible fault or
problem conditions.
Input Protection
Inrush current can be a problem during hot plug-in if in front
of the switching regulator a large capacitor is used to decouple
noise. Conceivably, the inrush could be high enough to trip
on overcurrent protection in the AC adapter. The FAN5201
provides the means for limiting inrush current to any desired
value: The SSIN/ILIM pin provides a sink current of 65µA
maximum to turn on the gate of the P-channel MOSFET Q1,
so that selecting a gate-source capacitance on Q1 will slow its
turn-on time to any desired speed, thus restricting the amount
of inrush current.
The charger has its own local soft start, which controls the
maximum duty cycle of the PWM. The softstart time is set
by selecting a capacitor attached to the SS pin. The softstart
pin can also be used for a hard shutdown, by pulling it to
ground.
While the AC adapter is not present, the FAN5201 shuts
itself off, using an UVLO set at 6.0V.
If the AC adapter is connected to the FAN5201 circuit but is
not plugged in, the adapter could present a load to the battery. The FAN5201 prevents this by turning off Q2 (attached
to the INISO pin) if the input current falls below 200mA
(with an 18mΩ sense resistor). However, this function is disabled until the softstart pin reaches steady state.
Output Protection
If input current exceeds the design of the FAN5201 (6A with
an 18mΩ sense resistor) the IC latches off Q1, disconnecting
the circuitry from input power within a few microseconds.
9
Preliminary Specification
When the current-sense amplifier is in control of the PWM,
the comparator adjusts the duty cycle of the switches, regulating the average battery current and keeping it proportional
to the error voltage. The current is averaged, rather than
peak, since the current sense resistor is between the output
capacitor and the battery. Since the average battery current is
nearly the same as the peak current, the controller acts as a
transconductance amplifier, reducing the effect of the inductor
on the output filter LC formed by the output inductor and the
output capacitance. This makes stabilizing the circuit easy, since
the output filter changes from a complex second-order RLC
to a first-order RC. To preserve the inner current-control
loop’s stability, slope compensation is also fed into the comparator. This damps out perturbations in the pulse width at
duty ratios greater than 50%. At heavy loads, the PWM controller switches at a fixed frequency and modulates the duty
cycle to control the battery current. At light loads, the DC
current through the inductor is not sufficient to prevent the
current from going negative through the synchronous rectifier
(Figure 2, Q4). The controller monitors the current through
the sense resistor; when it drops to below 200mA, the synchronous rectifier turns off to prevent negative current flow.
FAN5201
If one AC adapter is connected when the battery is not
present, the overcurrent limit does not disable the converter
because Q1 acts as an inrush current limit.
Preliminary Specification
If the battery voltage exceeds certain levels, internal protection
in the battery may open. To prevent this, the FAN5201
latches off Q1, Q3 and Q4 if the output voltage exceeds
approximately 110% of the setpoint.
Programming a µP Interface for the FAN5201
The µP programmer must bear in mind that the FAN5201
operates as a slave device to the host µP; all communications
to the battery are via the host. Thus, in particular, the ChargingCurrent(), ChargingVoltage(), and AlarmWarning() commands (and thermistor signals for Ni based batteries) must
all be passed to the µP. There is no way to send them directly
to the charger.
The power converter is a synchronous buck for efficiency.
This topology is actually two-quadrant, and could potentially
draw current from the battery, boosting it high enough to
override the AC adapter. To prevent this backfeed, the
FAN5201 turns off the synchronous rectifier if the current into
the battery drops below 200mA (with an 18mΩ sense resistor), utilizing instead the paralleled schottky.
Another important aspect for the programmer to be aware of
is that at power-up, all of the internal registers of the
FAN5201 are zeroed. Thus, in order to have the FAN5201
turn on, it is necessary to write to all of the DACs. It is also
recommended to write to the Control Signals Word before
writing to the DACs.
If the internal overvoltage switch in the battery were to open
due to a high charge current producing a high voltage (due to
battery ESR), the voltage loop would take over. With the
voltage loop in control, the battery switch would close, and
the current could surge high until the current control loop
comes out of saturation. The FAN5201 prevents this type of
oscillation by means of a special loop controlling the error
amplifier of the current loop.
With these suggestions in mind, a possible flowchart for the
µP interface to the FAN5201 would be as shown in Figure 3.
In the first step, the battery charge requests are read; after
this the FAN5201 can be programmed. First, the FAN5201 is
left in Power Down until the programming has been successful. Next, Charging Power, Current, and Voltage are set; the
FAN5201 will not operate until all three have been written.
The µP next checks that all of the data has been correctly
written; if not, the programming sequence is retried. Finally,
the Power Down signal is turned off.
Battery Conditioning
With switch B1 off (see Figure 5), the notebook load can be
applied to the batteries even in the presence of the DC adapter.
This permits deep discharge of the batteries as part of the
battery conditioning process.
Battery Present
The presence of the battery can be detected by the host
microcontroller.
Logic Section
The FAN5201 uses serial data to control its operation. The
serial interface is compliant with the SMBus specification
(see “System Management Bus Specification”, Rev. 1.08).
Charger functionality is compatible with an extended subset
of the Intel/Duracell Smart Charger Specification for a level 2
charger. The FAN5201 uses the SMBus Read-Word, WriteWord, and Block-Read protocols to communicate with the
host system that monitors the battery. The FAN5201 never initiates communication on the bus; it only receives commands
and responds to queries for status information. Figure 9
shows examples of the SMBus Write-Word and Read-Word
protocols. Each communication with the FAN5201 begins
with a start condition that is defined as a falling edge on SDA
with SCL high. The device address follows the start condition. The FAN5201 device address is 0001001b (b indicates
a binary number). Note that the address is only seven bits, and
the binary representation uses R/W as its least significant bit.
10
Application Schematics and BOMs
Figure 4 shows the FAN5201 in a single battery pack system.
Figure 5 shows the FAN5201 in a two battery pack system.
In a two battery system, the host microcontroller must poll to
determine the state of each battery; and then a selector must
control the switches. Figure 4 shows a typical Smart Battery
system: for Ni based chemistries the temperature information is handled directly by the µC. The µC continuously
monitors the SMBus; in case of communications breakdown
the µC detects this and takes appropriate action. For a NiMH
battery, a hardware overtemperature protection can be implemented using a comparator on the thermistor line, and turning the softstart pin off.
Notice that Q1 through Q4 are drawn with the associated
intrinsic diode in Figure 4 and Figure 5.
FAN5201
Read Battery
ChargingCurrent( )
and ChargingVoltage( )
Write Charging Power( )
to FAN5201
Preliminary Specification
Write Charging Current( )
to FAN5201
Write Charging Voltage( )
to FAN5201
Read Charge Settings( )
from FAN5201
N
Charger
Settings
Correct?
Y
Write 0x02 to the
Control Signals Register
Figure 3. Suggested Flowchart for FAN5201 Startup
11
FAN5201
Q2
Q1
D1
Q3
L1
R S1
From AC
Adapter
Q4
CIN
To
Notebook
C1
R1
Cr
CILIM
D3
RS 2
D2
Q5
13 14
15
16
17 18
19
+ 5V
CSS
ACAV
20 21 22 23 24
RP
+5V
CP
Preliminary Specification
Rt1
U1
FAN5201
12
11
10
9
8
7
6
C2
Rt2
5
4
3
2
1
R2
C3
RV
RI
CI
CI
SCL
SDA
Figure 4. Single Battery Pack System
Table 1. Bill of Materials for Single Battery Pack System (8A maximum current)
Reference
Manufacturer
Manufacturer’s P/N
CV, CI, CILIM
C1,Cr
AVX
Description
3
100nF 20% 50V Ceramic Chip Cap
2
100µF 20V 85mΩ Tantalum Chip Cap
CSS
1
10nF 20% 50V Ceramic Chip Cap
C2–3
2
10µF, 10V Tantalum Chip Cap
RV
1
10KΩ 1% 1/10W
Rt1
1
9.09KΩ 1% 1/10W
Rt2, RI
1
1KΩ 1% 1/10W
RS1-2
2
18mΩ 1W SM
R1
Dale
1
100KΩ 1/10W
CP
1
970nF Ceramic Chip cap
RP, R2
2
10Ω 1/10W
WSL-2512-R018
IHSM-7832-5.6µH
1
5.6µH 6A 25mΩ SM Inductor
L1
Dale
Q1-2
Fairchild
NDS8435A
2
30V 23mΩ SO8 P-channel
Q3
Fairchild
FDS9435A
1
30V 50mΩ SO8 P-channel
Q4
Fairchild
FDS6612A
1
30V 10mΩ SO8 N-channel
FZT704CT
1
100V 2A SOT223 PNP Darlington
Q5
12
TPSV107*020R0085
Quantity
D1-3
Motorola
MBRD835L
3
35V 8A Schottky
U1
Fairchild
FAN5201
1
SSOP24 Controller
FAN5201
B1
Q2
Q1
B2
Q3
L1
R S1
From AC
Adapter
Q4
CIN
Cr
CILIM
RS 2
B5
B4
C1
R1
B3
B6
D2
To
Notebook
Q5
B7
CSS
ACAV
13 14
15
16
17 18
19
20 21 22 23 24
+ 5V
RP
C2
+5V
CP
Rt1
12 11
10
9
8
7
6
Preliminary Specification
U1
FAN5201
Rt2
5
4
3
2
1
R2
C3
RV
RI
CV
CI
SCL
SDA
Figure 5. Two Battery Pack System
SMART
BATTERY
FAN5201
Power
& GND
AC
ADAPTER
µC
SM Bus
SM Bus
Figure 6. Typical Smart Battery System
13
FAN5201
SMBus Interface Specification
Table 3. Charging Voltage Input and Output
The FAN5201 is designed to fit in a system whose center is a
microcontroller acting as an SMBus host. The host receives
charging requests and other signals from a Smart Battery,
and sends charging requests to the FAN5201 charger, in the
process providing the necessary translations. The FAN5201
acts as a slave only. There is no direct communication
between the charger and the battery. Note that the FAN5201
is NOT intended to be fully compliant with the Intel/Duracell Smart Battery System Specification. This document
specifies ALL of the FAN5201’s SMBus interface.
Input
Unsigned 2-Byte
Desired Charging Voltage
Units
mV
LSB
Bit 5
MSB
Bit 12
Output
Scale
255 Steps (from 0 to full-scale)
Resolution
32mV
Preliminary Specification
Slave Address
0001001b
15
14
13
12
X
X
X
MSB
11
10
9
8
7
6
5
4
3
2
1
0
LSB
X
X
X
X
X
Power On
The FAN5201 powers on with all DACs set to zero. All
DACs must be written to before charging can begin. At
power on, the Zero Current Bit is 0.
Figure 8. Charging Voltage Input and Output Word
For example, 0x0200 sets a charging voltage of 10.512V by
outputting (16/255) * FS +10V, where FS = 8.160V.
Supported Communications—Write Section
(µC to IC)
Charging Current
The host sends the desired charging rate in mA.
¥ SMBus Protocol: Write Word
¥ Command Code: 0x14
Charging Power
The host sends the maximum power available from the AC
adapter in 5W increments with an offset of 25W.
¥ SMBus Protocol: Write Word
¥ Command Code: 0x17
Table 2. Charging Current Input and Output
Table 4. Charging Power Input and Output
Input
Input
Unsigned 2-Byte
Desired Charging Current
Unsigned 2-Byte
Maximum Charging Power
Units
mA
Units
5W
LSB
Bit 5
LSB
Bit 0
MSB
Bit 12
MSB
Bit 3
Output
Output
Scale
255 Steps (from 0 to full-scale)
Scale
15 Steps (from 0 to full-scale)
Resolution
32mA (with 18mΩ sense resistor)
Resolution
5W (with 18mΩ sense resistor)
15
14
13
12
X
X
X
MSB
11
10
9
8
7
6
5
4
3
2
1
0
LSB
X
X
X
X
X
Figure 7. Charging Current Input and Output Word
15
14
13
12
11
10
9
8
7
6
5
4
3
X
X
X
X
X
X
X
X
X
X
X
X
MSB
2
1
0
LSB
Figure 9. Charging Power Input and Output Word
For example, 0x0200 sets a charge current of 512mA by outputting (16/255) * FS, where FS = 8160mA.
For example, 0x0005 sets maximum charge power at 50W
by outputting (5/15) * FS +25W, where FS = 75W.
Charging Voltage
The host sends the desired charging voltage in mV with an
offset of 10V.
¥ SMBus Protocol: Write Word
¥ Command Code: 0x15
Control Signals
The host sends a signal to set the IC into power down mode,
and to reset the zero current flag.
When Power Down is sent to the IC, only the 5V linear regulator and the SMBus are on, all other systems are turned off.
14
FAN5201
The SMBus continues to latch incoming information in
Power Down.
Zero Current Reset true (=1) resets the ZERO_CURRENT
bit (in the charger status word) to 0 = valid. In order for the
ZERO_CURRENT bit to function again, the Zero Current
Reset bit must be set false (= 0) after this, otherwise the
ZERO_CURRENT bit will remain in the valid state regardless of battery current.
¥ SMBus Protocol: Write Word
¥ Command Code: 0x18
Bit
Support
CHARGE_INHIBITED
0
Always 0, charger
enabled
MASTER_MODE
1
Always 0, slave mode
VOLTAGE_NOTREG
2
0 = in regulation
CURRENT_NOTREG
3
0 = in regulation
4
Not supported
ZERO_CURRENT
5
0 = valid
Support
CURRENT_OR
6
0 = valid
Power Down/Normal
1
0/1
VOLTAGE_OR
7
0 = valid
Zero Current Reset
2
1 = TRUE
THERMISTOR_OR
8
Not supported
THERMISTOR_COLD
9
Not Supported
THERMISTOR_HOT
10
Not Supported
THERMISTOR_UR
11
Not Supported
ALARM_INHIBITED
12
Not Supported
POWER_FAIL
13
0 = Voltage OK
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
X
X
X
X
X
X
X
X
X
X
X
X
X ZCR PD
0
X
Figure 10. Control Signals Word
For example, 0x0006 sets the IC in normal operation, and the
zero current bit is reset.
Supported Communications—Read Section
(µC to IC)
Charger Status
The host uses this command to read the charger’s status bits.
VOLTAGE_NOTREG is set if the battery voltage is outside
+10% of the programmed charging voltage.
CURRENT_NOTREG is set if the battery current is outside
+10% of the programmed charging current.
ZERO_CURRENT is zero if the battery current is less than
200mA (with an 18mΩ sense resistor).
CURRENT_OR is zero if the battery current is >6A.
BATTERY_PRESENT
14
Not Supported
AC_PRESENT
15
Always 1, charger
present
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
1
X
0/1
X
X
X
X
X
0/1
0/1
0/1
X
0/1
0/1
0
Figure 11. Charger Status Word
For example, a normal operation charger might set this word
to 0x8028 to show that the AC adapter is present, power is on,
voltage is being regulated, and current is above minimum.
Charger Settings
The host uses this command to read the charger’s settings.
¥ SMBus Protocol: Block Read
¥ Command Code: 0x3F
VOLTAGE_OR is zero if the battery voltage is >110% of the
programmed charging voltage.
POWER_FAIL is set if the battery voltage is <8.5V.
¥ SMBus Protocol: Read Word
¥ Command Code: 0x13
15
Preliminary Specification
Bit
Field
LEVEL_2/3
Table 5. Control Signals
Field
Table 6. Charger Status Read
FAN5201
Critical Battery Communications
Overcharge and overtemperature communications are sent to
the host, which transmits commands to the charger.
Preliminary Specification
Table 7. Charger Settings Read
Field
Byte
Byte Count
Always set to 0x08
Charger Current Low Byte
1
Charger Current High Byte
2
Charger Voltage Low Byte
3
Charger Voltage High Byte
4
Charger Power Low Byte
5
Charger Power High Byte
6
Control Signal Low Byte
7
Control Signal High Byte
8
Bus Errors
Unsupported commands, data unavailable, busy or bad data
are not transmitted to the host. The FAN5201 signals errors
by witholding ACKnowledge (see protocols). It does not
support any reads of error registers.
AlarmWarnings()
Alarm warnings are sent to the host, which transmits commands to the charger.
Chargermode() Settings
The ChargerMode() write command is unsupported. The
command’s effects may be obtained by sending the appropriate commands to the charger.
Non-Supported Communications
The following features are specified in the Intel/Duracell
Smart Charger Specification, but are not directly supported
by the FAN5201.
175 seconds Timeout
Supported by the host, not by the IC. Furthermore, it is recommended that a watchdog timer be used in conjunction
with the host processor, to assure that the timeout is not
affected by infinite software loops.
Thermistor Interface
Interface to the thermistor occurs exclusively through the host.
Typical Battery Communications
Charging current and voltage requests are intercepted by the
host, which transmits them to the charger.
S
Slave Address
Wr
Command Code
A
A
Data Byte Low
A
Data Byte High
A
Write Word Protocol
S
Slave Address
Data Byte Low
A
Wr
A
Command Code
Data Byte High
A
A
S
Slave Address
Rd
A
P
S
Wr
Rd
A
A
P
…
=
=
=
=
=
=
StartCondition
Write
Read
Acknowledge
Not Acknowledge
Stop Condition
P
Read Word Protocol
Master to Slave
S
Slave Address
Byte Count = N
A
A
Command Code
Data Byte 1
A
Wr
A
S
Slave Address
Rd
Slave to Master
Data Byte 2
A
Data Byte N
Block Read Protocol
Figure 12. Read and Write Protocols
16
A
A
P
FAN5201
Timing Diagram
tLOW
Clk
tHD:STA
tR
tF
tHD:DAT
tHIGH
tSU:STA
tSU:DAT
tHD:STA
tSU:STO
Data
tBUF
Figure 13. SMBus Timing Diagram
Preliminary Specification
17
FAN5201
Mechanical Dimensions
24-Lead SSOP
Inches
Symbol
Preliminary Specification
A
A1
A2
b
c
D
H
E
e
L
N
α
ccc
Millimeters
Min.
Max.
Min.
Max.
—
.002
.065
.010
.0035
.311
.078
—
2.00
—
.073
.015
.010
.335
—
0.05
1.65
0.22
0.09
7.90
1.85
0.38
0.25
8.50
.291
.323
7.40
8.20
.197
.220
.026 BSC
.022
.037
5.00
5.60
0.65 BSC
0.55
0.95
24
24
0°
8°
0°
8°
—
.004
—
0.10
Notes:
Notes
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. "D" and "E" do not include mold flash. Mold flash or
protrusions shall not exceed .006 inch (0.15mm).
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5
5
2, 4
5. "b" and "c" dimensions include solder finish thickness.
6. Symbol "N" is the maximum number of terminals.
2
3
6
D
E
A
H
C
A1
A2
B
e
SEATING
PLANE
–C–
LEAD COPLANARITY
ccc C
18
α
L
FAN5201
Ordering Information
*
Package
FAN5201MSA
24 Lead SSOP
Preliminary Specification
Product Number
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
11/5/99 0.0m 008
Stock#DS30005052
 1998 Fairchild Semiconductor Corporation
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
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QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
www.fairchildsemi.com
FAN8024D (KA3024D)
4-CH Motor Drive IC
Features
Description
•
•
•
•
•
•
The FAN8024D is a monolithic IC, suitable for a 2-ch BTL
DC motor driver and a 2-ch motor driver with current feedback which drives the focus and tracking actuator of a CDmedia system.
2-Channel BTL driver with current feedback
2-Channel BTL DC motor driver
Built-in thermal shutdown circuit
Built-in mute circuit
Operating supply voltage: 4.5~13.2V
Corresponds to 3.3V or 5V DSP
28-SSOPH-375
DC MOTOR DRIVE IC
Typical Applications
•
•
•
•
•
Compact disk ROM
Compact disk RW
Digital video disk ROM
Digital video disk RW
Other compact disk media
Rev. 1.0.0
©2000 Fairchild Semiconductor Corporation
2
1
2
3
4
5
6
7
IN1
CAP1.1
CAP1.2
IN2.1
IN2.2
OUT2
FB1
DC MOTOR DRIVE IC
STBY
REF
IN4
CAP4.1
CAP4.2
IN3
VCCGND
28
27
26
25
24
23
22
FB4
PGND2
DO3−
DO3+
DO4−
DO4+
20
19
18
17
16
15
8
9
10
11
12
13
14
PGND1
DO2−
DO2+
DO1−
DO1+
FIN
(GND)
21
PVCC1
FAN8024D
PVCC2
(GND)
FIN
VCC
FAN8024D (KA3024D)
Pin Assignments
FAN8024D (KA3024D)
Pin Definitions
Pin Name
I/O
Pin Function Description
1
IN1
I
CH1 input
2
CAP1.1
-
Connection with capacitor
3
CAP1.2
-
for CH1
4
IN2.1
I
OP-AMP CH2 input(+)
5
IN2.2
I
OP-AMP CH2 input(-)
6
OUT2
O
OP-AMP CH2 output
7
FB1
I
Feedback for CH1
8
VCC
-
Signal Vcc
9
PVCC1
-
Power Supply 1
10
PGND1
-
Power Ground 1
11
DO2−
O
Drive2 Output (-)
12
DO2+
O
Drive2 Output (+)
13
DO1−
O
Drive1 Output (-)
14
DO1+
O
Drive2 Output (+)
15
DO4+
O
Drive4 Output (+)
16
DO4−
O
Drive4 Output (-)
17
DO3+
O
Drive3 Output (+)
18
DO3−
O
Drive3 Output (-)
19
PGND2
-
Power Ground 2
20
FB4
-
Feedback for CH4
21
PVCC2
-
Power Supply 2
22
VCCGND
-
Vcc ground
23
IN3
I
CH3 input
24
CAP4.2
-
Connection with capacitor
25
CAP4.1
-
for CH4
26
IN4
I
CH4 input
27
REF
I
Bias voltage input
28
STBY
I
Stand-by input
DC MOTOR DRIVE IC
Pin Number
3
FAN8024D (KA3024D)
REF
IN4
CAP4.1
CAP4.2
IN3
VCCGND
PVCC2
FB4
PGND2
DO3−
DO3+
DO4−
DO4+
28
27
26
25
24
23
22
21
20
19
18
17
16
15
20K
-
+
PVCC2
7.5K
10K
STBY
Internal Block Diagram
7.5K
A ctu a to r
D river
L oa d in g
D rive r
+
-
-
+
15K
10K
X2
TSD
PVCC1
VCC
-
+
7.5K
+
DC MOTOR DRIVE IC
PVCC2
20K
25K
A ctua tor
D rive r
10K
7.5K
10K
+
-
-
+
S led
D rive r
-
X2
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IN1
CAP1.1
CAP1.2
IN2.1
IN2.2
OUT2
FB1
VCC
PVCC1
PGND1
DO2−
DO2+
DO1−
DO1+
VCC PVCC1
FAN8024D (KA3024D)
Equivalent Circuits
ERROR AMP INPUT
8KΩ
STAND-BY INPUT
8KΩ
4
5
1KΩ
2KΩ
1KΩ
28
50Ω
2KΩ
ERROR AMP OUTPUT
SIGNAL REFERENCE INPUT
DC MOTOR DRIVE IC
5ΚΩ
27
50Ω
6
40ΚΩ
POWER AMP OUTPUT
11
12
13
14
16
17
18
5
FAN8024D (KA3024D)
Absolute Maximum Ratings (Ta = 25oC)
Parameter
Symbol
Value
Unit
Maximum supply voltage
VCCmax
15
V
PD
@1.7
W
Operating temperature range
TOPR
-35 ~ +85
°C
Storage temperature range
TSTG
-55 ~ +150
°C
Power dissipation
Notes:
1. When mounted on a 50mm × 50mm × 1mm PCB (Phenolic resin material).
2. Power dissipation reduces 13.6mW/°C for using above Ta = 25°C
3. Do not exceed PD and SOA(Safe operating area).
Pd [mW]
DC MOTOR DRIVE IC
3,000
2,000
1,000
0
SOA
0
25
50
75 85 100
125
150
175
Ambient Temperature, Ta [°C]
Recommended Operating Conditions (Ta = 25oC)
Parameter
Supply Voltage
6
Symbol
Min.
Typ.
Max.
Unit
Vcc
4.5
-
13.2
V
FAN8024D (KA3024D)
Electrical Characteristics
(Unless otherwise specified, Ta = 25 °C, VCC = 12V, PVCC1,2 = 5V & the other conditions & nomenclatures follow the test
circuit)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Quiescent Current1
ICC1
Stand-by off
-
18
27
mA
Quiescent Current1
ICC2
Stand-by on
-
-
0.5
mA
Stand-by On Voltage
VSTon
-
-
0.5
V
Stand-by Off Voltage
VSToff
2.0
-
-
V
ACTUATOR DRIVE PART
Output Offset Current
IOO1,4
VIN1,4 set to BIAS
-6
0
+6
mA
Maximum Output Voltage1
VOM1,4
VIN1,4 = 4.5V
3.6
4.0
-
V
Transconductance
GM1,4
VIN1,4 = 100mVp-p, f=1kHz
1.5
1.7
1.9
A/V
VOOM
SW1 & SW2 set to position 2,
VIN2 sweep from 0V to 12V
0
-
11.0
V
IB
SW1 & SW2 set to position 1
-300
-30
-
nA
SW1=>posit. 2, SW2=>posit. 1
VIN2 is 2.0V & VIN5 is 3.0V
-
0.1
0.3
V
ISOURCE
SW1 set to position 2
SW2 & SW3 set to position 1
VIN2 is 3.0V & VIN5 is 2.0V
1
4
-
mA
ISINK
SW3 set to position 2
VIN2 is 2.0V & VIN5 is 3.0V
5
10
-
mA
Output Offset Voltage of Input
OP-Amp
VOF2
SW1=>posit. 2, SW2=>posit. 1
VIN 2 & VIN5 set to BIAS
-100
0
+100
mV
Maximum Output Voltage2
VOM2
SW1 & SW2 set to position 2
VIN2 set to 4.5V
10.0
10.9
-
V
Closed loop Voltage Gain1
GVLO2
VIN2 = 100mVp-p, f=1kHz
SW2 & SW1 set to position 2
18.0
20.0
22.0
dB
Output Offset Voltage1
VOF3
VIN3 set to BIAS
-50
0
50
mV
Maximum Output Voltage 3
VOM3
VIN3 set to 4.5V
3.6
4.0
-
V
Closed loop Voltage Gain 2
GVLO3
VIN3 = 100mVp-p, f=1KHz
13.5
15.5
17.5
dB
PRE OP−
−AMP (SLED DRIVER))
Input Bias Current
Low Level Output Voltage
Output Source Current
Output Sink Current
VOL
DC MOTOR DRIVE IC
Common mode Input Range
SLED DRIVE PART
Loading DRIVE PART
7
FAN8024D (KA3024D)
Application Information
1. REFERENCE INPUT & STAND-BY FUNCTION
• Reference input (PIN 27)
The applied voltage at the reference input pin must be between 1.4V and 6.5V, when VCC=8.5V.
• Stand-by input (PIN 28)
The following input conditions must be satisfied for the normal stand-by function.
Stand-by input voltage
Below 0.5V or OPEN
Stand-by function is activated so the bias block and the
power block are disabled
Stand-by input voltage
Above 2.0V
Normal operation
DC MOTOR DRIVE IC
2. PROTECTION FUNCTION
Thermal shutdown (TSD)
If the chip temperature rises above 175°C, the thermal shutdown (TSD) circuit is activated and the output circuit is in the mute
state, that is off state. The TSD circuit has a temperature hysteresis of 25°C
3. SEPARATION OF POWER SUPPLY
• PVcc1 (PIN 9)
PVcc1 is the power for loading driver. The range is between 5V ~ 12V.
• PVcc2 (PIN 21)
PVcc2 is the power supply for actuator driver that include focus and tracking actuator. The range is between 5V ~ 12V
• Vcc (PIN 8)
Vcc pin supplies power for sled driver and signal logic part. The voltage applied to Vcc must be higher than PVcc1 and PVcc2
at least 1V
8
FAN8024D (KA3024D)
Test Circuits
VIN1
1
28
2
27
VST
BIAS
C1
1
VIN4
SW1
R1
2
1
VIN2
VIN5
V
4
25
5
24
6
23
V
2 SW2
R2
26
3
V
C5
VIN3
SW3 1
2
7
V
12V
VCC
8
A
22
21
A
C2
C3
PVCC1
A
R4
R6
9
20
10
19
11
18
V
R5
C4
DC MOTOR DRIVE IC
R3
FAN8024D
V
PVCC2
R9
V
12
17
13
16
V
V
14
R7
R8
15
Symbol
Value
Symbol
Value
Symbol
Value
R1
1MΩ
R6
5Ω
C2
10uF
R2
1MΩ
R7
4Ω
C3
10uF
R3
50Ω
R8
5Ω
C4
10uF
R4
8Ω
R9
8Ω
C5
100pF
R5
4Ω
C1
100pF
BIAS
2.5V
9
FAN8024D (KA3024D)
Typical Application Circuits
SERVO
FOCUS
AMP
TRACKING
DC MOTOR DRIVE IC
SLED
REF
1
IN1
STBY 28
2
CAP1.1
REF 27
3
CAP1.2
IN4 26
4
IN2.1
CAP4.1 25
5
IN2.2
CAP4.2 24
6
OUT2
IN3 23
7
FB1
Stand by
REF
TRAY CONTROL IN
VCCGND 22
FAN8024D
8
VCC
9
PVCC1
PVCC2 21
5V or 12V
12V
FB4 20
5V or 12V
10 PGND
PGND 19
11 DO2−
DO3− 18
TRAY
MOTOR
SLED
MOTOR
FOCUS
ACTUATOR
RD
12 DO2+
DO3+ 17
13 DO1−
DO4− 16
RD
14 DO1+
10
DO4+ 15
TRACKING
ACTUATOR
FAN8024D (KA3024D)
Ordering Information
Device
Package
Operating Temp.
FAN8024D
28-SSOPH-375
-35 °C ~ 85 °C
FAN8024DTF 28-SSOPH-375
-35 °C ~ 85 °C
DC MOTOR DRIVE IC
11
DC MOTOR DRIVE IC
FAN8024D (KA3024D)
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/28/99 0.0m 001
Stock#DSxxxxxxxx
 1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN8026D (KA3026D)
4-CH Motor Drive IC
Features
Description
•
•
•
•
•
•
The FAN8026D is a monolithic integrated circuit, suitable
for a 1-ch (forward.reverse) control DC motor driver and a
3-ch motor driver which drives the focus actuator,tracking
actuator, and sled motor of a CD system.
3-Channel BTL driver
1-Channel forward-Reverse control DC motor driver
Built-in thermal shutdown circuit
Built-in mute circuit
Operating supply voltage: 4.5~13.2V
Corresponds to 3.3V or 5V DSP
28-SSOPH-375
DC MOTOR DRIVE IC
Typical Applications
• Compact disk player
• Digital video disk player
• Mini disk player
Rev. 1.0.0
©2000 Fairchild Semiconductor Corporation
2
1
2
3
4
5
6
7
IN1.1
IN1.2
OUT1
IN3.1
IN3.2
OUT3
IN2
DC MOTOR DRIVE IC
DO1+
DO1PGND2
DO2+
DO2VM1,2
MUTE4
28
27
26
25
24
23
22
DO3PGND1
VM3,4
DO4+
DO4VCC
20
19
18
17
16
15
8
9
10
11
12
13
14
FWD
REV
REF
MUTE1,2
MUTE3
FIN
(GND)
21
CTL
FAN8026D
DO3+
FIN
(GND)
SGND
FAN8026D (KA3026D)
Pin Assignments
FAN8026D (KA3026D)
Pin Definitions
Pin Name
I/O
Pin Function Descrition
1
IN1.1
I
OP-AMP CH1 Input (+)
2
IN1.2
I
OP-AMP CH1 Input (-)
3
OUT1
O
OP-AMP CH1 Output
4
IN3.1
I
OP-AMP CH3 Input (+)
5
IN3.2
I
OP-AMP CH3 Input (-)
6
OUT3
O
OP-AMP CH3 Output
7
IN2
I
OP-AMP CH2 Input
8
SGND
-
Signal Ground
9
CTL
I
CH4 Motor Speed Control
10
FWD
I
CH4 Forward
11
REV
I
CH4 Reverse
12
REF
I
Bias Voltage Input
13
MUTE1,2
I
CH1, 2 Mute
14
MUTE3
I
CH3 Mute
15
VCC
-
Signal VCC
16
DO4-
O
Drive4 Output (-)
17
DO4+
O
Drive4 Output (+)
18
VM3, 4
-
BTL CH3, 4 Power VCC
19
PGND1
-
CH3, 4 Power Ground
20
DO3-
O
Drive3 Output (-)
21
DO3+
O
Drive3 Output (+)
22
MUTE4
-
CH4 Mute
23
VM1,2
-
BTL CH1, 2 Power VCC
24
DO2-
O
Drive2 Output (-)
25
DO2+
O
Drive2 Output (+)
26
PGND2
-
CH1,2 Power Ground
27
DO1-
O
Drive1 Output (-)
28
DO1+
O
Drive1 Output (+)
DC MOTOR DRIVE IC
Pin Number
3
FAN8026D (KA3026D)
DO1+
DO1-
PGND2
DO2+
DO2-
VM1,2
MUTE4
DO3+
DO3-
PGND1
VM3,4
DO4+
DO4-
VCC
Internal Block Diagram
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MUTE4
-
+
BTLVM/2
10K
+
20K
-
+
MSC
SW
BTLVM/2
VM3,4
LEVEL
SHIFT
+
-
-
+
-
4
5
6
7
8
9
10
IN1.2
OUT1
IN3.1
IN3.2
OUT3
IN2
SGND
CTL
FWD
11
12
13
14
MUTE3
4
MUTE1,2
3
REF
2
REV
1
IN1.1
+
MUTE3
10K
-
-
+
MUTE1,2
10K
-
DC MOTOR DRIVE IC
VM3,4
10K
-
10K
+
10K
+
+
BTLVM/2
BTLVM/2
VM1,2
LEVEL
SHIFT
+
VM1,2
LEVEL
SHIFT
10K
10K
10K
10K
BTLVM/2
+
TSD
+
-
BTLVM/2
10K
10K
-
+
+
-
-
10K
10K
10K
-
-
+
VM3, 4
VM1,2
10K
-
10K
FAN8026D (KA3026D)
Equivalent Circuits
MUTE INPUT
POWER OUTPUT
16 17
20 21
13
50KΩ
24 25
14
50Ω
22
27 28
50KΩ
CH2 LEVEL SHIFT INPUT
SIGNAL REFERENCE INPUT
0.2kΩ
12
50Ω
50Ω
ERROR AMP INPUT
1
4
DC MOTOR DRIVE IC
10KΩ
7
LOADING CONTROL INPUT
2
50Ω
50Ω
0.2KΩ
5
9
50Ω
ERROR AMP OUTPUT
LOADING LOGIC INPUT
3
50Ω
6
30KΩ
10
11
50Ω
30KΩ
5
FAN8026D (KA3026D)
Absolute Maximum Ratings ( Ta=25°°C)
Parameter
Symbol
Value
Unit
Maximum supply voltage
VCCmax
15
V
Pd
1.7
W
Operating temperature range
Topr
-35 ~ +85
°C
Storage temperature range
Tstg
-55 ~ +150
°C
Power dissipation
Notes:
1. When mounted on a 50mm × 50mm × 1mm PCB (Phenolic resin material).
2. Power dissipation reduces 13.6mW/°C for using above Ta = 25°C
3. Do not exceed Pd and SOA(Safe operating area).
PD (temporary)
DC MOTOR DRIVE IC
Pd (mW)
2,000
1,200
400
0
SOA
0
25
50
85 100
125
150
175
Ambient Temperature, Ta (°C)
Recommended Operating Conditions ( Ta=25°°C)
Parameter
Supply Voltage
6
Symbol
Min.
Typ.
Max.
Unit
Vcc
4.5
-
13.2
V
FAN8026D (KA3026D)
Electrical Characteristics
(Unless otherwise specified, Ta = 25 °C, VCC = VM1,2 = VM3,4 = 5V)
Parameter
Quiescent Current
Symbol
ICC
Conditions
Min.
Typ.
Max.
Units
Vin = 0V
-
8
12
mA
CH Mute On Current
ImuteCH
Pin 13, Pin14, Pin22 = GND
-
1
3
mA
CH Mute On Voltage
VmonCH
Pin13, Pin14, Pin22 = Variation
-
-
0.5
V
CH Mute Off Voltage
VmoffCH
Pin13, Pin14, Pin22 = Variation
2
-
-
V
-20
-
+20
mV
-40
-
+40
mV
DRIVE PART
Input Offset Voltage
Vio
Output Offset Voltage
Voo
Vin = 2.5V
Vom1
Vcc=8V, RL = 8Ω (CH1, 2)
4
5.7
-
V
Maximum Output Voltage2
Vom2
Vcc=12V, RL = 24Ω (CH3)
7
9
-
V
Closed Loop Voltage Gain1
Gvc1
f = 1KHz, Vin = 0.1Vrms (CH1, 2)
10.5
12
13.5
dB
Closed Loop Voltage Gain2
Gvc2
f = 1KHz, Vin = 0.1Vrms (CH3)
16
18
20
dB
Ripple Rejection Ratio
RR
Vin = 0.1Vrms, f = 120Hz
-
60
-
dB
Slew Rate
SR
Vo = 2Vp-p, f = 120KHz
-
0.8
-
V/us
DC MOTOR DRIVE IC
Maximum Output Voltage1
ERROR OP AMP PART
Input Offset Voltage
Vofop
-10
-
+10
mV
Input Bias Current
Ibop
-
-
300
nA
High Level Output Voltage
Vohop
Vcc=8V
7.2
7.6
-
V
Low Level Output Voltage
Volop
Vcc=8V
-
0.2
0.5
V
Output Sink Current
Isink
RL = 1KΩ
2
4
-
mA
Isource
RL = 1KΩ
2
4
-
mA
Gvo
Vin = -75dB, f = 1KHz
-
75
-
dB
Ripple Rejection Ratio
RRop
Vin = -20dB, f = 120Hz
-
65
-
dB
Slew Rate
Srop
f = 120KHz, 2Vp-p
-
1
-
V/us
Vin = -20dB, f = 1KHz
-
80
-
dB
-0.3
-
4.5
V
Output Source Current
Open Loop Voltage Gain
Common Mode Rejection Ratio
Common Mode Input Range
CMRR
Vicm
TRAY DRIVE PART (VCC = VM34 = 8V, RL = 45Ω)
Ω)
Input High Level Voltage
Vih
2
-
-
V
Input Low Level Voltage
Vil
-
-
0.5
V
Output Voltage1
Vo1
Vcc=8V, Vctl = 6V
5.2
6.0
6.8
V
Output Voltage2
Vo2
Vcc=13V, Vctl = 8.5V
7.5
8.5
9.5
V
Output Load Regulatoin
∆VRL
Vctl = 3.5V
-
300
700
mV
Output Offset Voltage1
Voo1
Vin = 5V, 5V
-10
-
+10
mV
Output Offset Voltage2
Voo2
Vin = 0V, 0V
-10
-
+10
mV
7
FAN8026D (KA3026D)
Application Information
1. REFERENCE INPUT
Pin 12 (REF) is areference Input pin.
1) Reference Input
The applied voltage at the reference input pin must be between 1.5 (V) and 6.5 (V), when Vcc = 8V.
2. SEPARATED CHANNEL MUTE FUNCTION
These pins are used for individual channel mute operation.
1) When the mute pins (pin13,14 and 22) are Low level, the mute circuits are enabled and the output circuits are muted.
DC MOTOR DRIVE IC
2) When the voltage of the mute pins (pin13,14 and 22) are High level, the mute circuits are disabled and the output circuits
operate normally.
3) If the chip temperature rises above 175 °C, then the thermal shutdown (TSD) circuit is activated and the output circuits are
muted.
Mute1, 2 (pin13) - CH1, 2 mute control input pin.
Mute3 (pin14) - CH3 mute control input pin.
Mute4 (pin22) - CH4 mute control input pin.
3. PROTECTION FUNCTION
Thermal Shutdown (TSD)
1) If the chip temperature rises above 175 °C the thermal shutdown (TSD) circuit is activated and the output circuit is in the
Mute state, that is Off state.
The TSD circuit has a temperature hysteresis of 25 °C.
4. FOCUS, TRACKING ACTUATOR, SLED MOTOR DRIVE PART
M
1) The reference voltage REF is given externally through pin 12.
2) The error amp output signal is amplified by R2/R1 times and then fed to
the level shift circuit.
Power Amp
R4
+ Vr
R3
3) The level shift circuit produces the differential output voltages and drives
the two output power amplifiers.
Since the differential gain of the output amplifiers is equal to 2 × (1+ R4/
R3), the output signal of the error amp is amplified by (R2/R1) × 2 ×
(1+R4/R3).
4) If the total gain is insufficient, the input error amp can be used to increase
the gain.
5) The bias voltage (Vr) is about a half of the supply voltage(VM).
8
R4
AP3
AP2
- +
12
R3
+
-
-
+
LEVEL
SNIFT
AP1
+ -
R2
R1
Vref
3 6 7
Error Amp +EA2 5
Vin
1 4
FAN8026D (KA3026D)
5. TRAY MOTOR DRIVE PART
1) Rotational Direction Control
DO4+
17
- The forward and reverse rotational direction is controlled by FWD (pin
10) and REV (pin 11) inputs. Conditions are as follows.
- Vr(Power reference voltage) is (VM34-VBE) / 2
DO416
M
D
D
LEVEL SHIFT
Input
Output
M. S. C
CTL
9
FWD
REV
DO4+
DO4-
State
H
H
Vr
Vr
Brake
H
L
H
L
Forward
IN
IN
L
H
L
H
Reverse
FWD
10
REV
11
L
L
Vr
Vr
Brake
S. W
- The motor speed is proportional to the difference voltage between the pin17(DO4+) and the pin16(DO4-).
- By applying the voltage to the pin9 of CTL, the motor speed can be controlled and it is linearly proportional to the
applied control voltage.
- When both VM3,4 and Vcc are 8V, and the applied control voltage is higher than 7V, the motor speed is not proportional
to the control voltage but the motor speed becomes constant.
- If the pin9 is opened,the motor torque becomes maximum.
- The maximum output swing is 6.0V, when VM3,4 and Vcc are 8V.
9
DC MOTOR DRIVE IC
2) Motor Speed Control
FAN8026D (KA3026D)
Typical Performance Characteristics
< VCC & ICC >
ICC (mA)
< VCC & VOM >
VOM (V)
Ta=25
VCC=VM12=VM34
RL1=8ohm (CH1,2)
RL2=24ohm(CH3)
Ta=25
VCC=VM12=VM34
VCC (V)
DC MOTOR DRIVE IC
VCC (V)
< IOM & VOUT >
VOUT (V)
CH1 Upp.
CH1 Low
CH2 Upp.
CH2 Low
CH3 Upp.
CH3 Low
< VCC & GVC >
GVC (dB)
CH1
CH2
CH3
Ta=25
VCC=VM12=VM34
Ta=25
VCC=VM12=VM34
RL1=8ohm (CH1,2)
RL2=24ohm(CH3)
VCC (V)
IOM (A)
< VCC & Isource (ERROR AMP) >
Isource (mA)
< VCC & Isink (ERROR AMP) >
Isink (mA)
CH1
CH2
CH1
CH2
Ta=25
RL=1Kohm
VCC (V)
10
Ta=25
RL=1Kohm
VCC (V)
FAN8026D (KA3026D)
Typical Performance Characteristics (Continued)
VO (V)
< Iload & VO (LOAD REGULATION (TRAY PART) )>
< CTL & OUTPUT VTG (TRAY PART) >
VO (V)
DO4+
DO4-
Ta=25
VCC=8V, CTL=3.5V
FWD=5V, REV=0V DO4+
FWD=0V, REV=5V DO4-
Ta=25
VCC=13V
RL=24ohm
FWD=5V, REV=0V
CTL (V)
DC MOTOR DRIVE IC
< TEMP & GVC >
GVC (dB)
Iload (A)
< TEMP & OUTPUT VTG (TRAY PART) >
VO (V)
VCC=VM12=VM34=5V
RL1=8ohm (CH1,2)
RL2=24ohm(CH3)
TEMP (
)
VCC=VM34=8V CTL=6.8V VO1
VCC=VM34=13V CTL=9.5V VO2
RL=24ohm
VO1
VO2
TEMP (
)
11
FAN8026D (KA3026D)
Test Circuits
OP IN (+)
1 IN1.1
DO1+ 28
2 IN1.2
DO1- 27
3 OUT1
PGND2 26
4 IN3.1
DO2+ 25
5 IN3.2
DO2- 24
6 OUT3
VM1,2 23
8Ω
OP IN (-)
V
OP OUT
OP IN (+)
8Ω
OP IN (-)
V
+
~
DC MOTOR DRIVE IC
OP OUT
MUTE4
MUTE4 22
7 IN2
FAN8026D
CTL
9 CTL
DO3- 20
FWD
10 FWD
PGND1 19
REV
11 REV
VM3,4 18
VREF
12 REF
DO4+ 17
MUTE1,2
13 MUTE1,2
DO4- 16
MUTE3
14 MUTE3
VCC 15
V
OP-AMP
OPIN(+)
OPIN(−)
A
B
OPOUT
D
1
VPULSE
2
3
VA
1
2
3
VOUT
50Ω
VB
C
1
12
2
VCC
RIPPLE ~
45 Ω
1000µF
SW1
1
+
2
+
8Ω
VCC
DO3+ 21
100µF
8 SGND
FAN8026D (KA3026D)
Typical Application Circuits 1
BIAS
(Diffential PWM Control Mode)
1 IN1.1
DO1+ 28
PWM1
FOCUS PWM2
2 IN1.2
DO1- 27
PWM1
SLED PWM2
3 OUT1
PGND2 26
4 IN3.1
DO2+ 25
5 IN3.2
DO2- 24
6 OUT3
VM1,2 23
BIAS
SERVO AMP
TRACKING
FOCUS
ACTUATOR
TRACKING
ACTUATOR
DC MOTOR DRIVE IC
5V
MUTE4 22
7 IN2
TRAY MUTE
FAN8026D
8 SGND
DO3+ 21
9 CTL
DO3- 20
SLED MOTOR
CONTROL
(TRAY)
5V
FORWARD
10 FWD
PGND1 19
REVERSE
11 REV
VM3,4 18
BIAS VOLTAGE
12 REF
12V
DO4+ 17
TRAY MOTOR
FOCUS, TRACKING MUTE
SLED MUTE
13 MUTE1,2
DO4- 16
14 MUTE3
VCC 15
VCC
13
FAN8026D (KA3026D)
Typical Application Circuits 2
(Voltage Control Mode)
REF
SERVO
AMP
FOCUS
SLED
1 IN1.1
DO1+ 28
2 IN1.2
DO1- 27
3 OUT1
PGND2 26
4 IN3.1
DO2+ 25
5 IN3.2
DO2- 24
6 OUT3
VM1,2 23
FOCUS
ACTUATOR
DC MOTOR DRIVE IC
TRACKING
TRACKING
ACTUATOR
5V
MUTE4 22
7 IN2
TRAY MUTE
FAN8026D
8 SGND
DO3+ 21
9 CTL
DO3- 20
SLED MOTOR
CONTROL
(TRAY)
5V
FORWARD
10 FWD
PGND1 19
REVERSE
11 REV
VM3,4 18
12V
BIAS VOLTAGE
12 REF
DO4+ 17
TRAY MOTOR
FOCUS, TRACKING MUTE
SLED MUTE
13 MUTE1,2
DO4- 16
14 MUTE3
VCC 15
Ordering Information
Device
Package
Operating Temperature
FAN8026D
28-SSOPH-375
-35 °C ~ 85 °C
FAN8026DTF 28-SSOPH-375
-35 °C ~ 85 °C
14
VCC
FAN8026D (KA3026D)
DC MOTOR DRIVE IC
15
DC MOTOR DRIVE IC
FAN8026D (KA3026D)
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/28/99 0.0m 001
Stock#DSxxxxxxxx
 1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN8037 (KA3037)
7-CH Motor Drive IC
Features
Description
•
•
•
•
•
•
•
•
The FAN8037 is a monolithic integrated circuit suitable for
a 7-ch motor driver which drives the tracking actuator, focus
actuator, sled motor, tray motor, changer motor, panel motor
and, spindle motor of the CDP/CAR-CD systems.
48-QFPH-1414
DC MOTOR DRIVE IC
4-CH balanced transformerless (BTL) driver
3-CH (forward - reverse) control DC motor driver
Operating supply voltage (4.5 V ~ 13.2 V)
Built-in thermal shut down circuit (TSD)
Built-in all channel mute circuit
Built-in power save mode circuit
Built-in stand by mode circuit
Built-in variable regulator
Typical Application
•
•
•
•
Compact disk player (Tray, Changer)
Video compact disk player (Tray, Changer)
Car compact disk player (Tray, Changer)
Mixing with compact disk player and mini disk player (Tray, Changer, Panel)
Rev. 1.0.0
©2000 Fairchild Semiconductor Corporation
FAN8037 (KA3037)
DC MOTOR DRIVE IC
REGOX
PVCC1
DO1+
DO1−
DO2+
45
REGX
46
RESX
IN1+
47
VREF
IN1−
48
SVCC
OUT1
Pin Assignments
44
43
42
41
40
39
38
37
IN2+
1
36
DO2−
IN2−
2
35
PGND1
OUT2
3
34
DO3+
IN3+
4
32
DO3−
IN3−
5
32
DO4+
OUT3
6
31
DO4−
FAN8037
2
CTL1
10
27
DO6+
FWD1
11
26
DO6−
REV1
12
25
DO7+
13
14
15
16
17
18
19
20
21
22
23
24
DO7−
PGND2
PVCC2
28
MUTE
9
PS
OUT4
SB
DO5−
CTL3
29
REV3
8
FWD3
IN4−
SGND
DO5+
REV2
30
FWD2
7
CTL2
IN4+
FAN8037 (KA3037)
Pin Definitions
Pin Name
I/O
Pin Function Descrition
1
IN2+
I
CH2 op-amp input (+)
2
IN2−
I
CH2 op-amp inut (−)
3
OUT2
O
CH2 op-amp output
4
IN3+
I
CH3 op-amp input (+)
5
IN3−
I
CH3 op-amp input (−)
6
OUT3
O
CH3 op-amp output
7
IN4+
I
CH4 op-amp input (+)
8
IN4−
I
CH4 op-amp input (−)
9
OUT4
O
CH4 op-amp output
10
CTL1
I
CH5 motor speed control
11
FWD1
I
CH5 forward input
12
REV1
I
CH5 reverse input
13
CTL2
I
CH6 motor speed control
14
FWD2
I
CH6 forward input
15
REV2
I
CH6 reverse input
16
SGND
-
Signal groung
17
FWD3
I
CH7 forward input
18
REV3
I
CH7 reverse input
19
CTL3
I
CH7 motor speed control
20
SB
I
Stand by
21
PS
I
Power save
22
MUTE
I
All mute
23
PVCC2
-
Power supply voltage (For CH5, CH6, CH7)
24
DO7−
O
CH7 drive ouptut (−)
25
DO7+
O
CH7 drive output (+)
26
DO6−
O
CH6 drive output (−)
27
DO6+
O
CH6 drive output (+)
28
PGND2
-
Power ground2 (FOR CH5, CH6, CH7)
29
DO5−
O
CH5 drive output (−)
30
DO5+
O
CH5 drive output (+)
31
DO4−
O
CH4 drive output (−)
32
DO4+
O
CH4 drive output (+)
DC MOTOR DRIVE IC
Pin Number
3
FAN8037 (KA3037)
Pin Definitions (Continued)
Pin Name
I/O
33
DO3−
O
CH3 drive output (−)
34
DO3+
O
CH3 drive output (+)
35
PGND1
-
Power ground 1 (FOR CH1, CH2, CH3, CH4)
36
DO2−
O
CH2 drive output (−)
37
DO2+
O
CH2 drive output (+)
38
DO1−
O
CH1 drive output (−)
39
DO1+
O
CH1 drive output (+)
40
PVCC1
-
Power supply voltage (FOR CH1, CH2, CH3, CH4)
41
REGOX
I
Regulator feedback input
42
REGX
O
Regulator output
43
RESX
I
Regulator reset input
44
VREF
I
Bias voltage input
45
SVCC
-
Signal supply voltage
46
IN1+
I
CH1 op-amp input (+)
47
IN1−
I
CH1 op-amp input (−)
48
OUT1
O
CH1 op-amp output
DC MOTOR DRIVE IC
Pin Number
4
Pin Function Descrition
FAN8037 (KA3037)
Internal Block Diagram
OUT1
48
IN1−
IN1+
47
46
SVCC
VREF
RESX
45
44
43
REGX REGOX PVCC1 DO1+
42
41
40
DO1−
DO2+
38
37
39
+
1
IN2−
2
OUT2
3
IN3+
4
IN3−
5
−
− +
−
+
+
−
OUT3
PGND1
34
DO3+
−
33
DO3−
−
32
DO4+
31
DO4−
30
DO5+
+
−
+
+
6
+
+
−
IN4+
35
+
−
+
−
DO2−
−
+
+
−
36
+
−
−
7
S
W
IN4−
8
OUT4
9
S
W
M
S
C
M
S
C
+
D
−
D
29
DO5−
+
D
28
PGND2
−
D
27
DO6+
+
D
−
26
DO6−
D
25
DO7+
CTL1 10
S
W
FWD1 11
DC MOTOR DRIVE IC
IN2+
M
S
C
STAND BY
T.S.D
REV1 12
ALL MUTE
POWER SAVE
13
14
CTL1
FWD2
15
16
REV2 SGND
17
FWD3
18
REV3
19
20
21
CTL3
SB
PS
22
23
24
MUTE PVCC2 DO7−
Notes:
1. SW = Logic switch
2. MSC = Motor speed control
3. D = Output driver
5
FAN8037 (KA3037)
Equivalent Circuits
Description
Pin No.
Input
OPIN (+)
OPIN (−)
46,47,1,2
4,5,7,8
Internal circuit
SVCC
SVCC
46 1
4 7
DC MOTOR DRIVE IC
Input
opout
SVCC
0.05k
0.05k
48,3,6,9
SVCC
SVCC
48 3
6 9
CTL
10,13,19
SVCC
SVCC
0.05k
10 13 19
Logic drive
FWD input
REV input
11,12,
14,15,
17,18
1k
SVCC
11 12
14 15
0.05k
30k
17 18
30k
6
47 2
5 8
FAN8037 (KA3037)
Equivalent Circuits (Continued)
Description
Pin No.
Power save
Standby
20,21
Internal circuit
SVCC
SVCC
20
21
50k
0.05k
50k
Mute
22
SVCC
DC MOTOR DRIVE IC
SVCC
0.05k
50k
22
50k
Logic
drive
output
24, 25
26, 27
29,30
SVCC
PVCC2
30k
24 25
26 27
1k
29 30
25k
4-CH
drive
output
31, 32
33, 34
36, 37
38, 39
SVCC
PVCC1
31 32
33 34
36 37
38 39
20k
20k
25k
7
FAN8037 (KA3037)
Equivalent Circuits (Continued)
Description
Pin No.
Ref
44
Internal circuit
SVCC
SVCC
20k
20k
1k
1k
0.05k
44
DC MOTOR DRIVE IC
RESX
43
SVCC
SVCC
0.05k
50k
43
50k
REG0X
41
SVCC
SVCC
0.05k
41
1k
REGX
42
SVCC
SVCC
42
0.05k
0.5k
60k
25k
8
FAN8037 (KA3037)
Absolute Maximum Ratings ( Ta=25°°C)
Parameter
Maximum Supply Voltage
Symbol
Value
Unit
SVCCMAX
18
V
PVCC1
18
V
PVCC2
18
V
note
W
Power Dissipation
3
PD
Operating Temperature
TOPR
−35 ~ +85
°C
Storge Temperature
TSTG
−55 ~ +150
°C
Maximum Output Current
IOMAX
1
A
Notes:
1. When mounted on 70mm × 70mm × 1.6mm PCB
2. Power dissipation reduces 24mW/°C for using above TA = 25°C
3. Do not exceed PD and SOA
DC MOTOR DRIVE IC
Pd (mW)
3,000
2,000
1,000
0
0
25
50
75
100
125
150
175
Ambient temperature, Ta [°C]
Recommended Operating Conditions ( Ta=25°°C)
Parameter
Operating Supply Voltage
Symbol
Min.
Typ.
Max.
Unit
SVCC
4.5
-
13.2
V
PVCC1
4.5
-
SVCC
V
PVCC2
4.5
-
SVCC
V
9
FAN8037 (KA3037)
Electrical Characteristics
(SVCC = PVCC1 = PVCC2 = 8V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
15
25
35
mA
Quiescent circuit current
ICC
Under no-load
Power save on current
IPS
Pin21=GND
-
1
2
mA
Stand by on voltage
VSBON
Pin20=Variation
-
-
0.5
V
Stand by off voltage
VSBOFF
Pin20=Variation
2
-
-
V
Power save on voltage
VPSON
Pin21=Variation
-
-
0.5
V
Power save off voltage
VPSOFF
Pin21=Variation
2
-
-
V
All mute on voltage
VMON
Pin22=Variation
-
-
0.5
V
All mute off voltage
VMOFF
Pin22=Variation
2
-
-
V
DC MOTOR DRIVE IC
DRIVER PART (RL=8Ω
Ω)
Output offset voltage
VOO
VIN=2.5V
−80
-
+80
mV
Maximum output voltage 1
VOM1
VCC=PVCC1=PVCC2=8V, RL=8Ω
5.5
6.5
-
V
Maximum output voltage 2
VOM2
VCC=PVCC1=PVCC2=13V, RL=24Ω
10.5
11.5
-
V
10.5
12
13.5
dB
-
2
-
V/µs
Closed-loop voltage gain
AVF
VIN=0.1Vrms
Slew rate
SR
Square, Vout=4Vp-p,f=120kHz
VOF
-
−30
-
+30
mV
IB
-
-
-
300
nA
INPUT OPAMP PART
Input offset voltage
Input bias current
High level output voltage
VOH
RL=Open
7.2
7.7
-
V
Low level output voltage
VOL
RL=Open
-
0.2
0.5
V
Output sink current
ISINK
RL=50Ω
2
4
-
mA
ISOURCE
RL=50Ω
2
4
-
mA
VIN=−75dB
-
70
-
dB
Square, Vout=2Vp-p, f=120kHz
-
2.5
-
V/µs
Output source current
Open loop voltage gain
Slew rate
10
GVO
SR
FAN8037 (KA3037)
Electrical Characteristics (Continued)
(SVCC = PVCC1 = PVCC2 = 8V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
TRAY, CHANGER,PANEL DRIVE PART (RL=45Ω
Ω)
VIH
-
2
-
-
V
Input low level voltage
VIL
-
-
-
0.5
V
Output voltage 1
VO1
VCC=8V, VCTL=3V, RL=8Ω
-
5
-
V
Output voltage 2
VO2
VCC=8V, VCTL=3V, RL=45Ω
-
6
-
V
Output voltage 3
VO3
VCC=13V, VCTL=4.5V,
RL=45Ω
-
9
-
V
Output load regulation
∆VRL
VCTL=3V, IL=100mA → 400mA
-
300
700
mV
Output offset voltage 1
VOO1
VIN=5V, 5V
−40
-
+40
mV
Output offset voltage 2
VOO2
VIN=0V, 0V
−40
-
+40
mV
Load regulation
∆VRL
IL=0 → 200mA
−40
0
+10
V
Line regulation
∆VCC
IL=200mA, VCC=6V → 9V
−20
0
+30
mV
Regulator output voltage 1
VREG1
IL=100mA
4.75
5.0
5.25
V
Regulator output voltage 2
VREG2
IL=100mA
3.135
3.3
3.465
V
Regulator reset on voltage
Reson
Pin43=Varivation
-
-
0.5
V
Regulator reset off voltage
Resoff
Pin43=Varivation
2
-
-
V
DC MOTOR DRIVE IC
Input high level voltage
VARIABLE REGULATOR PART
11
FAN8037 (KA3037)
Application Information
1. THERMAL SHUTDOWN
SVCC
• When the chip temperature reaches to 175°C, then the TSD circuit is
activated.
• This shut down the bias current of the output drivers, and all the
output drivers are in cut-off state. Thus the chip temperature begin to
decrease.
• when the chip temperature falls to 150°C, the TSD circuit is
deactivated and the output drivers are normally operated.
• The TSD circuit has the hysteresis temperature of 25°C.
IREF
Output driver
bias
R1
Q0
R2
Hysteresis
Ihys
R3
DC MOTOR DRIVE IC
2. ALL MUTE FUNCTION
• When the pin22 is high, the TR Q1 is turned on and Q2 is off, so the
bias circuit is enabled. On the other hand, when the pin22 is Low
(GND) , the TR Q1 is turned off and Q2 is on, so the bias circuit is
disabled.
• That is, this function will cause all the output drivers to be in mute
state.
• Truth table is as follows;
Pin#22
FAN8037
HIGH
MUTE-OFF
LOW
MUTE-ON
Bias blocks
(4-Ch BTL
and 3-Ch logic
loading)
SVCC
Q2
22
Q1
3. POWER SAVE FUNCTION
• When the pin21 is high, the TR Q3 is turned on and Q4 is off, so the
bias circuit is enabled. On the other hand, when the pin21 is Low
(GND) , the TR Q3 is turned off and Q4 is on, so the bias circuit is
disabled.
• That is, this function will cause all the circuit blocks of the chip except
for the variable regulator to be in the off state. thus the low power
quiescent state is established
• Truth table is as follows;
12
Pin#21
FAN8037
HIGH
POWER SAVE OFF
LOW
POWER SAVE ON
SVCC
Main Bias
(except for
variable reg.)
Q4
21
Q3
FAN8037 (KA3037)
4. STANDBY FUNCTION
• When the pin20 is high, the TR Q5 is turned on and Q6 is off, so the
bias circuit is enabled. On the other hand, when the pin20 is Low
(GND) , the TR Q5 is turned off and Q6 is on, so the bias circuit is
disabled.
• That is, this function will cause the output drivers of the 4-CH BTL
part(Focus, Tracking, Spindle, Sled) to be in off state.
• Truth table is as follows
Pin#20
KA3037
HIGH
STANDBY OFF
LOW
STANDBY ON
SVCC
Bias block
(4-CH BTL
output driver)
Q6
20
Q5
5. REGULATOR & RESET FUNCTION
• The external circuit is composed of the PNP transistor(KSB772), capacitor(about 33µF) and 2 feedback resistors.
• The capacitor is used as a ripple eliminator and should have good temperature characteristics.
• The regulator output voltage is decided as follows.
VREG = (1+R1/R2) × 2.5
• When the voltage of the pin 43 (Vreset) is high, the regulator circuit operates normally. If the voltage of pin 43 is low, the
regulator circuit is disabled .
SVCC
KSB772
VREG
33µF
Vreset
R1
R2
43
2.5V
42
41
40
−
+
FAN8037
Figure 1. Regulator circuit
13
DC MOTOR DRIVE IC
The regulator and reset circuits are illustrated in the figure 1.
FAN8037 (KA3037)
6. FOCUS, TRACKING ACTUATOR, SPINDLE, SLED MOTOR DRIVE PART
R2
R1
OPin+
OPin-
46
1
4
7
47
2
5
8
48
3
6
9
Vref
−
Vin
+
−
R1
Vp
R2
44
DOP
+
R2
37
34 32
38
36
33 31
M
R2
R1
39
+
DON
−
R2
PVCC1
DC MOTOR DRIVE IC
Dp
60k
+
−
62k
Vp
Qp
• The voltage, Vref is the reference voltage given by the external bias voltage of the pin 44.
• The input signal (Vin) through pins 46,1,4 and 7 is amplified one time and then fed to the output stage.
(assume that input opamp was used as a buffer)
• The total closed loop voltage gain is as follows
Vin = Vref + ∆V
DOP = Vp + 2 ∆V
DON = Vp – 2 ∆V
Vout = DOP – DON = 4 ∆V
Vout
Gain = 20 log ------------- = 20 log 4 = 12dB
∆V
• If you want to change the total closed loop voltage gain, you must use the input opamp as an amplifier
• The output stage is the balanced transformerless (BTL) driver.
• The bias voltage Vp is expressed as ;
62k
Vp = ( PVCC1 – VDp – VcesatQp ) × -------------------------- + VcesatQp
60k + 62k
PVCC1 – VDp + VcesatQp
= --------------------------------------------------------------------------- + VcesatQp
1.97
14
----------
(1)
FAN8037 (KA3037)
7. TRAY, CHANGER,PANEL MOTOR DRIVE PART
out 1
out 2
25 27 30
M
24 26 29
D
D
LEVEL SHIFT
6.5V
M.S.C
CTL1,2,3
V(out1,out2)
10 13 19
S.W
0
IN
FWD
11 14 17
VCTL
REV
12
15 18
• Rotational direction control
The forward and reverse rotational direction is controlled by FWD (pin 11,14, 17) and REV (pin 12,15,18) and the input
conditions are as follows.
INPUT
OUTPUT
FWD
REV
OUT 1
OUT 2
State
H
H
Vp
Vp
Brake
H
L
H
L
Forward
L
H
L
H
Reverse
L
L
-
-
Hign impedance
• Where Vp(Power referencd voltage) is approximately about 3.75V at PVCC2=8V ) acording to equation (1).
• Where out1 pins are pins24,26,29 and out2 pins are pins25,27,30
• Motor speed control (When SVCC=PVCC2=8V)
- The almost maximum torque is obtained when the pins (10,13 and 19 (CTL1, 2, 3)) are open.
- If the voltage of the pins (10,13 and 19 (CTL1, 2, 3)) are 0V, the motor will not operate.
- When the control voltage of the pins 10,13 and 19 (CTL1, 2, 3) are between 0 and 3.25V, the differential output
voltage(V(out1,out2)) is about two times of control voltage. Hence, the control to the differential output gain is two.
- When the control voltage is greater than 3.25V, the output voltage is saturated at the 6.5V because of the output swing
limitation.
15
DC MOTOR DRIVE IC
IN
3.25V
FAN8037 (KA3037)
8. BOOTSTRAPPED OPERATION
• Our IC has two kinds of power supplies, the power supply , SVCC is for
predrivers and the other circuit blocks(SVCC), and PVCC1 and PVCC2 is
for the power transistors.
• When SVCC=PVCCn (n=1,2), no bootstapped operation occurs. Thus the
single-ended maximum output voltage is about to
SVCC
PVCC
Q3
SVCC – ( VcesatQ3 + Vbe1 ) ≅ SVCC – 1V
Q1
• If larger output swing is requied, use the bootstrap function. When
the bootsrap function is operated.
SVCC > PVCCn + 1V
• In the mode, the single-ended maximum output voltage is about to
PVCCn – VcesatQ1 ≅ PVCCn – 0.5 ; hence wide output dynamic
range can be obtained.
Vout
DC MOTOR DRIVE IC
Q2
PreDriver
(PD)
16
Power TRs
FAN8037 (KA3037)
Test Circuits
VCC
50Ω
1
VREF
2.5V
R2
2
100µF +
22µF +
IL
+ 1000µF
OP IN (+)
R1
RIPPLE
OP IN (-)
RL1
OP OUT
2 IN2-
OP OUT
39
38
RL2
37
DO2+
40
DO1−
REGX
41
DO1+
42
PVCC1
43
RESX
44
VREF
IN1+
45
SVCC
46
REGOX
OP IN (-)
OUT1
OP IN (+)
47
IN1−
48
IN2+
1
DO2-
36
PGND2 35
DO3+ 34
OP IN (+)
4 IN3+
DO3− 33
OP IN (-)
5 IN3−
DO4+ 32
OP OUT
6 OUT3
DO4− 31
DC MOTOR DRIVE IC
3 OUT2
RL3
RL4
FAN8037
OP IN (+)
7 IN4+
DO5+ 30
OP IN (-)
8 IN4−
DO5− 29
RL5
PS
MUTE
PVCC2
13
14
15
16
17
18
19
20
21
22
23
DO7−
SB
12
CTL3
DO6−
REV3
11 FWD1
FWD3
DO6+ 27
SGND
REV1
IN1B
10 CTL1
REV2
IN1A
PGND1 28
FWD2
CTL1
9 OUT4
CTL2
OP OUT
IL
IL
RL6
26
DO7+
IL
25
IL
24
RL7
IL
CTL2 IN2A IN2B
IN3A IN3B
IL
CTL3
OP-AMP PART
OPIN(+)
OPIN(−)
A
B
OPOUT
D
1
VPULSE
2
3
VA
1
2
3
VOUT
50Ω
VB
C
1
2
VCC
17
FAN8037 (KA3037)
Typical Application Circuits 1
[Voltage control mode]
VCC
REGOUT
R2
+
22µF
R1
48
47
46
45
44
43
42
41
40
39
38
37
IN1−
IN1+
SVCC
VREF
RESX
REGX
REGOX
PVCC1
DO1+
DO1−
DO2+
1
TRACKING
OUT1
DC MOTOR DRIVE IC
IN2+
FOCUS
2 IN2-
36
DO2−
PGND2 35
3 OUT2
DO3+ 34
4 IN3+
DO3− 33
5 IN3−
DO4+ 32
6 OUT3
DO4− 31
M SLED
M SPINDLE
FAN8037
7 IN4+
DO5+ 30
8 IN4−
DO5− 29
M TRAY
PGND2 28
9 OUT4
10 C TL1
D O 6+ 27
11 FWD1
DO6− 26
REV2
SGND
FWD3
REV3
CLT3
SB
PS
MUTE
PVCC2
13
14
15
16
17
18
19
20
21
22
23
DO7−
FWD2
12
REV1
CTL2
M CHANGER
24
DO7+
25
M PANEL
ALL MUTE
POWER SAVE
FOCUS, TRACKING, SLED
SPINDLE MUTE
VREF
FOCUS TRACKING SLED SPINDLE
INPUT
INPUT INPUT INPUT
[SERVO PRE AMP]
TY CG PL TRAY CHANGER PANEL
INPUT
CONTROL INPUT
INPUT
[CONTROLLER]
Notes:
Radiation pin is connected to the internal GND of the package.
Connect the pin to the external GND.
18
Where TY is tray motor.
CG is changer motor
PL is panel motor
FAN8037 (KA3037)
Typical Application Circuits 2
[Differential PWM control mode ]
VCC
REGOUT
R2
+
22µF
R1
48
47
46
45
44
43
42
41
40
39
38
37
IN1−
IN1+
SVCC
VREF
RESX
REGX
REGOX
PVCC1
DO1+
DO1−
DO2+
1
TRACKING
OUT1
IN2+
FOCUS
2 IN2-
36
DO2−
PGND2 35
DO3+ 34
4 IN3+
DO3− 33
5 IN3−
DO4+ 32
6 OUT3
DO4− 31
DC MOTOR DRIVE IC
3 OUT2
M SLED
M SPINDLE
FAN8037
7 IN4+
DO5+ 30
8 IN4−
DO5− 29
M TRAY
PGND2 28
9 OUT4
10 C TL1
D O 6+ 27
11 FWD1
DO6− 26
REV2
SGND
FWD3
REV3
CLT3
SB
PS
MUTE
PVCC2
13
14
15
16
17
18
19
20
21
22
23
DO7−
FWD2
12
REV1
CTL2
M CHANGER
24
DO7+
25
M PANEL
ALL MUTE
POWER SAVE
FOCUS, TRACKING, SLED
SPINDLE MUTE
VREF
FOCUS TRACKING SLED SPINDLE
INPUT
INPUT INPUT INPUT
[SERVO PRE AMP]
TY CG PL TRAY CHANGER PANEL
CONTROL INPUT
INPUT INPUT
Where TY is tray motor.
CG is changer motor
PL is panel motor
[CONTROLLER]
Notes:
Radiation pin is connected to the internal GND of the package.
Connect the pin to the external GND
19
FAN8037 (KA3037)
DC MOTOR DRIVE IC
Ordering Information
20
Device
Package
Operating Temperature
FAN80037
48-QFPH-1414
−35°C ~ +85°C
DC MOTOR DRIVE IC
FAN8037 (KA3037)
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/28/99 0.0m 001
Stock#DSxxxxxxxx
 1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN8038 (KA3038)
4-CH Motor Drive IC
Description
•
•
•
•
•
•
•
•
•
FAN8038 is Monolithic IC for portable CD player.
4-CH H-Bridge driver
Built-in DC/DC converter controller circuit
Built-in Reset circuit
Built-in Battery charging circuit
Built-in Voltage drop detector
Built-in Thermal shutdown circuit
Built-in general OP-AMP
Low power consumption
Built-in Power controller circuit
DC MOTOR DRIVE IC
Features
Typical application
• Portable compact disk player
• Diskman
• Mini-Disk
Rev. 1.0.0
©2000 Fairchild Semiconductor Corporation
FAN8038 (KA3038)
Pin Assignments
DC MOTOR DRIVE IC
2
FAN8038 (KA3038)
Pin Definitions
Pin Number
Pin Name
Pin Function Descrition
1
OVP
Battery power supply mode
2
BATT
Battery power supply
3
RSTOUT
RSTOUT detection output
4
DEDSET
DEDSET time setting
5
BDSW
6
ERRO
Error amp output
7
ERRI
Error amp input
8
SCP
Short circuit protection setting
9
COSC
Booster transistor drive
Triangular wave output
N.C
11
OPIN(−)
No connection
Op-amp negative input
12
SVCC1
control circuit power supply
13
OPOUT
Op-amp output
14
OPIN(+)
Op-amp positive input
15
SVCC2
Pre-drive power supply
16
VREF
17
DI3
CH3 control signal input
18
DI4
CH4 control signal input
19
MUTE34
20
DI2
21
MUTE2
DC MOTOR DRIVE IC
10
Reference voltage
CH3, 4 mute
CH2 control signal input
CH2 mute
22
DI1
23
BRAKE
CH1 control signal input
CH1 Brake
24
DO4(-)
CH4 negative output
25
DO4(+)
CH4 positive output
26
DO3(-)
CH3 negative output
27
DO3(+)
CH3 positive output
28
PGND
Power unit power ground
29
DO2(+)
CH2 positive output
30
DO2(-)
CH2 negative output
31
DO1(+)
CH1 positive output
32
DO1(-)
CH1 negative output
33
CHGSET
Charge current setting
34
RST
RSTOUT inverting output
35
EMP
Empty detection output
36
DVCC
H-bridge power supply
37
PWM
PWM transistor drive
38
CLKIN
External clock input
39
START
Boost DC/DC converter starting
40
STOP
Boost DC/DC converter off
41
ADPVCC
42
EMPSET
43
SGND
44
FIL
Charging circuit power supply
Empty dection level converting
Signal ground
PWM phase compensation
3
FAN8038 (KA3038)
Internal Block Diagram
2
2
2
2
2
2
DC MOTOR DRIVE IC
2
2
4
FAN8038 (KA3038)
Absolute Maximum Ratings (Ta = 25°°C)
Parameter
Symbol
Value
Unit
Maximum supply voltage
VCC
13.2
V
Maximum output current
IO
500
mA
Power dissipation
PD
1.0
W
Operating temperature
TOPR
−35 ~ +85
°C
Stroage temperature
TSTG
−55 ~ +150
°C
Recommended Operating Conditions (Ta = 25°°C)
Parameter
Min.
Typ.
Max.
Unit
ADPVCC
3.0
4.5
8.0
V
Power Supply Voltage
BATT
1.5
2.4
8.0
V
Control Circuit Power Supply voltage
SVCC
2.7
3.2
5.5
V
PRE-DRIVER VCC
SVCC2
2.7
3.2
5.5
V
Output Voltage
VM
-
PWM
BATT
V
Operating Temperature
Ta
-10
25
70
°C
Charging circuit power supply voltage
DC MOTOR DRIVE IC
Symbol
5
FAN8038 (KA3038)
Electrical Characteristics
(Ta=25°C, BATT=2.4V, SVCC1=SVCC2=3.2V, VREF=1.6V, ADPVCC=0V, fCLKIN=88.2KHz)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
IST
BATT=10.5V,SVCC1,2=VREF=
0V
-
-
5
µA
COMMON SECTION
BATT stand-by current
BATT supply current (No load)
IBATT
DVCC=0.45V, MUTE34=3.2V
-
2.5
3.5
mA
SVCC supply current (NO load)
ISVCC1
DVCC=0.45V, MUTE34=3.2V,
ERRI=0V
-
3.0
3.5
mA
SVCC2 supply current (No load)
ISVCC2
DVCC=0.45V, MUTE34=3.2V
-
3.5
5.0
mA
IADPVCC
ADPVCC=4.5V, ROUT=OPEN
-
0.2
1.0
mA
Voltage gain CH1, 3, 4
CH2
GVC134
GVC2
-
12
21.5
14
23.5
16
24.5
dB
Gain error by polarity
∆GVC
-
−2
0
2
dB
9
6
11
7.5
13
9
KΩ
ADPVCC supply current (No
load)
DC MOTOR DRIVE IC
H-DRIVE PART
Input pin resistance CH1, 3, 4
CH2
IN=1.7 & 1.8V
Maximum output voltage
VOUT
RL=8Ω, DVCC=BATT=4V,
IN=0 ~ 3.2V
1.9
2.1
-
V
Saturation voltage (Lower)
VSAT1
IO=−300mA, IN=0 & 3.2V
-
240
400
mV
Saturation voltage (Upper)
VSAT2
IO=300mA, IN=0 & 3.2V
-
240
400
mV
−8
0
8
mV
−70
−130
0
0
70
130
mV
−30
0
30
mV
Input offset voltage
Output offset voltage CH1, 3, 4
CH2
DEAD zone
-
VIO
VOO134
VOO2
VREF=IN=1.6V
VDB
-
Brake1 on voltage
VM1ON
DI1=1.8V
2.0
-
-
V
Brake1 off voltage
VM1OFF
DI1=1.8V
-
-
0.8
V
MUTE2 on voltage
VM2ON
DI2=1.8V
2.0
-
-
V
MUTE2 off voltage
VM2OFF
DI2=1.8V
-
-
0.8
V
MUTE34 on voltage
VM34ON
DI3=DI4=1.8V
-
-
0.8
V
MUTE34 off voltage
VM34OFF
DI3=DI4=1.8V
2.0
-
-
V
VREF on voltage
VREFON
INn=1.8V(N=1, 2, 3, 4)
1.2
-
-
V
VREF off voltage
VREFOFF
INn=1.8V(N=1, 2, 3, 4)
-
-
0.8
V
brake current
4
7
10
mA
BRAKE1 brake current
6
RDI134
RDI2
IBRAKE
FAN8038 (KA3038)
Electrical Characteristics(Continued)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
10
13
17
mA
0.35
0.45
0.55
V
-
0
5
µA
1/60
1/50
1/40
1/KΩ
3.05
3.20
3.35
V
PWM POWER SUPPLY DRIVING
PWM sink current
IPWM
DI1=2.1V
DVCC level shift voltage
VSHIF
DI1=1.8V, DVCC-OUT1F
DVCC leak current
PWM amp transfer gain
IDLK
GPWM
DVCC=9V, SVCC1,2=BATT=0V
DI1=1.8V, DVCC=1.2V ~ 1.4V
DC/DC CONVERTER
ERROR AMP
-
SVCC1 pin threshold voltage
VS1TH
ERRO pin output voltage H
VEOH
ERRI=0.7V, IO=−100µA
1.4
1.6
-
V
ERRO pin output voltage L
VEOL
ERRI=1.3V, IO=100µA
-
-
0.3
V
SCP pin voltage
VSCP
ERRI=1.3V
-
0
0.1
V
SCP pin current 1
ISCP1
ERRI=0.7V
6
10
16
µA
SCP pin current 2
ISCP2
ERRI=1.3V, OFF=0V
12
20
32
µA
SCP pin current 3
ISCP3
ERRI=1.3V, BATT=9.5V
12
20
32
µA
SCP pin impedance
RSCP
-
175
220
265
KΩ
ERRI=0.7V, COSC=470PF
1.10
1.20
1.30
V
OVP Voltage
9.5
10
10.5
V
SHORT CIRCUIT PROTECTION
Over-voltage protection detect
VSCPTH
VOVP
DC MOTOR DRIVE IC
SCP pin threshold voltage
TRANSISTOR DRIVING
BDSW pin output voltage 1H
VSW1H
BATT=COSC=1.5V
=SVCC2=0V, 10mA
0.78
0.98
1.13
V
BDSW pin output voltage 2H
VSW2H
COSC=0V, IO=−10mA,
ERRI=0.7V
SCP=0V
1.0
1.5
-
V
BDSW pin output voltage 2L
VSW2L
CT=2V, IO=1-mA
-
0.3
0.45
V
BDSW pin oscillating reequency 1
fSW1
COSC=470pF, =SVCC2=0V
65
80
95
KHz
SW pin oscillating reequency 2
fSW2
COSC=470pF, CLKIN=0V
60
70
82
KHz
BDSW pin oscillating reequency 3
fSW3
COSC=470pF
-
88.2
-
KHz
BDSW pin minimum pulse width
TSWMIN
0.01
-
0.6
µs
COSC=470pF, ERRO=0.5 →
0.7V
Pulse duty start
DSW1
COSC=470PF,
SVSS1,SVCC2=0V
40
50
60
%
MAX. pulse duty at self-running
DSW2
COSC=470pF, ERR0=0.8V,
CLKIN=0V
50
60
70
%
MAX. pulse duty at CLKIN
synchronization
DSW3
ERR0=0.8V, COSC=470pF
45
55
65
%
7
FAN8038 (KA3038)
Electrical Characteristics (Continued)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
DEDSET pin impedance
RDEDSET
-
52
65
78
KΩ
DEDSET pin output voltage
VDEDSET
-
0.78
0.88
0.98
V
ERRI=1.3V
2.0
-
-
V
OFF=0V
75
95
115
µA
START pin on threshold voltage VSTATH1
SVCC1,SVCC2=0V,
COSC=2V
1.3
-
-
V
START pin off threshold voltage VSTATH2
SVCC1,SVCC2=0V,
COSC=2V
-
-
2.1
V
START pin bias current
START=0V
13
16
19
µA
-
2.0
-
-
V
-
-
-
0.8
V
-
-
10
µA
DEAD TIME
INTERFACE
STOP pin threshold voltage
STOP pin bias current
DC MOTOR DRIVE IC
CLKIN pin threshold voltage H
VSTOPTH
ISTOP
ISTART
VCLKINTH
H
CLKIN pin threshold voltage L
VCLKINTH
L
CLKIN pin bias current
ICLKIN
CLKIN=3.2V
VSSV
SVCC1,SVCC2=0V → 3.2V
START=0V
2.3
2.5
2.7
V
START=0V
130
200
300
mV
START CURCUIT
Starter switching voltage
Starter switching hysteresis
width
Discharge release voltage
VSSHS
VDIS
-
1.63
1.83
2.03
V
RRSTOTH
-
85
90
95
%
RESET detection hysteresis
width
VRSTHS
-
25
50
100
mV
RSTOUT pin output voltage
VRSTO
-
-
0.5
V
RSTOUT pin pull up resistance
RRSTO
72
90
108
KΩ
RST pin output voltage 1
VRST1
IO=−1mA,
SVCC1,SVCC2=2.8V
2.0
-
2.4
V
RST pin output voltage 2
VRST2
IO=−1mA,
SVCC1,SVCC2=0V
2.0
-
2.4
V
RST pin pull up resistance
RRST
77
95
113
KΩ
RESET CIRCUIT
SVCC1 RESET threshold
voltage ratio
8
IO=1mA,
SVCC1,SVCC2=2.8V
-
-
FAN8038 (KA3038)
Electrical Characteristics (Continued)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
OP-AMP
IBIAS
IN(+)=1.6V
-
-
300
nA
Input offset voltage
VOFOP
IN(+)=1.6V
−5.5
0
5.5
mV
High level output voltage
VOHOP
RL=OPEN
2.8
-
-
V
Low level output voltage
VOLOP
RL=OPEN
-
-
0.2
V
VSOURCE
50Ω GND
-
−6.5
−3.0
mA
Output drive current (Sink)
VSINK
50Ω SVCC
0.4
0.7
-
mA
Open loop voltage gain
GVO
VIN=−75dB, F=1KHz
-
70
-
dB
-
-
0.5
-
V/µs
ADPVCC=4.5V,
CHGSET=1.8KΩ
0.71
0.81
0.91
V
CHGSET pin output resistance RCHGSET
ADPVCC=4.5V
0.75
0.95
1.20
KΩ
EMPSET pin leak current 1
IEMPSET
ADPVCC=4.5V,
CHGSET=OPEN
-
-
1.0
µA
EMPSET pin leak current 2
IEMPSET
ADPVCC=0.6V,
CHGSET=1.8KΩ
-
-
1.0
µA
ADPVCC=4.5V, IO=300mA,
CHGSET=0Ω
-
0.45
1.0
V
Input bias current
Output drive current (Source)
Slew rate
SR
BATTERY CHARGING CURCUIT
CHGSET pin bias voltage
VCHGSET
DC MOTOR DRIVE IC
EMPSET pin saturation voltage VEMPSET
EMPTY DETECTION
EMP detection voltge 1
VEMPT1
VEMPSET=0V
2.1
2.2
2.3
V
EMP detection voltge 2
VEMPT2
IEMPSET=−2µA
1.7
1.8
1.9
V
EMP detection hysteresis
voltage 1
VEMHS1
VEMPSET=0V
25
50
100
mV
EMP detection hysteresis
voltage 2
VEMHS2
IEMPSET=−2µA
25
50
100
mV
IO=1mA, OVP=1V
-
-
0.5
V
OVP=2.4V
-
-
1.0
µA
17
23
27
KΩ
-
-
1.0
V
EMP pin output voltage
EMP pin output leak current
OVP pin input resistance
OVP pin leak current
VEMP
IEMPLK
ROVP
IOVPLK
VEMPSET=0V
SVCC1=SVCC2=0V,
OVP=4.5V
EMP_SET pin detection
voltage
VEMPSET
VEMPSET=BATT-EMPSET,
OVP=2V
1.5
-
-
V
EMP_SET pin detection
current
IEMPSET
EMPSET
−2
-
-
µA
9
FAN8038 (KA3038)
Application Information
1. MUTE FUNCTION
• When The BRAKE Pin is low is normal opration (high is CH1 mute on).
• When The Mute2 Pin is low is normal opration (high is CH2 mute on).
• When The Mute34 Pin is high is normal opration (low is CH3,4 mute on).
2. VREF DROP MUTE (FIGURE 1)
• When the Voltage of the mute pin is above 1V, the mute circuit is stopped and the output circuit is.
DC MOTOR DRIVE IC
!
Figure 1. VREF Drop MUTE Circuit
"
Figure 2. TSD C
3. THERMAL SHUTDOWN(FIGURE 2)
• If the chip temperature rises above 150°C, then the thermal shutdown (TSD) circuit is activated and the output circuit will
be mute.
4. H-BRIDGE DRIVER (4-CHANNELS)
Driver input resistance is 10KΩ of CH1, CH3, CH4 and input resistance of CH2 is 7.5KΩ.
Driver gain can obtain under -mentioned
CH1, 3, 4:
55K
GV = 20 log --------------------11K + R
CH2
110K GV = 20log ---------------------7.5K + R
R is External resistance.
10
FAN8038 (KA3038)
5. SWITCHING REGULATED POWER SUPPLY DRIVE
• This circuit detects a maximum output value of 4CH drivers and then generates PWM Signal.
• External Component is PNP-Tr, Coil, Schottky Diodeand Capacitor .
DC MOTOR DRIVE IC
Figure 1. Switching Regulated Power Supply
6. DC/DC CONVERTER CONTROL CIRCUIT
• Booster circuit needs External component. and the voltage() is defined as follows.
R1 ⋅ R3- --------------------R2 ⋅ R4--------------------+
+ R3 R2 + R4
R1
SVCC1 = 1.267 × --------------------------------------------------R2 ⋅ R4--------------------R2 + R4
R1 =
R2 =
R3 =
R4 =
Resistor1
Resistor2
30KΩ
30.5KΩ
#
$#
Figure 2. Output Voltage
11
FAN8038 (KA3038)
• Short Circuit Protection function when GND and is short, ERRI become LOW and ERRO HIGH and it makes capacitor
charging. fanally AMP3 is OFF.(figure 5)
DC MOTOR DRIVE IC
Figure 3. DC/DC Converter Control Circuit
Switching off time depen on a capacitor of the SCP . and the equation is as follow.
VTH
t = C SCP × -----------I SCP
( V TH = 1.25V, I SPRT = 10µA )
• Max Duty can be controlled resistor. the equation is as follow
t = C DEDSET × R
( R = 65KΩ )
• Capacitor of the SCP terminal can control disable switiching time and it can be calculated by as follow equation.
V TH
t = C SCP × --------------I STOP
( VTH = 1.25V, IOFF = 20µA )
• Over Voltage Protection BATT Voltage is over 9.7V charging SCP terminal Capacitor, it reach to VTH SW terminal signal
is OFF the equation is as follow
V TH
t = C SCP × ---------I HV
( V TH = 1.25V, I HV = 20µA )
• If Output Voltage of RSTOUT Circuit DC/DC Conver is over than 90%, RSTOUT terminal turn to HIGH and Hysteresis is
50mV. and RSTOUT stste is ON.
12
FAN8038 (KA3038)
7. EMPTY DETECTING CIRCUIT.
EMPSET
Detect Voltage
Hysteresis
Mode
LOW
2.2V
50mV
Battery Mode
HIGH-Z
1.8V
50mV
Adapter Mode
8. BATTERY CHARGING CIRCUIT
• the battery charger circuit is separated from any other block .
• TSD operate at 150°C. Hysteresis is 30°C
DC MOTOR DRIVE IC
13
FAN8038 (KA3038)
Typical Perfomance Characteristics
DC MOTOR DRIVE IC
+
69&8
-.-0
-
,-.-0
,-./
/.0
1.0
2.0
3.0
0.0
4.0
5.0
%&''67 8
!"#
14
%&''()*(+
-./
FAN8038 (KA3038)
Typical Application Circuits
2
2
2
2
2
2
2
2
DC MOTOR DRIVE IC
Ordering Information
Device
Package
Operating Temperature
FAN8038
44-QFP-1010B
−35°C ~ +85°C
15
DC MOTOR DRIVE IC
FAN8038 (KA3038)
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/28/99 0.0m 001
Stock#DSxxxxxxxx
 1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN8725 (KA3025)
Spindle and 5-CH Driver
Features
Description
Common
The FAN8725 is a monolithic IC suitable for a 3-phase
BLDC spindle motor driver and 5-ch motor drivers which
drives the focus actuator, tracking actuator, loading motor,
stepping motor driver of the CD-media systems.
•
•
•
•
Built-in thermal shutdown circuit (TSD)
Built-in power save circuit
3 Independent voltage source
Corresponds to 3.3V or 5V DSP
•
•
•
•
•
CD-MEDIA ONE CHIP IC
Spindle
48-QFPH-1414
Built-in hall bias
Built-in FG signal output circuit
Built-in rotational direction detecting circuit
Built-in protection circuit for reverse rotation
Built-in short brake circuit
BTL (5-channel)
• Built-in 5-CH balanced transformerless (BTL) driver
• Built-in Level shift circuit
• Independent voltage sources
- VM2 = CH1,CH2 / VM3 = CH3, CH4 ,CH5
Typical Applications
•
•
•
•
•
Compact disc ROM
Digital video disc ROM
Compact disc recorderable
Digital video disc player
Compact disc player
Rev. 1.0.0
©2000 Fairchild Semiconductor Corporation
FAN8725 (KA3025)
CD-MEDIA ONE CHIP IC
VH
PC1
EC
ECR
PS
SB
VREF
SVCC2
VM3
OUT5
IN5
PGND3
Pin Assignments
48
47
46
45
44
43
42
41
40
39
38
37
H1+
1
36
DO5 -
H1-
2
35
DO5+
H2+
3
34
DO4 -
H2-
4
32
DO4+
H3+
5
32
DO3 -
H3-
6
31
DO3+
FAN8725
2
VM1
10
27
DO1 -
CS1
11
26
DO1+
PGND1
12
25
OUT1
13
14
15
16
17
18
19
20
21
22
23
24
IN1
DO2+
VM 2
28
O UT2
9
IN2
SVCC1
O UT3
DO2 -
IN3
29
O UT4
8
IN4
DIR
SG ND2
PGND2
A3
30
A2
7
A1
FG
FAN8725 (KA3025)
Pin Definitions
Pin Name
I/O
Pin Function Description
1
H1-
I
Hall 1(-) input
2
H1+
I
Hall 1(+) input
3
H2+
I
Hall 2(-) input
4
H2-
I
Hall 2(+) input
5
H3+
I
Hall 3(-) input
6
H3-
I
Hall 3(+) input
7
FG
O
Frequency Generator output
8
DIR
O
Rotation direction output
9
SVCC1
-
Spindle Signal supply voltage
10
VM1
-
Spindle power supply
11
CS1
I
Spindle current sense
12
PGND1
-
Spindle power ground
13
A1
O
3-phase output1
14
A2
O
3-phase output2
15
A3
O
3-phase output3
16
SGND2
-
CH signal ground
17
IN4
I
OP-Amp CH 4 input(-)
18
OUT4
O
OP-Amp CH 4 output
19
IN3
I
OP-Amp CH 3 input(-)
20
OUT3
O
OP-Amp CH 3 output
21
IN2
I
OP-Amp CH 2 input(-)
22
OUT2
O
OP-Amp CH 2 output
23
VM2
-
CH1/CH2 power supply
24
IN1
I
OP-Amp CH 1 input(-)
25
OUT1
O
OP-Amp CH 1 output
26
DO1+
O
Channel 1 output (+)
27
DO1 -
O
Channel 1 output (−)
28
DO2+
O
Channel 2 output (+)
29
DO2 -
O
Channel 2 output (−)
30
PGND2
-
CH1/CH2 power ground
31
DO3+
O
Channel 3 output (+)
32
DO3 -
O
Channel 3 output (−)
33
DO4+
O
Channel 4 output (+)
CD-MEDIA ONE CHIP IC
Pin Number
3
FAN8725 (KA3025)
CD-MEDIA ONE CHIP IC
Pin Definitions (Continued)
Pin Number
Pin Name
I/O
Pin Function Description
34
DO4 -
O
Channel 4 output (−)
35
DO5+
O
Channel 5 output (+)
36
DO5-
O
Channel 5 output (−)
37
PGND3
-
CH3/CH4/CH5 power ground
38
IN5
I
OP-Amp CH 5 input(-)
39
OUT5
O
OP-Amp CH 5 output
40
VM3
-
CH3/CH4/CH5 power supply
41
SVCC2
-
CH Signal supply voltage
42
VREF
I
BTL reference voltage
43
SB
I
Short brake
44
PS
I
Power save
45
ECR
I
Torque control reference
46
EC
I
Torque control
47
PC1
-
Phase compensation capacitor
48
VH
I
Hall bias
Notes:
BTL drive part symbol(+,- outputs of drives) is determined according to the polarity of input pin.
(For example, if the voltage of pin 24 is high, the output of pin 26 is high)
4
FAN8725 (KA3025)
H2+
3
H2 -
4
H3+
5
H3 -
6
OUT5
IN5
PGND3
SB
VM3
PS
SVCC2
ECR
43
VREF
EC
44
FIN(GND)
PC1
45
42
41
40
39
38
37
Hall
Bias
Absolute Values
Current
Sense Amp
CS1
2
46
Output
Current Limit
36
DO5 -
35
DO5+
34
DO4 -
33
DO4+
32
DO3 -
31
DO3+
R
VM3
FG
Generator
Detection
FIN(GND)
VM
H1 -
47
Hall Amp
1
48
CD-MEDIA ONE CHIP IC
H1+
VH
Internal Block Diagram
VM3
R
VM3
FIN(GND)
Logic
R
VM2
FG
7
Reverse
Rotation
DIR
8
Short
Brake
SVCC1
9
VM2
VM2
R
30 PGND2
Distributor
29
DO2 -
28
DO2+
27
DO1 -
VM1
10
CS1
11
26
DO1+
PGND1
12
25
OUT1
20
21
22
23
24
OUT2
VM2
IN1
SGND2
19
IN2
A3
18
OUT3
A2
17
IN3
16
FIN(GND)
15
OUT4
14
IN4
13
A1
Driver
5
FAN8725 (KA3025)
Equivalent Circuits (Spindle Part)
HALL INPUT
DRIVER OUTPUT
Pin 10
1KΩ
22.5Ω
1KΩ
Pin 11
22.5Ω
15KΩ
Pin
2,4,6
Pin
1,3,5
Pin 13,14,15
CD-MEDIA ONE CHIP IC
TORQUE CONTROL INPUT
22.5Ω
HALL BIAS INPUT
1KΩ
5Ω
+
P in 45
Pin 48
1KΩ
22.5Ω
-
Pin 46
100KΩ
POWER SAVE INPUT
22.5Ω
SHORT BRAKE INPUT
22.5Ω
40KΩ
1KΩ
Pin 43
Pin 44
30KΩ
20KΩ
FG OUTPUT
DIR OUTPUT
Vcc
Vcc
10KΩ
30KΩ
22.5Ω
22.5Ω
Pin 7
6
Pin 8
FAN8725 (KA3025)
Equivalent Circuits (BTL Part)
OP-AMP INPUT
20KΩ
OP-AMP OUTPUT
20KΩ
Pin
25,22,20,18,39
Pin
24,21,
19,17,38
22.5Ω
1KΩ
40kΩ
20kΩ
CD-MEDIA ONE CHIP IC
DRIVE OUTPUT
VREF
CH-O
(Pin 26,28,31,33,35 )
20KΩ
20KΩ
Pin 42
CH-O
(Pin 27,29,32,34,36)
22.5Ω
1KΩ
20kΩ
7
FAN8725 (KA3025)
CD-MEDIA ONE CHIP IC
Absolute Maximum Ratings (Ta = 25oC)
Parameter
Symbol
Value
Unit
Supply Voltage (Spindle Signal)
Supply Voltage (BTL Signal)
Supply Voltage (Spindle Motor)
Supply Voltage (BTL CH1/2)
Supply Voltage (BTL CH3/4/5)
Power Dissipation
Operating Temperature Range
Storage Temperature Range
Maximum Output Current (Spindle Part)
Maximum Output Current (BTL Part)
SVCC1max
SVCC2max
VM1max
VM2max
VM3max
PD
TOPR
TSTG
IOmaxa
IOmaxb
7
15
15
15
15
@3.0
-20 ~ +75
-55 ~ +150
1.3
0.6
V
V
V
V
V
W
°C
°C
A
A
@: 1. When mounted on 70mm × 70 mm × 1.6mm PCB (Phenolic resin material)
2. Power dissipation is reduced 24 mW/°C for using above Ta=25°C
3. Do not exceed PD and SOA(Safe Operating Area).
Pd [mW]
3,000
2,000
1,000
0
0
25
50
85 100
125
150
Ambient Temperature, Ta [°C]
175
Recommended Operating Conditions (Ta = 25oC)
Parameter
8
Symbol
Min.
Typ.
Max.
Unit
Operating Supply Voltage (Spindle Signal)
SVCC1
4.5
–
5.5
V
Operating Supply Voltage (BTL Signal)
SVCC2
10.8
–
13.2
V
Operating Supply Voltage (Spindle Motor)
VM1
10.8
–
13.2
V
Operating Supply Voltage (BTL CH1/2)
VM2
4.5
–
SVCC2
V
Operating Supply Voltage (BTL CH3/4/5)
VM3
4.5
–
SVCC2
V
FAN8725 (KA3025)
Electrical Characteristics (Ta = 25oC)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Units
FULL CHIP
Quiescent Circuit Current 1
ICC1
FULL CHIP (PS=0V)
–
0
0.2
mA
Quiescent Circuit Current 2
ICC2
SPINDLE
(PS=5V)
–
5
10
mA
Quiescent Circuit Current 3
ICC3
BTL
( PS=5V)
–
20
30
mA
POWER SAVE
On Voltage Range
VPSon
L-H Circuit On
2.5
–
Vcc
V
Off Voltage Range
VPSoff
H-L Circuit Off
–
–
1.0
V
0.4
1.0
1.8
V
IHA
–
0.5
2
uA
Common Mode Input Range
VHAR
1.5
–
4.0
V
Minimum in Level
VINH
100
–
–
mVpp
H1 Hysteresis
VHYS
5
20
40
mVpp
Ecr In Voltage Range
ECR
0.2
–
4.0
V
Ec In Voltage Range
EC
0.2
–
4.0
V
HALL BIAS
Hall Bias Voltage
VHB
IHB=20mA
HALL AMP
CD-MEDIA ONE CHIP IC
Hall Bias Current
TORQUE CONTROL
Offset Voltage (-)
ECoff-
EC =1.9V
-80
-50
-20
mV
Offset Voltage (+)
ECoff+
ECR =1.9V
20
50
80
mV
EC In Current
ECin
EC=1.9V
-3
-0.5
–
uA
ECR In Current
ECRin
ECR=1.9V
-3
-0.5
–
uA
In/output Gain
GEC
ECR=2.5V, RCS=0.5Ω
0.56
0.70
0.84
A/V
FG Output Voltage (H)
VFGh
IFG= -10uA
4.5
4.9
VCC
V
FG Output Voltage (L)
VFHl
IFG=10uA
–
–
0.5
V
FG
Duty(Reference Value)
RCS=0.5Ω
50
%
OUTPUT BLOCK
Saturation Voltage (upper TR)
VOh
IO= -300mA
–
1.0
1.4
V
Saturation Voltage (lower TR)
VOl
IO=300mA
–
0.4
0.7
V
Torque Limit Current
ITL
RCS=0.5Ω
560
700
840
mA
DIR Output Voltage (H)
VDIRh
IFG=-10uA
4.5
4.7
Dir Output Voltage (L)
VDIRl
IFG=10uA
–
–
0.5
V
DIRECTION DETECTOR
V
SHORT BRAKE
On Voltage Range
VSBon
2.5
–
VCC
V
Off Voltage Range
VSBoff
0
–
1.0
V
9
FAN8725 (KA3025)
Electrical Characteristics (Continued)
BTL Drive Part (Ta=25°°C, SVCC2=12V, VM2=5V, VM3=12V, RL=8, 24Ω
Ω)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Units
-95
–
95
mV
CH1/CH2
Output Offset Voltage1,2
VOF1/2
Maximum Output Voltage1,2
VOM1/2
VM2=5V,RL=8Ω
3.6
4.0
–
V
Voltage Gain
GVC1/2
VIN=0.1Vrms, 1kHz
12.0
14.0
16.0
dB
-95
–
95
mV
CD-MEDIA ONE CHIP IC
CH3/CH4/CH5
Output Offset Voltage3,4,5
VOF3/4/5
Maximum Output
Voltage3,4,5
VOM3/4/5
VM3=12V,RL=24Ω
8.4
10.5
–
V
Voltage Gain
GVC3/4/5
VIN=0.1Vrms, 1kHz
16.0
18.0
20.0
dB
VICM
0
–
11.0
V
ΙB
-300
-30
OP-AMP PART
Common Mode Input Range
Input Bias Current
Low Level Output Voltage
VCL
High Level Output Voltage
VOH
Output Driving Source Current
Output Driving Sink Current
10
nA
0.2
0.5
V
10.0
11
–
V
ISOURCE
1
4.0
–
mA
ISINK
5
10
–
mA
FAN8725 (KA3025)
Application Information
1. TORQUE CONTROL & OUTPUT CURRENT CONTROL
VM
+
Rcs
Vcs
VM
+
Ecr
+
Current Sense AMP
VAMP
Torque AMP
Io
+
-
-
Gain
Controller
Driver
M
ECR-EC
TSD
Ec
2) The output current (IO) is converted into the voltage (VCS) through the sense resistor (RCS) and compared with the VAMP.
By the negative feedback loop, the sensed output voltage, VCS is equal to the input VAMP. Therefore, the output current
(IO) is linearly controlled by the input VAMP.
3) As a result, the signals, EC and ECR can control the velocity of the Motor by controlling the output current (IO) of the
Driver.
4) The range of the torque voltage is as shown below.
Current
[mA]
Forward
Reverse
Rotation
700
Ecoff- Ecoff+
ECR > Ec
Forward rotation
ECR < Ec
Stop after detecting reverse rotation
6
-1.0 V
-50m V
0
50m V
1.0 V
ECR -EC
The input range of ECR, EC is 0.2 V ~ 4.0 V ( RCS = 0.5[Ω] )
11
CD-MEDIA ONE CHIP IC
1) By amplifying the voltage difference between Ec and Ecr from Servo IC, the Torque Sense AMP produces the input
(VAMP) for the Current Sense AMP.
FAN8725 (KA3025)
2. SHORT BRAKE
MOTOR
OFF
Vcc
ON
43
13
1KΩ
14
15
OFF
ON
CD-MEDIA ONE CHIP IC
20KΩ
Pin # 43
Short Brake
HIGH
ON
LOW
OFF
When the pick-up part moves from the inner to the outer spindle of the CD, the Brake function of the reverse voltage is commonly employed to decrease the rotating velocity of the Spindle Motor.
However, if the Spindle Motor rotates rapidly, the Brake function of the reverse voltage may produce much heat at the Drive
IC.
To remove this shortcoming and to enhance the braking efficiency, the Short Brake function is added to FAN8725. When the
Short Brake function is activated, all upper Power TRs turn off and all lower Power TRs turn on, so as to make the rotating
velocity of the motor slow down. But FG and DIR functions continue to operate normally.
3. POWER SAVE
Vcc
IC bias
Start
44
40KΩ
Stop
30KΩ
Pin # 44
Power Save
HIGH
Operate
LOW
Sleep mode
When PS function is activated, the chip is deactivated.
12
FAN8725 (KA3025)
4. TSD (THERMAL SHUTDOWN)
Gain
Controller
BIAS
Q2
When the chip temperature rises up to about 175C(degree), the Q2 turns on so that the output driver will be shutdown. When
the chip temperature falls off to about 150C(degree), then the Q2 turns off so that the driver is to operate normally. Thus, TSD
has the temperature hysteresis of about 25C(degree).
5. ROTATIONAL DIRECTION DETECTION
Vcc
H2+
+
H2-
-
DIR
Rotation
8
DIR
Forward
Low
Reverse
High
8
D
Q
CK
H3+
+
H3-
-
D-F/F
1) The forward and the reverse rotations of the CD are simply detected by using the D-F/F and the truth table is shown in the
above table.
2) The rotational direction of the CD can be explained by the output waveform of the Hall sensors. Let the three outputs of
Hall sensors be H1, H2 and H3 respectively.
When the spindle rotates in reverse direction, the Hall sensor output waveform are shown in Fig.(a). Thus the phases
ordered in H1→H2→H3 with a 120° phase difference.
H1
H2
H3
(a) Reverse rotation
13
CD-MEDIA ONE CHIP IC
-- The TSD circuit shuts down all the power drives(spindle and BTL power drives) excluding both CH1 and CH2 power
drives(actuator part).
FAN8725 (KA3025)
On the other hand, if the spindle rotates in forward rotation, the phase relationship is H3ÆH2ÆH1 as shown in Fig.(b)
H1
H2
H3
CD-MEDIA ONE CHIP IC
(b) Forward rotation
Therefore, the output of the rotational direction detector is Low, when the spindle rotates forward, while HIGH as in the case
of the reverse rotation.
6. REVERSE ROTATION PREVENTION
EC
+
ECR
-
H2+
+
H2-
-
H3+
+
H3-
-
Current
Sense
Amp
Low Active
A
Q
D
CK
D-F/F
Gain
Controller
Driver
M
1) When the output of the OR Gate, A is LOW, it steers all the output current of the current sense Amp makes the current
delivered to the Gain Controller zero. Thus the output current of the Driver becomes zero and the motor is stopped.
2) As in the state of the forward rotation, the D-F/F output, Q is HIGH and the motor rotates normally. At this state, if the
control input is changed such that EC>ECR, then the motor rotates slowly more and more by the reverse commutation in
the Driver. At the moment that the motor rotates in reverse direction, the D-F/F output becomes Low and the OR Gate output, thus, becomes LOW. This prevents the motor from rotating in reverse direction. The operation principle is shown in
the table and the flow chart.
14
FAN8725 (KA3025)
Forward rotation at EC < ECR
Rotating speed is decreased due to reverse torque at EC >ECR. (Motor still rotates forward)
At the moment that the motor rotates in reverse, the reverse rotation preventer makes the output power transistor open.
Rotating reverse at short time due to motor inertia
Stop within 1/6 turn reverse rotating
CD-MEDIA ONE CHIP IC
Reverse Rotation Preventer
Rotation
H2
H3
D-F/F
(Q)
ECR>EC
EC>ECR
Forward
H
H→L
H
Forward
-
Reverse
L
H→L
L
-
Brake and Stop
7. FG OUTPUT
Vcc
7
H3+
+
H3-
-
FG
8. HALL SENSOR CONNECTION
Vcc
Vcc
HALL 1
HALL 1
HALL 2
HALL 3
HALL 2
HALL 3
48 VH
48 VH
15
FAN8725 (KA3025)
9. CONNECT A BYPASS CAPACITOR, FROM ALL THE SUPPLY VOLTAGE SOURCES TO GROUND.
(Typically 0.1uF, or even higher)
SVcc1, SVcc2, VM1, VM2, VM3
0.1uF
10. THE HEAT RADIATION FIN IS CONNECTED TO THE INTERNAL GND OF THE PACKAGE.
CD-MEDIA ONE CHIP IC
Connect the FIN to the external GND.
16
FAN8725 (KA3025)
11. INPUT-OUTPUT TIMING CHART
H1 +
H2 +
CD-MEDIA ONE CHIP IC
H3 +
A1 output current
(H1 -)+(H2 +)
A1 output voltage
A2 output current
(H2 -)+(H3 +)
A2 output voltage
A3 output current
(H3 -)+(H1 +)
A3 output voltage
17
FAN8725 (KA3025)
12. BTL DRIVE PART
10K
10K
10K
−
10K
25K 25K
(40K) (40K)
25K
(40K)
−
+
+
+
R
18 20 22 24 39
−
R
Error
Amp
VM2
(VM3)
+
R2
+
42
Vref
−
CD-MEDIA ONE CHIP IC
DO+ 26 28 31 33 35
Power amp
25K
(40K)
23 40
VM2
(VM3)
M
−
27 29 32 34 36 DO
−
R1
17 19 21 24 38
•
•
•
•
The reference voltage REF is given externally through pin 42.
The error amp output signal is amplified by R2 / R1 times and then fed to the power amp part.
The power amp part produces the differential output voltages and drives the two output power amplifier circuit.
Since the differential gain of the output amplifiers of CH1/CH2 is equal to 2 × (25K / 10K) , the output signal of the error
amp is amplified by (R2 / R1) × 5.
• Since the differential gain of the output amplifiers of CH3/CH4/CH5 is equal to 2 × (40K / 10K) , the output signal of the
error amp is amplified by (R2 / R1) × 8.
• If the total gain is insufficient, the input error amp can be used to increase the gain.
• The CH1/CH2 are generally used as actuator drive part so this channels are not affected by TSD circuit.
18
FAN8725 (KA3025)
Typical Application Circuits
SLED2
SIGNAL
SERVO
SIGNAL
SHORT
BRAKE
SVCC2
VM3
43
42
41
40
39
38
VREF
SVCC2
VM3
OUT5
IN5
PGND3
44
SB
1
H1+
2
H1 -
D O 5 + 35
3
H2+
DO4 - 34
4
H2 -
D O 4 + 33
5
H3+
DO3 - 32
HALL1
45
PS
46
ECR
47
EC
48
PC1
VH
POWER
SAVE
37
DO5 - 36
SLED
(stepping)
MOTOR
M
LOADING
MOTOR
CD-MEDIA ONE CHIP IC
M
HALL2
HALL3
6
D O 3 + 31
H3 -
FAN8725
8
DIR
9
SVCC1
DO2 - 29
DO1 - 27
11 CS1
D O 1 + 26
A3
SGND2
IN4
OUT4
IN3
OUT3
IN2
OUT2
VM2
IN1
14
FOCUS
ACTUATOR
OUT1
15
16
17
18
19
20
21
22
23
24
12 P G N D 1
13
TRACKING
ACTUATOR
D O 2 + 28
10 V M 1
A1
VM1
FG
A2
SVCC
1
P G N D 2 30
7
25
VM2
SLED1
SIGNAL
LOADING
SIGNAL
TRACKING
SIGNAL
FOCUS
SIGNAL
Ordering Information
Device
Package
Operating Temperature
FAN8725
48-QFPH-1414
−35°C ~ +85°C
19
CD-MEDIA ONE CHIP IC
FAN8725 (KA3025)
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
12/28/99 0.0m 001
Stock#DSxxxxxxxx
 1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN8800 (KA3162)
Single IGBT Gate Driver
Features
Description
•
•
•
•
•
•
•
•
•
The FAN8800 is a monolithic integrated circuit designed for
driving single IGBT with De-saturation and undervoltage
protection. It is suitable for driving discrete and module
IGBTs, and further, it offers a cost effective solution for driving power MOSFETs. The integrated fault feedback notifies
the controller when the IGBT is shutdown due to a De-saturation or a over current condition.
High Current Output: 1.0A Source and 2.0A Sink
Protection against Overcurrent and Short circuit
CMOS Compatible Input and Fault Status Indicator
Programmable Fault-Out Duration Time
Built in Slow Turn-off Circuit Under Fault Condition
Undervoltage Lockout Optimized for IGBTs
Negative Gate Drive Capability
Suitable for Integration in Power Modules
-40 to 105°C Operating Temperature
8-DIP
ETC. DRIVE IC
Typical Applications
• Gate drive for single insulated gate bipolar TR
• Gate drive for single MOSFET
Rev. 1.0.0
©2000 Fairchild Semiconductor Corporation
FAN8800 (KA3162)
Pin Assignments
TDUR
1
8
DESAT
GND
2
7
FAULT
FAN8800
IN
3
6
VCC
Vee
4
5
OUT
ETC. DRIVE IC
( Top View )
Pin Definitions
2
Pin Number
Pin Name
Pin Function Descrition
1
TDUR
Fault Output Duration(Adjustment Capacitor for Fault-Out Duration)
2
GND
Ground
3
IN
4
Vee
Gate drive voltage output
5
OUT
Output supply voltage (Negative)
6
VCC
Output supply voltage (Positive)
7
FAULT
Fault Output. FAULT changes from a logic low state to a logic high output
when a fault condition is detected.
8
DESAT
De-saturation voltage input. When the voltage on DESAT exceeds an
internal reference voltage of 6.5v while the IGBT is on, FAULT output is
changed from a logic low state to a logic high state.
Inverting gate drive voltage output (Vout) control input
FAN8800 (KA3162)
Internal Block Diagram
S
FAULT 7
Q
-
8
DESAT
6
Vcc
4
Vee
R
+
Ref1
6.5v
TDUR
1
Fault-Out
Duration
Delay
+
Ref2
4.5v
UVLO
2
IN
3
Slow
Turn off
Control
Buffer
Output
Circuit
5 OUT
ETC. DRIVE IC
GND
3
FAN8800 (KA3162)
Equivalent Circuits
Driver Input
Driver Output
Vcc
Vcc
5
3
Vee
Vee
ETC. DRIVE IC
Fault Out
Desat
Vcc
300uA
2K
7
8
Vee
Vee
TDUR
2K
1
Vee
4
2K
FAN8800 (KA3162)
Absolute Maximum Ratings (Ta = 25°°C)
Parameter
Symbol
Value
Unit
Power Supply Voltage
VCC - Vee
36
V
Output Source Current
Output Sink Current
IO
1.0
2.0
A
Fault Output Source Current
Fault Output Sink Current
IFO
25
10
mA
Input Voltage
Vin
Vee - 0.3 to VCC
V
VDESAT
-0.3 to VCC
V
PD
0.56
W
Operating Ambient Temperature Range
TOPR
-40 to 105
°C
Storage Temperature Range
TSTG
-55 to 150
°C
De-saturation Voltage
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation @Ta =25°C
Recommened Operating Conditions (Ta = 25°°C)
Symbol
Min.
Typ.
Max
Unit
Total Supply Voltage
VCC
+13
+15
+18
V
Operating Power Supply Voltage
Vee
-13
-15
-18
V
Operating Ambient Temperature
Ta
-40
25
105
°C
ETC. DRIVE IC
Parameter
5
FAN8800 (KA3162)
Electrical Characteristics (Ta = 25°°C)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
High Input Threshold Voltage
VIH
-
-
2.7
3.2
V
Low Input Threshold Voltage
VIL
-
1.2
2.3
-
-
2.0
2.4
12
14
-
-
0.2
1.0
LOGIC INPUT
DRIVE OUTPUT
Low Output Voltage
VOL
Isink=1.0A
High Output Voltage
VOH
Isource=500mA
Low Fault Output Voltage
VFL
Isink=5.0A
High Fault Output Voltage
VFH
Isource=20mA
11
13.5
-
V
FAULT OUTPUT
V
UVLO
Start-up Voltage
VCCST
-
11
11.5
12
V
Disable Voltage
VCCDI
-
10
10.5
11
V
HY
-
0.9
1.0
11.1
V
Vin=0V, VDESAT=0V
210
300
380
µA
Vin=Vcc, VDESAT=Vcc
1.0
2.5
-
mA
ETC. DRIVE IC
UVLO Hysteresis
DESATURATION INPUT
De-saturation Current Source
Discharge Current
ICHG
IDSCHG
OCP and SCP
OCP Voltage Reference
VOCP
-
4.0
4.5
5.0
µA
SCP Voltage Reference
VSCP
-
5.8
6.5
7.3
mA
POWER SUPPLY
Standby Current
ICCST
Vin = High, Output open
-
14
20
mA
Operating Current
ICCOP
CL=1.0nF, f=20kHz
-
20
30
mA
Propagation Delay Time to High
Output Level
TPLH
Rg=0, CL=1.0nF
f=10kHz, Duty Cycle=50%
-
0.35
0.7
µs
Propagation Delay Time to Low
Output Level
TPHL
-
0.35
0.7
µs
Rise Time
Tr
-
50
100
ns
Fall Time
Tf
-
50
100
ns
OCP Delay Time
TOCP
50
80
120
µs
SCP Delay Time
TSCP
-
0.3
1.0
µs
Fault Output Duration Time
TDUR
Cdur=2.7nF
100
170
320
µs
CL=4.7nF
0.8
2.0
5.0
µs
Slow turn-off time
6
TSLOW
FAN8800 (KA3162)
Application Information
1. FAULT-OUT DURATION TIME (TDUR)
1) Two modes in Fault-Out Duration.
- OCP mode
Fault-Out Duration operates after TOCP.
- SCP mode
If Vpin8 is over 6.5V, Fault-Out Duration will operate after TSCP.
2) TDUR (It can be adjusted by external capacitor (CDUR) is
TDUR = C DUR ⁄ 55µA × ( 5V – 1.4V )
= 2.7nF ⁄ 55µA × ( 5V – 1.4V )
= 176µs
2. SLOW TURN-OFF (TSLOW)
ETC. DRIVE IC
Vlink
L
O
A
D
Internal Circuit
Q1
5
Low
Q2
Low
Q3
1) When SCP (Short Circuit Protection) is operated, Q3 turns on and Q2 turns on.
2) In the upper condition, Q2 flows the constant current of 35mA.
3) The capacitance of IGBT as the load is discharging by 35mA, that is Slow Turn-off.
4) Slow Turn-off time is
TSLOW = C IGBT ⁄ 35mA × ( V5max – V5min )
= 4.7nF ⁄ 35mA × ( 15V – 1V )
= 1.9µs
7
FAN8800 (KA3162)
3. OCP DELAY TIME (TOCP)
1) If the saturation detector(DESAT or Vpin8 ) is 4.5V < Vpin8 < 6.5V, the Fault-Out signal will be high after TOCP.
2) TCOP (This value is fixed internally) is
T OCP = 50pF ⁄ 3µA × 5V
= 83µs
4. CHARGE TIME IN THE DE-SATURATION DETECTION
Internal Circuit
Vlink
-
ETC. DRIVE IC
+
L
O
A
D
300uA
8
6.5V
Detect
Control
D1
CDESAT
Q4
+
4.5V
1) When the signal of Drive Output (Vpin5) is high, Q4 turns on and it is operated De-saturation Detection Mode in upper figure. In this mode, when it detects the voltage of collector- emitter terminal of IGBT through D1.
If Vce(sat) + Vf of D1 > 4.5V, it is operated OCP Mode.
If Vce(sat) + Vf of D1 > 6.5V, it is operated SCP Mode.
When the input signal of IGBT is from low-state to high-state, Q4 turns off and it is operated De-saturation Detection
Mode. On this times, the voltage of collector-emitter terminal of IGBT is not saturation-state yet.
This period is said On Time Delay (Td (on) ).
Here, the operation of CDESAT is following ; When CDESAT is charged by current source of 300uA and so it prevents
operating error for Td (on) of IGBT.
2) Slope of Vpin8 is
∆V ⁄ ∆T = 300µA ⁄ C DESAT
8
FAN8800 (KA3162)
Timing Chart
UVLO Operation
Vpin6[V]
Start-up Voltage
Disable Voltage
15
11.5
10.5
Time
0
Vpin5[V]
15
Time
0
ETC. DRIVE IC
Input and Output Signal
Input Signal
TPHL
TPLH
Output Signal
Tr
Tf
9
FAN8800 (KA3162)
Timing Chart (Continued)
OCP Delay time
Input Signal
[V]
4.5
Vpin8 Signal
Time
0
TOCP
Vpin7 Signal
ETC. DRIVE IC
TDUR
Output Signal
SCP Delay time
Input Signal
[V]
6.5
Vpin8 Signal
0
Time
TSCP
Vpin7 Signal
TDUR
Output Signal
TSLOW
10
FAN8800 (KA3162)
Typical Perfomance Characteristics
1. Vcc vs. Icc
2. Temperature vs. ICCST
14
16
ICCST[mA]
ICCST[mA]
13.5
13
12.5
8
4
12
11.5
12
13
14
15
16
17
0
18
-50 -25
Vcc[V]
50
75
100 125
ETC. DRIVE IC
4. Temperature vs. TPHL
400
400
300
300
TPHL[ns]
TPLH[ns]
25
Temperature[]
3. Temperature vs. TPLH
200
100
0
0
200
100
-50 -25
0
25
50
75
Temperature[]
100 125
0
-50 -25
0
25
50
75
100 125
Temperature[]
11
FAN8800 (KA3162)
Typical Perfomance Characteristics (Continued)
5. Temperature vs. TSLOW
6. Temperature vs. ICHG
400
3.5
350
2.5
ICHG[uA]
ISLOW [us]
3
2
1.5
1
300
250
0.5
0
-50 -25
0
25
50
75
200
100 125
-50
-25
ETC. DRIVE IC
Temperature[]
110
1.2
100
1
ISCP[us]
IOCP[us]
1.4
90
80
60
0.2
50
75
Temperature[]
12
100 125
0.6
0.4
25
75
0.8
70
0
50
8. Temperature vs. TSCP
120
-50 -25
25
Temperature[]
7. Temperature vs. TOCP
50
0
100 125
0
-50
-25
0
25
50
75
Temperature[]
100 125
FAN8800 (KA3162)
Typical Application Circuits
Single Power Supply Application
Vlink
L
O
A
D
FAN8800
1
8
TDUR
Vcc
2
7
GND
Signal
Input
DESAT
FAULT
Fault
Output
Vcc
6
3
IN
Vcc
+
ETC. DRIVE IC
5
4
Vee
OUT
Dual Power Supply Application
Vlink
L
O
A
D
FAN8800
8
1
TDUR
DESAT
2
7
GND
FAULT
Fault
Output
Vcc
Signal
Input
3
6
IN
Vcc
4
5
Vee
Vee
+
OUT
+
13
FAN8800 (KA3162)
ETC. DRIVE IC
Ordering Information
14
Device
Package
Operating Temperature
FAN8800
8-DIP
-40°C ~ +105°C
FAN8800 (KA3162)
ETC. DRIVE IC
15
ETC. DRIVE IC
FAN8800 (KA3162)
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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 1999 Fairchild Semiconductor Corporation